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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #include <arch.h> |
29 | #include <arch.h> |
30 | #include <arch/ski/ski.h> |
30 | #include <arch/ski/ski.h> |
31 | #include <arch/drivers/it.h> |
31 | #include <arch/drivers/it.h> |
32 | #include <arch/interrupt.h> |
32 | #include <arch/interrupt.h> |
33 | #include <arch/barrier.h> |
33 | #include <arch/barrier.h> |
34 | #include <arch/asm.h> |
34 | #include <arch/asm.h> |
35 | #include <arch/register.h> |
35 | #include <arch/register.h> |
36 | #include <arch/types.h> |
36 | #include <arch/types.h> |
37 | #include <arch/context.h> |
37 | #include <arch/context.h> |
38 | #include <arch/stack.h> |
38 | #include <arch/stack.h> |
39 | #include <arch/mm/page.h> |
39 | #include <arch/mm/page.h> |
40 | #include <mm/as.h> |
40 | #include <mm/as.h> |
41 | #include <config.h> |
41 | #include <config.h> |
42 | #include <userspace.h> |
42 | #include <userspace.h> |
43 | #include <console/console.h> |
43 | #include <console/console.h> |
44 | #include <proc/uarg.h> |
44 | #include <proc/uarg.h> |
45 | #include <syscall/syscall.h> |
45 | #include <syscall/syscall.h> |
46 | 46 | ||
47 | static int kbd_release=0; |
47 | static int kbd_release=0; |
48 | 48 | ||
49 | void arch_pre_main(void) |
49 | void arch_pre_main(void) |
50 | { |
50 | { |
51 | /* Setup usermode init tasks. */ |
51 | /* Setup usermode init tasks. */ |
52 | init.cnt = 6; |
52 | init.cnt = 8; |
53 | init.tasks[0].addr = INIT0_ADDRESS; |
53 | init.tasks[0].addr = INIT0_ADDRESS; |
54 | init.tasks[0].size = INIT0_SIZE; |
54 | init.tasks[0].size = INIT0_SIZE; |
55 | init.tasks[1].addr = INIT0_ADDRESS + 0x400000; |
55 | init.tasks[1].addr = INIT0_ADDRESS + 0x400000; |
56 | init.tasks[1].size = INIT0_SIZE; |
56 | init.tasks[1].size = INIT0_SIZE; |
57 | init.tasks[2].addr = INIT0_ADDRESS + 0x800000; |
57 | init.tasks[2].addr = INIT0_ADDRESS + 0x800000; |
58 | init.tasks[2].size = INIT0_SIZE; |
58 | init.tasks[2].size = INIT0_SIZE; |
59 | init.tasks[3].addr = INIT0_ADDRESS + 0xc00000; |
59 | init.tasks[3].addr = INIT0_ADDRESS + 0xc00000; |
60 | init.tasks[3].size = INIT0_SIZE; |
60 | init.tasks[3].size = INIT0_SIZE; |
61 | init.tasks[4].addr = INIT0_ADDRESS + 0x1000000; |
61 | init.tasks[4].addr = INIT0_ADDRESS + 0x1000000; |
62 | init.tasks[4].size = INIT0_SIZE; |
62 | init.tasks[4].size = INIT0_SIZE; |
63 | init.tasks[5].addr = INIT0_ADDRESS + 0x1400000; |
63 | init.tasks[5].addr = INIT0_ADDRESS + 0x1400000; |
64 | init.tasks[5].size = INIT0_SIZE; |
64 | init.tasks[5].size = INIT0_SIZE; |
- | 65 | init.tasks[6].addr = INIT0_ADDRESS + 0x1800000; |
|
- | 66 | init.tasks[6].size = INIT0_SIZE; |
|
- | 67 | init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000; |
|
- | 68 | init.tasks[7].size = INIT0_SIZE; |
|
65 | } |
69 | } |
66 | 70 | ||
67 | void arch_pre_mm_init(void) |
71 | void arch_pre_mm_init(void) |
68 | { |
72 | { |
69 | /* Set Interruption Vector Address (i.e. location of interruption vector table). */ |
73 | /* Set Interruption Vector Address (i.e. location of interruption vector table). */ |
70 | iva_write((__address) &ivt); |
74 | iva_write((__address) &ivt); |
71 | srlz_d(); |
75 | srlz_d(); |
72 | 76 | ||
73 | ski_init_console(); |
77 | ski_init_console(); |
74 | it_init(); |
78 | it_init(); |
75 | } |
79 | } |
76 | 80 | ||
77 | void arch_post_mm_init(void) |
81 | void arch_post_mm_init(void) |
78 | { |
82 | { |
79 | ski_set_console_sysinfo(); |
83 | ski_set_console_sysinfo(); |
80 | } |
84 | } |
81 | 85 | ||
82 | void arch_pre_smp_init(void) |
86 | void arch_pre_smp_init(void) |
83 | { |
87 | { |
84 | } |
88 | } |
85 | 89 | ||
86 | void arch_post_smp_init(void) |
90 | void arch_post_smp_init(void) |
87 | { |
91 | { |
88 | } |
92 | } |
89 | 93 | ||
90 | /** Enter userspace and never return. */ |
94 | /** Enter userspace and never return. */ |
91 | void userspace(uspace_arg_t *kernel_uarg) |
95 | void userspace(uspace_arg_t *kernel_uarg) |
92 | { |
96 | { |
93 | psr_t psr; |
97 | psr_t psr; |
94 | rsc_t rsc; |
98 | rsc_t rsc; |
95 | 99 | ||
96 | psr.value = psr_read(); |
100 | psr.value = psr_read(); |
97 | psr.cpl = PL_USER; |
101 | psr.cpl = PL_USER; |
98 | psr.i = true; /* start with interrupts enabled */ |
102 | psr.i = true; /* start with interrupts enabled */ |
99 | psr.ic = true; |
103 | psr.ic = true; |
100 | psr.ri = 0; /* start with instruction #0 */ |
104 | psr.ri = 0; /* start with instruction #0 */ |
101 | psr.bn = 1; /* start in bank 0 */ |
105 | psr.bn = 1; /* start in bank 0 */ |
102 | 106 | ||
103 | __asm__ volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
107 | __asm__ volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
104 | rsc.loadrs = 0; |
108 | rsc.loadrs = 0; |
105 | rsc.be = false; |
109 | rsc.be = false; |
106 | rsc.pl = PL_USER; |
110 | rsc.pl = PL_USER; |
107 | rsc.mode = 3; /* eager mode */ |
111 | rsc.mode = 3; /* eager mode */ |
108 | 112 | ||
109 | switch_to_userspace((__address) kernel_uarg->uspace_entry, |
113 | switch_to_userspace((__address) kernel_uarg->uspace_entry, |
110 | ((__address) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
114 | ((__address) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
111 | ((__address) kernel_uarg->uspace_stack)+PAGE_SIZE, |
115 | ((__address) kernel_uarg->uspace_stack)+PAGE_SIZE, |
112 | (__address) kernel_uarg->uspace_uarg, |
116 | (__address) kernel_uarg->uspace_uarg, |
113 | psr.value, rsc.value); |
117 | psr.value, rsc.value); |
114 | 118 | ||
115 | while (1) { |
119 | while (1) { |
116 | ; |
120 | ; |
117 | } |
121 | } |
118 | } |
122 | } |
119 | 123 | ||
120 | /** Set thread-local-storage pointer. |
124 | /** Set thread-local-storage pointer. |
121 | * |
125 | * |
122 | * We use r13 (a.k.a. tp) for this purpose. |
126 | * We use r13 (a.k.a. tp) for this purpose. |
123 | */ |
127 | */ |
124 | __native sys_tls_set(__native addr) |
128 | __native sys_tls_set(__native addr) |
125 | { |
129 | { |
126 | return 0; |
130 | return 0; |
127 | } |
131 | } |
128 | 132 | ||
129 | /** Acquire console back for kernel |
133 | /** Acquire console back for kernel |
130 | * |
134 | * |
131 | */ |
135 | */ |
132 | void arch_grab_console(void) |
136 | void arch_grab_console(void) |
133 | { |
137 | { |
134 | kbd_release=kbd_uspace; |
138 | kbd_release=kbd_uspace; |
135 | kbd_uspace=0; |
139 | kbd_uspace=0; |
136 | } |
140 | } |
137 | /** Return console to userspace |
141 | /** Return console to userspace |
138 | * |
142 | * |
139 | */ |
143 | */ |
140 | void arch_release_console(void) |
144 | void arch_release_console(void) |
141 | { |
145 | { |
142 | kbd_uspace=kbd_release; |
146 | kbd_uspace=kbd_release; |
143 | } |
147 | } |
144 | 148 |