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1 | /* |
1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
2 | * Copyright (c) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia32interrupt |
29 | /** @addtogroup ia32interrupt |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch/interrupt.h> |
35 | #include <arch/interrupt.h> |
36 | #include <syscall/syscall.h> |
36 | #include <syscall/syscall.h> |
37 | #include <print.h> |
37 | #include <print.h> |
38 | #include <debug.h> |
38 | #include <debug.h> |
39 | #include <panic.h> |
39 | #include <panic.h> |
40 | #include <arch/drivers/i8259.h> |
40 | #include <arch/drivers/i8259.h> |
41 | #include <func.h> |
41 | #include <func.h> |
42 | #include <cpu.h> |
42 | #include <cpu.h> |
43 | #include <arch/asm.h> |
43 | #include <arch/asm.h> |
44 | #include <mm/tlb.h> |
44 | #include <mm/tlb.h> |
45 | #include <mm/as.h> |
45 | #include <mm/as.h> |
46 | #include <arch.h> |
46 | #include <arch.h> |
47 | #include <symtab.h> |
47 | #include <symtab.h> |
48 | #include <proc/thread.h> |
48 | #include <proc/thread.h> |
49 | #include <proc/task.h> |
49 | #include <proc/task.h> |
50 | #include <synch/spinlock.h> |
50 | #include <synch/spinlock.h> |
51 | #include <arch/ddi/ddi.h> |
51 | #include <arch/ddi/ddi.h> |
52 | #include <ipc/sysipc.h> |
52 | #include <ipc/sysipc.h> |
53 | #include <interrupt.h> |
53 | #include <interrupt.h> |
54 | #include <ddi/irq.h> |
54 | #include <ddi/irq.h> |
55 | 55 | ||
56 | /* |
56 | /* |
57 | * Interrupt and exception dispatching. |
57 | * Interrupt and exception dispatching. |
58 | */ |
58 | */ |
59 | 59 | ||
60 | void (* disable_irqs_function)(uint16_t irqmask) = NULL; |
60 | void (* disable_irqs_function)(uint16_t irqmask) = NULL; |
61 | void (* enable_irqs_function)(uint16_t irqmask) = NULL; |
61 | void (* enable_irqs_function)(uint16_t irqmask) = NULL; |
62 | void (* eoi_function)(void) = NULL; |
62 | void (* eoi_function)(void) = NULL; |
63 | 63 | ||
64 | void decode_istate(istate_t *istate) |
64 | void decode_istate(istate_t *istate) |
65 | { |
65 | { |
66 | char *symbol = get_symtab_entry(istate->eip); |
66 | char *symbol = get_symtab_entry(istate->eip); |
67 | 67 | ||
68 | if (!symbol) |
68 | if (!symbol) |
69 | symbol = ""; |
69 | symbol = ""; |
70 | 70 | ||
71 | if (CPU) |
71 | if (CPU) |
72 | printf("----------------EXCEPTION OCCURED (cpu%d)----------------\n", CPU->id); |
72 | printf("----------------EXCEPTION OCCURED (cpu%d)----------------\n", CPU->id); |
73 | else |
73 | else |
74 | printf("----------------EXCEPTION OCCURED----------------\n"); |
74 | printf("----------------EXCEPTION OCCURED----------------\n"); |
75 | 75 | ||
76 | printf("%%eip: %#x (%s)\n",istate->eip,symbol); |
76 | printf("%%eip: %#x (%s)\n",istate->eip,symbol); |
77 | printf("ERROR_WORD=%#x\n", istate->error_word); |
77 | printf("ERROR_WORD=%#x\n", istate->error_word); |
78 | printf("%%cs=%#x,flags=%#x\n", istate->cs, istate->eflags); |
78 | printf("%%cs=%#x,flags=%#x\n", istate->cs, istate->eflags); |
79 | printf("%%eax=%#x, %%ecx=%#x, %%edx=%#x, %%esp=%#x\n", istate->eax,istate->ecx,istate->edx,&istate->stack[0]); |
79 | printf("%%eax=%#x, %%ecx=%#x, %%edx=%#x, %%esp=%#x\n", istate->eax,istate->ecx,istate->edx,&istate->stack[0]); |
80 | #ifdef CONFIG_DEBUG_ALLREGS |
80 | #ifdef CONFIG_DEBUG_ALLREGS |
81 | printf("%%esi=%#x, %%edi=%#x, %%ebp=%#x, %%ebx=%#x\n", istate->esi,istate->edi,istate->ebp,istate->ebx); |
81 | printf("%%esi=%#x, %%edi=%#x, %%ebp=%#x, %%ebx=%#x\n", istate->esi,istate->edi,istate->ebp,istate->ebx); |
82 | #endif |
82 | #endif |
83 | printf("stack: %#x, %#x, %#x, %#x\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]); |
83 | printf("stack: %#x, %#x, %#x, %#x\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]); |
84 | printf(" %#x, %#x, %#x, %#x\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]); |
84 | printf(" %#x, %#x, %#x, %#x\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]); |
85 | } |
85 | } |
86 | 86 | ||
87 | static void trap_virtual_eoi(void) |
87 | static void trap_virtual_eoi(void) |
88 | { |
88 | { |
89 | if (eoi_function) |
89 | if (eoi_function) |
90 | eoi_function(); |
90 | eoi_function(); |
91 | else |
91 | else |
92 | panic("no eoi_function\n"); |
92 | panic("no eoi_function\n"); |
93 | 93 | ||
94 | } |
94 | } |
95 | 95 | ||
96 | static void null_interrupt(int n, istate_t *istate) |
96 | static void null_interrupt(int n, istate_t *istate) |
97 | { |
97 | { |
98 | fault_if_from_uspace(istate, "unserviced interrupt: %d", n); |
98 | fault_if_from_uspace(istate, "unserviced interrupt: %d", n); |
99 | 99 | ||
100 | decode_istate(istate); |
100 | decode_istate(istate); |
101 | panic("unserviced interrupt: %d\n", n); |
101 | panic("unserviced interrupt: %d\n", n); |
102 | } |
102 | } |
103 | 103 | ||
104 | /** General Protection Fault. */ |
104 | /** General Protection Fault. */ |
105 | static void gp_fault(int n, istate_t *istate) |
105 | static void gp_fault(int n, istate_t *istate) |
106 | { |
106 | { |
107 | if (TASK) { |
107 | if (TASK) { |
108 | count_t ver; |
108 | count_t ver; |
109 | 109 | ||
110 | spinlock_lock(&TASK->lock); |
110 | spinlock_lock(&TASK->lock); |
111 | ver = TASK->arch.iomapver; |
111 | ver = TASK->arch.iomapver; |
112 | spinlock_unlock(&TASK->lock); |
112 | spinlock_unlock(&TASK->lock); |
113 | 113 | ||
114 | if (CPU->arch.iomapver_copy != ver) { |
114 | if (CPU->arch.iomapver_copy != ver) { |
115 | /* |
115 | /* |
116 | * This fault can be caused by an early access |
116 | * This fault can be caused by an early access |
117 | * to I/O port because of an out-dated |
117 | * to I/O port because of an out-dated |
118 | * I/O Permission bitmap installed on CPU. |
118 | * I/O Permission bitmap installed on CPU. |
119 | * Install the fresh copy and restart |
119 | * Install the fresh copy and restart |
120 | * the instruction. |
120 | * the instruction. |
121 | */ |
121 | */ |
122 | io_perm_bitmap_install(); |
122 | io_perm_bitmap_install(); |
123 | return; |
123 | return; |
124 | } |
124 | } |
125 | fault_if_from_uspace(istate, "general protection fault"); |
125 | fault_if_from_uspace(istate, "general protection fault"); |
126 | } |
126 | } |
127 | 127 | ||
128 | decode_istate(istate); |
128 | decode_istate(istate); |
129 | panic("general protection fault\n"); |
129 | panic("general protection fault\n"); |
130 | } |
130 | } |
131 | 131 | ||
132 | static void ss_fault(int n, istate_t *istate) |
132 | static void ss_fault(int n, istate_t *istate) |
133 | { |
133 | { |
134 | fault_if_from_uspace(istate, "stack fault"); |
134 | fault_if_from_uspace(istate, "stack fault"); |
135 | 135 | ||
136 | decode_istate(istate); |
136 | decode_istate(istate); |
137 | panic("stack fault\n"); |
137 | panic("stack fault\n"); |
138 | } |
138 | } |
139 | 139 | ||
140 | static void simd_fp_exception(int n, istate_t *istate) |
140 | static void simd_fp_exception(int n, istate_t *istate) |
141 | { |
141 | { |
142 | uint32_t mxcsr; |
142 | uint32_t mxcsr; |
143 | asm |
143 | asm |
144 | ( |
144 | ( |
145 | "stmxcsr %0;\n" |
145 | "stmxcsr %0;\n" |
146 | :"=m"(mxcsr) |
146 | :"=m"(mxcsr) |
147 | ); |
147 | ); |
148 | fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zx", |
148 | fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zx", |
149 | (unative_t)mxcsr); |
149 | (unative_t)mxcsr); |
150 | 150 | ||
151 | decode_istate(istate); |
151 | decode_istate(istate); |
152 | printf("MXCSR: %#zx\n",(unative_t)(mxcsr)); |
152 | printf("MXCSR: %#zx\n",(unative_t)(mxcsr)); |
153 | panic("SIMD FP exception(19)\n"); |
153 | panic("SIMD FP exception(19)\n"); |
154 | } |
154 | } |
155 | 155 | ||
156 | static void nm_fault(int n, istate_t *istate) |
156 | static void nm_fault(int n, istate_t *istate) |
157 | { |
157 | { |
158 | #ifdef CONFIG_FPU_LAZY |
158 | #ifdef CONFIG_FPU_LAZY |
159 | scheduler_fpu_lazy_request(); |
159 | scheduler_fpu_lazy_request(); |
160 | #else |
160 | #else |
161 | fault_if_from_uspace(istate, "fpu fault"); |
161 | fault_if_from_uspace(istate, "fpu fault"); |
162 | panic("fpu fault"); |
162 | panic("fpu fault"); |
163 | #endif |
163 | #endif |
164 | } |
164 | } |
165 | 165 | ||
166 | #ifdef CONFIG_SMP |
166 | #ifdef CONFIG_SMP |
167 | static void tlb_shootdown_ipi(int n, istate_t *istate) |
167 | static void tlb_shootdown_ipi(int n, istate_t *istate) |
168 | { |
168 | { |
169 | trap_virtual_eoi(); |
169 | trap_virtual_eoi(); |
170 | tlb_shootdown_ipi_recv(); |
170 | tlb_shootdown_ipi_recv(); |
171 | } |
171 | } |
172 | #endif |
172 | #endif |
173 | 173 | ||
174 | /** Handler of IRQ exceptions */ |
174 | /** Handler of IRQ exceptions */ |
175 | static void irq_interrupt(int n, istate_t *istate) |
175 | static void irq_interrupt(int n, istate_t *istate) |
176 | { |
176 | { |
177 | ASSERT(n >= IVT_IRQBASE); |
177 | ASSERT(n >= IVT_IRQBASE); |
178 | 178 | ||
179 | int inum = n - IVT_IRQBASE; |
179 | int inum = n - IVT_IRQBASE; |
180 | ASSERT(inum < IRQ_COUNT); |
180 | ASSERT(inum < IRQ_COUNT); |
181 | ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1)); |
181 | ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1)); |
182 | 182 | ||
183 | irq_t *irq = irq_dispatch_and_lock(inum); |
183 | irq_t *irq = irq_dispatch_and_lock(inum); |
184 | if (irq) { |
184 | if (irq) { |
185 | /* |
185 | /* |
186 | * The IRQ handler was found. |
186 | * The IRQ handler was found. |
187 | */ |
187 | */ |
188 | irq->handler(irq, irq->arg); |
188 | irq->handler(irq, irq->arg); |
189 | spinlock_unlock(&irq->lock); |
189 | spinlock_unlock(&irq->lock); |
190 | } else { |
190 | } else { |
191 | /* |
191 | /* |
192 | * Spurious interrupt. |
192 | * Spurious interrupt. |
193 | */ |
193 | */ |
194 | #ifdef CONFIG_DEBUG |
194 | #ifdef CONFIG_DEBUG |
195 | printf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, inum); |
195 | printf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, inum); |
196 | #endif |
196 | #endif |
197 | } |
197 | } |
198 | trap_virtual_eoi(); |
198 | trap_virtual_eoi(); |
199 | } |
199 | } |
200 | 200 | ||
201 | void interrupt_init(void) |
201 | void interrupt_init(void) |
202 | { |
202 | { |
203 | int i; |
203 | int i; |
204 | 204 | ||
205 | for (i = 0; i < IVT_ITEMS; i++) |
205 | for (i = 0; i < IVT_ITEMS; i++) |
206 | exc_register(i, "null", (iroutine) null_interrupt); |
206 | exc_register(i, "null", (iroutine) null_interrupt); |
207 | 207 | ||
208 | for (i = 0; i < IRQ_COUNT; i++) { |
208 | for (i = 0; i < IRQ_COUNT; i++) { |
209 | if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1)) |
209 | if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1)) |
210 | exc_register(IVT_IRQBASE + i, "irq", (iroutine) irq_interrupt); |
210 | exc_register(IVT_IRQBASE + i, "irq", (iroutine) irq_interrupt); |
211 | } |
211 | } |
212 | 212 | ||
213 | exc_register(7, "nm_fault", (iroutine) nm_fault); |
213 | exc_register(7, "nm_fault", (iroutine) nm_fault); |
214 | exc_register(12, "ss_fault", (iroutine) ss_fault); |
214 | exc_register(12, "ss_fault", (iroutine) ss_fault); |
215 | exc_register(13, "gp_fault", (iroutine) gp_fault); |
215 | exc_register(13, "gp_fault", (iroutine) gp_fault); |
216 | exc_register(19, "simd_fp", (iroutine) simd_fp_exception); |
216 | exc_register(19, "simd_fp", (iroutine) simd_fp_exception); |
217 | 217 | ||
218 | #ifdef CONFIG_SMP |
218 | #ifdef CONFIG_SMP |
219 | exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", (iroutine) tlb_shootdown_ipi); |
219 | exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", (iroutine) tlb_shootdown_ipi); |
220 | #endif |
220 | #endif |
221 | } |
221 | } |
222 | 222 | ||
223 | void trap_virtual_enable_irqs(uint16_t irqmask) |
223 | void trap_virtual_enable_irqs(uint16_t irqmask) |
224 | { |
224 | { |
225 | if (enable_irqs_function) |
225 | if (enable_irqs_function) |
226 | enable_irqs_function(irqmask); |
226 | enable_irqs_function(irqmask); |
227 | else |
227 | else |
228 | panic("no enable_irqs_function\n"); |
228 | panic("no enable_irqs_function\n"); |
229 | } |
229 | } |
230 | 230 | ||
231 | void trap_virtual_disable_irqs(uint16_t irqmask) |
231 | void trap_virtual_disable_irqs(uint16_t irqmask) |
232 | { |
232 | { |
233 | if (disable_irqs_function) |
233 | if (disable_irqs_function) |
234 | disable_irqs_function(irqmask); |
234 | disable_irqs_function(irqmask); |
235 | else |
235 | else |
236 | panic("no disable_irqs_function\n"); |
236 | panic("no disable_irqs_function\n"); |
237 | } |
237 | } |
238 | 238 | ||
239 | /** @} |
239 | /** @} |
240 | */ |
240 | */ |
241 | 241 |