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1 | /* |
1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #include <arch.h> |
29 | #include <arch.h> |
30 | 30 | ||
31 | #include <arch/types.h> |
31 | #include <arch/types.h> |
32 | #include <typedefs.h> |
32 | #include <typedefs.h> |
33 | 33 | ||
34 | #include <arch/pm.h> |
34 | #include <arch/pm.h> |
35 | 35 | ||
36 | #include <arch/ega.h> |
36 | #include <arch/ega.h> |
- | 37 | #include <arch/vesa.h> |
|
37 | #include <genarch/i8042/i8042.h> |
38 | #include <genarch/i8042/i8042.h> |
38 | #include <arch/i8254.h> |
39 | #include <arch/i8254.h> |
39 | #include <arch/i8259.h> |
40 | #include <arch/i8259.h> |
40 | 41 | ||
41 | #include <arch/context.h> |
42 | #include <arch/context.h> |
42 | 43 | ||
43 | #include <config.h> |
44 | #include <config.h> |
44 | 45 | ||
45 | #include <arch/interrupt.h> |
46 | #include <arch/interrupt.h> |
46 | #include <arch/asm.h> |
47 | #include <arch/asm.h> |
47 | #include <genarch/acpi/acpi.h> |
48 | #include <genarch/acpi/acpi.h> |
48 | 49 | ||
49 | #include <arch/bios/bios.h> |
50 | #include <arch/bios/bios.h> |
50 | 51 | ||
51 | #include <arch/mm/memory_init.h> |
52 | #include <arch/mm/memory_init.h> |
52 | #include <interrupt.h> |
53 | #include <interrupt.h> |
53 | #include <arch/debugger.h> |
54 | #include <arch/debugger.h> |
54 | #include <proc/thread.h> |
55 | #include <proc/thread.h> |
55 | #include <syscall/syscall.h> |
56 | #include <syscall/syscall.h> |
56 | 57 | ||
57 | void arch_pre_mm_init(void) |
58 | void arch_pre_mm_init(void) |
58 | { |
59 | { |
59 | pm_init(); |
60 | pm_init(); |
60 | 61 | ||
61 | if (config.cpu_active == 1) { |
62 | if (config.cpu_active == 1) { |
62 | bios_init(); |
63 | bios_init(); |
63 | i8259_init(); /* PIC */ |
64 | i8259_init(); /* PIC */ |
64 | i8254_init(); /* hard clock */ |
65 | i8254_init(); /* hard clock */ |
65 | 66 | ||
66 | exc_register(VECTOR_SYSCALL, "syscall", (iroutine) syscall); |
67 | exc_register(VECTOR_SYSCALL, "syscall", (iroutine) syscall); |
67 | 68 | ||
68 | #ifdef CONFIG_SMP |
69 | #ifdef CONFIG_SMP |
69 | exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", |
70 | exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", |
70 | (iroutine) tlb_shootdown_ipi); |
71 | (iroutine) tlb_shootdown_ipi); |
71 | #endif /* CONFIG_SMP */ |
72 | #endif /* CONFIG_SMP */ |
72 | } |
73 | } |
73 | } |
74 | } |
74 | 75 | ||
75 | void arch_post_mm_init(void) |
76 | void arch_post_mm_init(void) |
76 | { |
77 | { |
77 | if (config.cpu_active == 1) { |
78 | if (config.cpu_active == 1) { |
- | 79 | ||
- | 80 | #ifdef CONFIG_FB |
|
- | 81 | if (vesa_present()) vesa_init(); |
|
- | 82 | else |
|
- | 83 | #endif |
|
78 | ega_init(); /* video */ |
84 | ega_init(); /* video */ |
- | 85 | ||
- | 86 | ||
79 | /* Enable debugger */ |
87 | /* Enable debugger */ |
80 | debugger_init(); |
88 | debugger_init(); |
81 | } |
89 | } |
82 | } |
90 | } |
83 | 91 | ||
84 | void arch_pre_smp_init(void) |
92 | void arch_pre_smp_init(void) |
85 | { |
93 | { |
86 | if (config.cpu_active == 1) { |
94 | if (config.cpu_active == 1) { |
87 | memory_print_map(); |
95 | memory_print_map(); |
88 | 96 | ||
89 | #ifdef CONFIG_SMP |
97 | #ifdef CONFIG_SMP |
90 | acpi_init(); |
98 | acpi_init(); |
91 | #endif /* CONFIG_SMP */ |
99 | #endif /* CONFIG_SMP */ |
92 | } |
100 | } |
93 | } |
101 | } |
94 | 102 | ||
95 | void arch_post_smp_init(void) |
103 | void arch_post_smp_init(void) |
96 | { |
104 | { |
97 | i8042_init(); /* keyboard controller */ |
105 | i8042_init(); /* keyboard controller */ |
98 | } |
106 | } |
99 | 107 | ||
100 | void calibrate_delay_loop(void) |
108 | void calibrate_delay_loop(void) |
101 | { |
109 | { |
102 | i8254_calibrate_delay_loop(); |
110 | i8254_calibrate_delay_loop(); |
103 | if (config.cpu_active == 1) { |
111 | if (config.cpu_active == 1) { |
104 | /* |
112 | /* |
105 | * This has to be done only on UP. |
113 | * This has to be done only on UP. |
106 | * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked. |
114 | * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked. |
107 | */ |
115 | */ |
108 | i8254_normal_operation(); |
116 | i8254_normal_operation(); |
109 | } |
117 | } |
110 | } |
118 | } |
111 | 119 | ||
112 | /** Set thread-local-storage pointer |
120 | /** Set thread-local-storage pointer |
113 | * |
121 | * |
114 | * TLS pointer is set in GS register. That means, the GS contains |
122 | * TLS pointer is set in GS register. That means, the GS contains |
115 | * selector, and the descriptor->base is the correct address. |
123 | * selector, and the descriptor->base is the correct address. |
116 | */ |
124 | */ |
117 | __native sys_tls_set(__native addr) |
125 | __native sys_tls_set(__native addr) |
118 | { |
126 | { |
119 | THREAD->arch.tls = addr; |
127 | THREAD->arch.tls = addr; |
120 | set_tls_desc(addr); |
128 | set_tls_desc(addr); |
121 | 129 | ||
122 | return 0; |
130 | return 0; |
123 | } |
131 | } |
124 | 132 |