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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #ifndef __amd64_ASM_H__ |
29 | #ifndef __amd64_ASM_H__ |
30 | #define __amd64_ASM_H__ |
30 | #define __amd64_ASM_H__ |
31 | 31 | ||
32 | #include <arch/types.h> |
32 | #include <arch/types.h> |
33 | #include <config.h> |
33 | #include <config.h> |
34 | 34 | ||
35 | 35 | ||
36 | void asm_delay_loop(__u32 t); |
36 | void asm_delay_loop(__u32 t); |
- | 37 | void asm_fake_loop(__u32 t); |
|
- | 38 | ||
37 | 39 | ||
38 | /* TODO: implement the real stuff */ |
40 | /* TODO: implement the real stuff */ |
39 | static inline __address get_stack_base(void) |
41 | static inline __address get_stack_base(void) |
40 | { |
42 | { |
41 | return NULL; |
43 | return NULL; |
42 | } |
44 | } |
43 | 45 | ||
44 | static inline void cpu_sleep(void) { __asm__("hlt"); }; |
46 | static inline void cpu_sleep(void) { __asm__("hlt"); }; |
45 | 47 | ||
46 | 48 | ||
47 | static inline __u8 inb(__u16 port) |
49 | static inline __u8 inb(__u16 port) |
48 | { |
50 | { |
49 | __u8 out; |
51 | __u8 out; |
50 | 52 | ||
51 | asm ( |
53 | asm ( |
52 | "mov %0, %%dx;" |
54 | "mov %0, %%dx;" |
53 | "inb %%dx,%%al;" |
55 | "inb %%dx,%%al;" |
54 | "mov %%al, %1;" |
56 | "mov %%al, %1;" |
55 | :"=m"(out) |
57 | :"=m"(out) |
56 | :"m"(port) |
58 | :"m"(port) |
57 | :"dx","al" |
59 | :"%dx","%al" |
58 | ); |
60 | ); |
59 | return out; |
61 | return out; |
60 | } |
62 | } |
61 | 63 | ||
62 | static inline __u8 outb(__u16 port,__u8 b) |
64 | static inline __u8 outb(__u16 port,__u8 b) |
63 | { |
65 | { |
64 | asm ( |
66 | asm ( |
65 | "mov %0,%%dx;" |
67 | "mov %0,%%dx;" |
66 | "mov %1,%%al;" |
68 | "mov %1,%%al;" |
67 | "outb %%al,%%dx;" |
69 | "outb %%al,%%dx;" |
68 | : |
70 | : |
69 | :"m"( port), "m" (b) |
71 | :"m"( port), "m" (b) |
70 | :"dx","al" |
72 | :"%dx","%al" |
71 | ); |
73 | ); |
72 | } |
74 | } |
73 | 75 | ||
74 | /** Set priority level low |
76 | /** Set priority level low |
75 | * |
77 | * |
76 | * Enable interrupts and return previous |
78 | * Enable interrupts and return previous |
77 | * value of EFLAGS. |
79 | * value of EFLAGS. |
78 | */ |
80 | */ |
79 | static inline pri_t cpu_priority_low(void) { |
81 | static inline pri_t cpu_priority_low(void) { |
80 | pri_t v; |
82 | pri_t v; |
81 | __asm__ volatile ( |
83 | __asm__ volatile ( |
82 | "pushfq\n" |
84 | "pushfq\n" |
83 | "popq %0\n" |
85 | "popq %0\n" |
84 | "sti\n" |
86 | "sti\n" |
85 | : "=r" (v) |
87 | : "=r" (v) |
86 | ); |
88 | ); |
87 | return v; |
89 | return v; |
88 | } |
90 | } |
89 | 91 | ||
90 | /** Set priority level high |
92 | /** Set priority level high |
91 | * |
93 | * |
92 | * Disable interrupts and return previous |
94 | * Disable interrupts and return previous |
93 | * value of EFLAGS. |
95 | * value of EFLAGS. |
94 | */ |
96 | */ |
95 | static inline pri_t cpu_priority_high(void) { |
97 | static inline pri_t cpu_priority_high(void) { |
96 | pri_t v; |
98 | pri_t v; |
97 | __asm__ volatile ( |
99 | __asm__ volatile ( |
98 | "pushfq\n" |
100 | "pushfq\n" |
99 | "popq %0\n" |
101 | "popq %0\n" |
100 | "cli\n" |
102 | "cli\n" |
101 | : "=r" (v) |
103 | : "=r" (v) |
102 | ); |
104 | ); |
103 | return v; |
105 | return v; |
104 | } |
106 | } |
105 | 107 | ||
106 | /** Restore priority level |
108 | /** Restore priority level |
107 | * |
109 | * |
108 | * Restore EFLAGS. |
110 | * Restore EFLAGS. |
109 | */ |
111 | */ |
110 | static inline void cpu_priority_restore(pri_t pri) { |
112 | static inline void cpu_priority_restore(pri_t pri) { |
111 | __asm__ volatile ( |
113 | __asm__ volatile ( |
112 | "pushq %0\n" |
114 | "pushq %0\n" |
113 | "popfq\n" |
115 | "popfq\n" |
114 | : : "r" (pri) |
116 | : : "r" (pri) |
115 | ); |
117 | ); |
116 | } |
118 | } |
117 | 119 | ||
- | 120 | /** Return raw priority level |
|
- | 121 | * |
|
- | 122 | * Return EFLAFS. |
|
- | 123 | */ |
|
- | 124 | static inline pri_t cpu_priority_read(void) { |
|
- | 125 | pri_t v; |
|
- | 126 | __asm__ volatile ( |
|
- | 127 | "pushfq\n" |
|
- | 128 | "popq %0\n" |
|
- | 129 | : "=r" (v) |
|
- | 130 | ); |
|
- | 131 | return v; |
|
- | 132 | } |
|
- | 133 | ||
- | 134 | extern size_t interrupt_handler_size; |
|
- | 135 | extern void interrupt_handlers(void); |
|
118 | 136 | ||
119 | #endif |
137 | #endif |
120 | 138 |