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1 | ## General configuration directives |
1 | ## General configuration directives |
2 | 2 | ||
3 | # Architecture |
3 | # Architecture |
4 | @ "amd64" AMD64/Intel EM64T |
4 | @ "amd64" AMD64/Intel EM64T |
5 | @ "arm32" ARM 32-bit |
5 | @ "arm32" ARM 32-bit |
6 | @ "ia32" Intel IA-32 |
6 | @ "ia32" Intel IA-32 |
7 | @ "ia32xen" Intel IA-32 on Xen hypervisor |
7 | @ "ia32xen" Intel IA-32 on Xen hypervisor |
8 | @ "ia64" Intel IA-64 |
8 | @ "ia64" Intel IA-64 |
9 | @ "mips32" MIPS 32-bit |
9 | @ "mips32" MIPS 32-bit |
10 | @ "ppc32" PowerPC 32-bit |
10 | @ "ppc32" PowerPC 32-bit |
11 | @ "ppc64" PowerPC 64-bit |
11 | @ "ppc64" PowerPC 64-bit |
12 | @ "sparc64" Sun UltraSPARC 64-bit |
12 | @ "sparc64" Sun UltraSPARC 64-bit |
13 | ! ARCH (choice) |
13 | ! ARCH (choice) |
14 | 14 | ||
15 | # Compiler |
15 | # Compiler |
16 | @ "cross" Cross-compiler |
16 | @ "cross" Cross-compiler |
17 | @ "native" Native |
17 | @ "native" Native |
18 | ! COMPILER (choice) |
18 | ! COMPILER (choice) |
19 | 19 | ||
20 | # CPU type |
20 | # CPU type |
21 | @ "pentium4" Pentium 4 |
21 | @ "pentium4" Pentium 4 |
22 | @ "pentium3" Pentium 3 |
22 | @ "pentium3" Pentium 3 |
23 | @ "athlon-xp" Athlon XP |
23 | @ "athlon-xp" Athlon XP |
24 | @ "athlon-mp" Athlon MP |
24 | @ "athlon-mp" Athlon MP |
25 | @ "prescott" Prescott |
25 | @ "prescott" Prescott |
26 | ! [ARCH=ia32|ARCH=ia32xen] MACHINE (choice) |
26 | ! [ARCH=ia32|ARCH=ia32xen] MACHINE (choice) |
27 | 27 | ||
28 | # CPU type |
28 | # CPU type |
29 | @ "opteron" Opteron |
29 | @ "opteron" Opteron |
30 | ! [ARCH=amd64] MACHINE (choice) |
30 | ! [ARCH=amd64] MACHINE (choice) |
31 | 31 | ||
32 | # Machine type |
32 | # Machine type |
33 | @ "gxemul" GXEmul |
33 | @ "gxemul" GXEmul |
34 | ! [ARCH=arm32] MACHINE (choice) |
34 | ! [ARCH=arm32] MACHINE (choice) |
35 | 35 | ||
36 | # Machine type |
36 | # Machine type |
37 | @ "msim" MSIM Simulator |
37 | @ "msim" MSIM Simulator |
38 | @ "simics" Virtutech Simics simulator |
38 | @ "simics" Virtutech Simics simulator |
39 | @ "lgxemul" GXEmul Little Endian |
39 | @ "lgxemul" GXEmul Little Endian |
40 | @ "bgxemul" GXEmul Big Endian |
40 | @ "bgxemul" GXEmul Big Endian |
41 | @ "indy" SGI Indy |
41 | @ "indy" SGI Indy |
42 | ! [ARCH=mips32] MACHINE (choice) |
42 | ! [ARCH=mips32] MACHINE (choice) |
43 | 43 | ||
44 | # Machine type |
44 | # Machine type |
45 | @ "ski" Ski ia64 simulator |
45 | @ "ski" Ski ia64 simulator |
46 | @ "i460GX" i460GX chipset machine |
46 | @ "i460GX" i460GX chipset machine |
47 | ! [ARCH=ia64] MACHINE (choice) |
47 | ! [ARCH=ia64] MACHINE (choice) |
48 | 48 | ||
49 | # Framebuffer support |
49 | # Framebuffer support |
50 | ! [(ARCH=mips32&MACHINE=lgxemul)|(ARCH=mips32&MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)] CONFIG_FB (y/n) |
50 | ! [(ARCH=mips32&MACHINE=lgxemul)|(ARCH=mips32&MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)] CONFIG_FB (y/n) |
51 | 51 | ||
52 | # Framebuffer width |
52 | # Framebuffer width |
53 | @ "640" |
53 | @ "640" |
54 | @ "800" |
54 | @ "800" |
55 | @ "1024" |
55 | @ "1024" |
56 | @ "1152" |
56 | @ "1152" |
57 | @ "1280" |
57 | @ "1280" |
58 | @ "1400" |
58 | @ "1400" |
59 | @ "1440" |
59 | @ "1440" |
60 | @ "1600" |
60 | @ "1600" |
61 | @ "2048" |
61 | @ "2048" |
62 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_WIDTH (choice) |
62 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_WIDTH (choice) |
63 | 63 | ||
64 | # Framebuffer height |
64 | # Framebuffer height |
65 | @ "480" |
65 | @ "480" |
66 | @ "600" |
66 | @ "600" |
67 | @ "768" |
67 | @ "768" |
68 | @ "852" |
68 | @ "852" |
69 | @ "900" |
69 | @ "900" |
70 | @ "960" |
70 | @ "960" |
71 | @ "1024" |
71 | @ "1024" |
72 | @ "1050" |
72 | @ "1050" |
73 | @ "1200" |
73 | @ "1200" |
74 | @ "1536" |
74 | @ "1536" |
75 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_HEIGHT (choice) |
75 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_HEIGHT (choice) |
76 | 76 | ||
77 | # Framebuffer depth |
77 | # Framebuffer depth |
78 | @ "8" |
78 | @ "8" |
79 | @ "16" |
79 | @ "16" |
80 | @ "24" |
80 | @ "24" |
81 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_BPP (choice) |
81 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_BPP (choice) |
82 | 82 | ||
83 | # Support for SMP |
83 | # Support for SMP |
84 | ! [ARCH=ia32|ARCH=amd64|ARCH=ia32xen|ARCH=sparc64] CONFIG_SMP (y/n) |
84 | ! [ARCH=ia32|ARCH=amd64|ARCH=ia32xen|ARCH=sparc64] CONFIG_SMP (y/n) |
85 | 85 | ||
86 | # Improved support for hyperthreading |
86 | # Improved support for hyperthreading |
87 | ! [(ARCH=ia32|ARCH=amd64|ARCH=ia32xen)&CONFIG_SMP=y] CONFIG_HT (y/n) |
87 | ! [(ARCH=ia32|ARCH=amd64|ARCH=ia32xen)&CONFIG_SMP=y] CONFIG_HT (y/n) |
88 | 88 | ||
89 | # Simics BIOS AP boot fix |
89 | # Simics BIOS AP boot fix |
90 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n) |
90 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n) |
91 | 91 | ||
92 | # Lazy FPU context switching |
92 | # Lazy FPU context switching |
93 | ! [(ARCH=mips32&MACHINE!=msim&MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64|ARCH=sparc64|ARCH=ia32xen] CONFIG_FPU_LAZY (y/n) |
93 | ! [(ARCH=mips32&MACHINE!=msim&MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64|ARCH=sparc64|ARCH=ia32xen] CONFIG_FPU_LAZY (y/n) |
94 | 94 | ||
95 | # Power off on halt |
95 | # Power off on halt |
96 | ! [ARCH=ppc32] CONFIG_POWEROFF (n/y) |
96 | ! [ARCH=ppc32] CONFIG_POWEROFF (n/y) |
97 | 97 | ||
98 | # Use VHPT |
98 | # Use VHPT |
99 | ! [ARCH=ia64] CONFIG_VHPT (n/y) |
99 | ! [ARCH=ia64] CONFIG_VHPT (n/y) |
100 | 100 | ||
101 | # Use TSB |
101 | # Use TSB |
102 | ! [ARCH=sparc64] CONFIG_TSB (y/n) |
102 | ! [ARCH=sparc64] CONFIG_TSB (y/n) |
103 | 103 | ||
104 | # Support for Z8530 serial port |
104 | # Support for Z8530 serial port |
105 | ! [ARCH=sparc64] CONFIG_Z8530 (y/n) |
105 | ! [ARCH=sparc64] CONFIG_Z8530 (y/n) |
106 | 106 | ||
107 | # Support for NS16550 serial port |
107 | # Support for NS16550 serial port |
108 | ! [ARCH=sparc64] CONFIG_NS16550 (y/n) |
108 | ! [ARCH=sparc64] CONFIG_NS16550 (y/n) |
109 | 109 | ||
110 | # Virtually indexed D-cache support |
110 | # Virtually indexed D-cache support |
111 | ! [ARCH=sparc64] CONFIG_VIRT_IDX_DCACHE (y/n) |
111 | ! [ARCH=sparc64] CONFIG_VIRT_IDX_DCACHE (y/n) |
112 | 112 | ||
113 | 113 | ||
114 | ## Debugging configuration directives |
114 | ## Debugging configuration directives |
115 | 115 | ||
116 | # General debuging and assert checking |
116 | # General debuging and assert checking |
117 | ! CONFIG_DEBUG (y/n) |
117 | ! CONFIG_DEBUG (y/n) |
118 | 118 | ||
119 | # Deadlock detection support for spinlocks |
119 | # Deadlock detection support for spinlocks |
120 | ! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n) |
120 | ! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n) |
121 | 121 | ||
122 | # Watchpoint on rewriting AS with zero |
122 | # Watchpoint on rewriting AS with zero |
123 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_AS_WATCHPOINT (y/n) |
123 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_AS_WATCHPOINT (y/n) |
124 | 124 | ||
125 | # Save all interrupt registers |
125 | # Save all interrupt registers |
126 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_ALLREGS (y/n) |
126 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_ALLREGS (y/n) |
127 | 127 | ||
128 | 128 | ||
129 | ## Run-time configuration directives |
129 | ## Run-time configuration directives |
130 | 130 | ||
131 | # Compile kernel tests |
131 | # Compile kernel tests |
132 | ! CONFIG_TEST (y/n) |
132 | ! CONFIG_TEST (y/n) |
133 | 133 | ||
134 | 134 | ||
135 | ## Experimental features |
135 | ## Experimental features |
136 | 136 | ||
137 | # Enable experimental features |
137 | # Enable experimental features |
138 | ! CONFIG_EXPERIMENTAL (n/y) |
138 | ! CONFIG_EXPERIMENTAL (n/y) |
139 | 139 |