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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #include <proc/scheduler.h> |
29 | #include <proc/scheduler.h> |
30 | #include <cpu.h> |
30 | #include <cpu.h> |
31 | #include <proc/task.h> |
31 | #include <proc/task.h> |
32 | #include <proc/thread.h> |
32 | #include <proc/thread.h> |
33 | #include <arch.h> |
33 | #include <arch.h> |
34 | #include <arch/context.h> /* SP_DELTA */ |
34 | #include <arch/context.h> /* SP_DELTA */ |
35 | #include <arch/debugger.h> |
35 | #include <arch/debugger.h> |
36 | #include <arch/pm.h> |
36 | #include <arch/pm.h> |
37 | #include <arch/asm.h> |
37 | #include <arch/asm.h> |
38 | #include <adt/bitmap.h> |
38 | #include <arch/ddi/ddi.h> |
39 | #include <print.h> |
- | |
40 | 39 | ||
41 | /** Perform ia32 specific tasks needed before the new task is run. |
40 | /** Perform ia32 specific tasks needed before the new task is run. |
42 | * |
41 | * |
43 | * Interrupts are disabled. |
42 | * Interrupts are disabled. |
44 | */ |
43 | */ |
45 | void before_task_runs_arch(void) |
44 | void before_task_runs_arch(void) |
46 | { |
45 | { |
47 | count_t bits; |
- | |
48 | ptr_16_32_t cpugdtr; |
- | |
49 | descriptor_t *gdt_p; |
- | |
50 | - | ||
51 | /* |
- | |
52 | * Switch the I/O Permission Bitmap, if necessary. |
- | |
53 | */ |
- | |
54 | - | ||
55 | /* First, copy the I/O Permission Bitmap. */ |
- | |
56 | spinlock_lock(&TASK->lock); |
- | |
57 | if ((bits = TASK->arch.iomap.bits)) { |
- | |
58 | bitmap_t iomap; |
46 | io_perm_bitmap_install(); |
59 | - | ||
60 | ASSERT(TASK->arch.iomap.map); |
- | |
61 | bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8); |
- | |
62 | bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits); |
- | |
63 | /* |
- | |
64 | * It is safe to set the trailing eight bits because of the extra |
- | |
65 | * convenience byte in TSS_IOMAP_SIZE. |
- | |
66 | */ |
- | |
67 | bitmap_set_range(&iomap, TASK->arch.iomap.bits, 8); |
- | |
68 | } |
- | |
69 | spinlock_unlock(&TASK->lock); |
- | |
70 | - | ||
71 | /* Second, adjust TSS segment limit. */ |
- | |
72 | gdtr_store(&cpugdtr); |
- | |
73 | gdt_p = (descriptor_t *) cpugdtr.base; |
- | |
74 | gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits) - 1); |
- | |
75 | gdtr_load(&cpugdtr); |
- | |
76 | - | ||
77 | /* |
- | |
78 | * Before we load new TSS limit, the current TSS descriptor |
- | |
79 | * type must be changed to describe inactive TSS. |
- | |
80 | */ |
- | |
81 | gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL; |
- | |
82 | tr_load(selector(TSS_DES)); |
- | |
83 | } |
47 | } |
84 | 48 | ||
85 | /** Perform ia32 specific tasks needed before the new thread is scheduled. |
49 | /** Perform ia32 specific tasks needed before the new thread is scheduled. |
86 | * |
50 | * |
87 | * THREAD is locked and interrupts are disabled. |
51 | * THREAD is locked and interrupts are disabled. |
88 | */ |
52 | */ |
89 | void before_thread_runs_arch(void) |
53 | void before_thread_runs_arch(void) |
90 | { |
54 | { |
91 | CPU->arch.tss->esp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; |
55 | CPU->arch.tss->esp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; |
92 | CPU->arch.tss->ss0 = selector(KDATA_DES); |
56 | CPU->arch.tss->ss0 = selector(KDATA_DES); |
93 | 57 | ||
94 | /* Set up TLS in GS register */ |
58 | /* Set up TLS in GS register */ |
95 | set_tls_desc(THREAD->arch.tls); |
59 | set_tls_desc(THREAD->arch.tls); |
96 | 60 | ||
97 | #ifdef CONFIG_DEBUG_AS_WATCHPOINT |
61 | #ifdef CONFIG_DEBUG_AS_WATCHPOINT |
98 | /* Set watchpoint on AS to ensure that nobody sets it to zero */ |
62 | /* Set watchpoint on AS to ensure that nobody sets it to zero */ |
99 | if (CPU->id < BKPOINTS_MAX) |
63 | if (CPU->id < BKPOINTS_MAX) |
100 | breakpoint_add(&((the_t *) THREAD->kstack)->as, |
64 | breakpoint_add(&((the_t *) THREAD->kstack)->as, |
101 | BKPOINT_WRITE | BKPOINT_CHECK_ZERO, |
65 | BKPOINT_WRITE | BKPOINT_CHECK_ZERO, |
102 | CPU->id); |
66 | CPU->id); |
103 | #endif |
67 | #endif |
104 | } |
68 | } |
105 | 69 | ||
106 | void after_thread_ran_arch(void) |
70 | void after_thread_ran_arch(void) |
107 | { |
71 | { |
108 | } |
72 | } |
109 | 73 |