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1 | ## General configuration directives |
1 | ## General configuration directives |
2 | 2 | ||
3 | # Architecture |
3 | # Architecture |
4 | @ "amd64" AMD64/Intel EM64T |
4 | @ "amd64" AMD64/Intel EM64T |
5 | @ "ia32" Intel IA-32 |
5 | @ "ia32" Intel IA-32 |
6 | @ "ia64" Intel IA-64 |
6 | @ "ia64" Intel IA-64 |
7 | @ "mips32" MIPS 32-bit |
7 | @ "mips32" MIPS 32-bit |
8 | @ "ppc32" PowerPC 32-bit |
8 | @ "ppc32" PowerPC 32-bit |
9 | @ "ppc64" PowerPC 64-bit |
9 | @ "ppc64" PowerPC 64-bit |
10 | @ "sparc64" Sun UltraSPARC |
10 | @ "sparc64" Sun UltraSPARC |
11 | ! ARCH (choice) |
11 | ! ARCH (choice) |
12 | 12 | ||
13 | # IA32 Compiler |
13 | # IA32 Compiler |
14 | @ "cross" Cross-compiler |
14 | @ "cross" Cross-compiler |
15 | @ "native" Native |
15 | @ "native" Native |
16 | ! [ARCH=ia32] IA32_COMPILER (choice) |
16 | ! [ARCH=ia32] IA32_COMPILER (choice) |
17 | % [ARCH=ia32] SAVEAS IA32_COMPILER COMPILER |
17 | % [ARCH=ia32] SAVEAS IA32_COMPILER COMPILER |
18 | 18 | ||
19 | # AMD64 Compiler |
19 | # AMD64 Compiler |
20 | @ "cross" Cross-compiler |
20 | @ "cross" Cross-compiler |
21 | @ "native" Native |
21 | @ "native" Native |
22 | ! [ARCH=amd64] AMD64_COMPILER (choice) |
22 | ! [ARCH=amd64] AMD64_COMPILER (choice) |
23 | % [ARCH=amd64] SAVEAS AMD64_COMPILER COMPILER |
23 | % [ARCH=amd64] SAVEAS AMD64_COMPILER COMPILER |
24 | 24 | ||
25 | # Compiler |
25 | # Compiler |
26 | @ "cross" Cross-compiler |
26 | @ "cross" Cross-compiler |
27 | @ "native" Native |
27 | @ "native" Native |
28 | ! [(ARCH!=amd64)&(ARCH!=ia32)] OTHER_COMPILER (choice) |
28 | ! [(ARCH!=amd64)&(ARCH!=ia32)] OTHER_COMPILER (choice) |
29 | % [(ARCH!=amd64)&(ARCH!=ia32)] SAVEAS OTHER_COMPILER COMPILER |
29 | % [(ARCH!=amd64)&(ARCH!=ia32)] SAVEAS OTHER_COMPILER COMPILER |
30 | 30 | ||
31 | 31 | ||
32 | # CPU type |
32 | # CPU type |
33 | @ "pentium4" Pentium 4 |
33 | @ "pentium4" Pentium 4 |
34 | @ "pentium3" Pentium 3 |
34 | @ "pentium3" Pentium 3 |
35 | @ "athlon-xp" Athlon XP |
35 | @ "athlon-xp" Athlon XP |
36 | @ "athlon-mp" Athlon MP |
36 | @ "athlon-mp" Athlon MP |
37 | @ "prescott" Prescott |
37 | @ "prescott" Prescott |
38 | ! [ARCH=ia32] IA32_CPU (choice) |
38 | ! [ARCH=ia32] IA32_CPU (choice) |
39 | 39 | ||
40 | # MIPS Machine Type |
40 | # MIPS Machine Type |
41 | @ "msim" MSIM Simulator |
41 | @ "msim" MSIM Simulator |
42 | @ "simics" Virtutech Simics simulator |
42 | @ "simics" Virtutech Simics simulator |
43 | @ "lgxemul" GXEmul Little Endian |
43 | @ "lgxemul" GXEmul Little Endian |
44 | @ "bgxemul" GXEmul Big Endian |
44 | @ "bgxemul" GXEmul Big Endian |
45 | @ "indy" SGI Indy |
45 | @ "indy" SGI Indy |
46 | ! [ARCH=mips32] MIPS_MACHINE (choice) |
46 | ! [ARCH=mips32] MIPS_MACHINE (choice) |
47 | 47 | ||
48 | # Framebuffer support |
48 | # Framebuffer support |
49 | ! [(ARCH=mips32&MIPS_MACHINE=lgxemul)|(ARCH=mips32&MIPS_MACHINE=bgxemul)] CONFIG_FB (y/n) |
49 | ! [(ARCH=mips32&MIPS_MACHINE=lgxemul)|(ARCH=mips32&MIPS_MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)] CONFIG_FB (y/n) |
- | 50 | ||
- | 51 | # Framebuffer width |
|
- | 52 | @ "320" |
|
- | 53 | @ "640" |
|
- | 54 | @ "800" |
|
- | 55 | @ "1024" |
|
- | 56 | @ "1280" |
|
- | 57 | @ "1600" |
|
- | 58 | @ "2048" |
|
- | 59 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_WIDTH (choice) |
|
- | 60 | ||
- | 61 | # Framebuffer height |
|
- | 62 | @ "200" |
|
- | 63 | @ "240" |
|
- | 64 | @ "400" |
|
- | 65 | @ "480" |
|
- | 66 | @ "600" |
|
- | 67 | @ "768" |
|
- | 68 | @ "1024" |
|
- | 69 | @ "1200" |
|
- | 70 | @ "1536" |
|
- | 71 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_HEIGHT (choice) |
|
- | 72 | ||
- | 73 | # Framebuffer depth |
|
- | 74 | @ "8" |
|
- | 75 | @ "16" |
|
- | 76 | @ "24" |
|
- | 77 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_BPP (choice) |
|
- | 78 | ||
- | 79 | ||
50 | 80 | ||
51 | # Support for SMP |
81 | # Support for SMP |
52 | ! [ARCH=ia32|ARCH=amd64] CONFIG_SMP (y/n) |
82 | ! [ARCH=ia32|ARCH=amd64] CONFIG_SMP (y/n) |
53 | 83 | ||
54 | # Improved support for hyperthreading |
84 | # Improved support for hyperthreading |
55 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_HT (y/n) |
85 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_HT (y/n) |
56 | 86 | ||
57 | # Simics BIOS AP boot fix |
87 | # Simics BIOS AP boot fix |
58 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n) |
88 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n) |
59 | 89 | ||
60 | # Lazy FPU context switching |
90 | # Lazy FPU context switching |
61 | ! [(ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64] CONFIG_FPU_LAZY (y/n) |
91 | ! [(ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64] CONFIG_FPU_LAZY (y/n) |
62 | 92 | ||
63 | # Power off on halt |
93 | # Power off on halt |
64 | ! [ARCH=ppc32] CONFIG_POWEROFF (y/n) |
94 | ! [ARCH=ppc32] CONFIG_POWEROFF (y/n) |
65 | 95 | ||
66 | ## Debugging configuration directives |
96 | ## Debugging configuration directives |
67 | 97 | ||
68 | # General debuging and assert checking |
98 | # General debuging and assert checking |
69 | ! CONFIG_DEBUG (y/n) |
99 | ! CONFIG_DEBUG (y/n) |
70 | 100 | ||
71 | # Deadlock detection support for spinlocks |
101 | # Deadlock detection support for spinlocks |
72 | ! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n) |
102 | ! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n) |
73 | 103 | ||
74 | # Watchpoint on rewriting AS with zero |
104 | # Watchpoint on rewriting AS with zero |
75 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32)] CONFIG_DEBUG_AS_WATCHPOINT (y/n) |
105 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32)] CONFIG_DEBUG_AS_WATCHPOINT (y/n) |
76 | 106 | ||
77 | # Save all interrupt registers |
107 | # Save all interrupt registers |
78 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32)] CONFIG_DEBUG_ALLREGS (y/n) |
108 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32)] CONFIG_DEBUG_ALLREGS (y/n) |
79 | 109 | ||
80 | # Use VHPT |
110 | # Use VHPT |
81 | ! [ARCH=ia64] CONFIG_VHPT (y/n) |
111 | ! [ARCH=ia64] CONFIG_VHPT (y/n) |
82 | 112 | ||
83 | ## Run-time configuration directives |
113 | ## Run-time configuration directives |
84 | 114 | ||
85 | # Kernel test type |
115 | # Kernel test type |
86 | @ "" No test |
116 | @ "" No test |
87 | @ "atomic/atomic1" Test of atomic operations. |
117 | @ "atomic/atomic1" Test of atomic operations. |
88 | @ "btree/btree1" B-tree test. |
118 | @ "btree/btree1" B-tree test. |
89 | @ "synch/rwlock1" Read write test 1 |
119 | @ "synch/rwlock1" Read write test 1 |
90 | @ "synch/rwlock2" Read write test 2 |
120 | @ "synch/rwlock2" Read write test 2 |
91 | @ "synch/rwlock3" Read write test 3 |
121 | @ "synch/rwlock3" Read write test 3 |
92 | @ "synch/rwlock4" Read write test 4 |
122 | @ "synch/rwlock4" Read write test 4 |
93 | @ "synch/rwlock5" Read write test 5 |
123 | @ "synch/rwlock5" Read write test 5 |
94 | @ "synch/semaphore1" Semaphore test 1 |
124 | @ "synch/semaphore1" Semaphore test 1 |
95 | @ "synch/semaphore2" Sempahore test 2 |
125 | @ "synch/semaphore2" Sempahore test 2 |
96 | @ [ARCH=ia32|ARCH=amd64|ARCH=ia64] "fpu/fpu1" Intel fpu test 1 |
126 | @ [ARCH=ia32|ARCH=amd64|ARCH=ia64] "fpu/fpu1" Intel fpu test 1 |
97 | @ [ARCH=ia32|ARCH=amd64] "fpu/sse1" Intel Sse test 1 |
127 | @ [ARCH=ia32|ARCH=amd64] "fpu/sse1" Intel Sse test 1 |
98 | @ [ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics] "fpu/mips1" Mips FPU test 1 |
128 | @ [ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics] "fpu/mips1" Mips FPU test 1 |
99 | @ "print/print1" Printf test 1 |
129 | @ "print/print1" Printf test 1 |
100 | @ "thread/thread1" Thread test 1 |
130 | @ "thread/thread1" Thread test 1 |
101 | @ "mm/mapping1" Mapping test 1 |
131 | @ "mm/mapping1" Mapping test 1 |
102 | @ "mm/falloc1" Frame Allocation test 1 |
132 | @ "mm/falloc1" Frame Allocation test 1 |
103 | @ "mm/falloc2" Frame Allocation test 2 |
133 | @ "mm/falloc2" Frame Allocation test 2 |
104 | @ "mm/slab1" SLAB test1 - No CPU-cache |
134 | @ "mm/slab1" SLAB test1 - No CPU-cache |
105 | @ "mm/slab2" SLAB test2 - SMP CPU cache |
135 | @ "mm/slab2" SLAB test2 - SMP CPU cache |
106 | @ "fault/fault1" Write to NULL (maybe page fault) |
136 | @ "fault/fault1" Write to NULL (maybe page fault) |
107 | @ [ARCH=ia64] "mm/purge1" Itanium TLB purge test |
137 | @ [ARCH=ia64] "mm/purge1" Itanium TLB purge test |
108 | @ [ARCH=mips32] "debug/mips1" Mips breakpoint-debug test |
138 | @ [ARCH=mips32] "debug/mips1" Mips breakpoint-debug test |
109 | ! CONFIG_TEST (choice) |
139 | ! CONFIG_TEST (choice) |
110 | 140 |