Rev 346 | Rev 501 | Go to most recent revision | Only display areas with differences | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 346 | Rev 347 | ||
---|---|---|---|
1 | amd64 port |
1 | amd64 port |
2 | ========== |
2 | ========== |
3 | 3 | ||
4 | The fifth port, amd64 port, is heavily based on ia32 port. |
- | |
5 | It was originally written by Ondrej Palkovsky. |
4 | The fifth port, amd64 port, was originally written by Ondrej Palkovsky. |
6 | The goal is to support AMD64 or Intel Extended Memory PC's. |
5 | The goal is to support AMD64 and Intel Extended Memory 64 Technology PC's. |
7 | The new 64-bit code makes use of portable parts of ia32. |
6 | The port makes use of portable parts of ia32. |
8 | Both uniprocessors and multiprocessors are supported. |
7 | Both uniprocessors and multiprocessors are supported. |
9 | It has not been tested on real hardware, so far. |
8 | The kernel runs on real hardware and in simulators too. |
10 | 9 | ||
11 | HARDWARE REQUIREMENTS |
10 | HARDWARE REQUIREMENTS |
12 | o no real hardware supported |
11 | o AMD64 architecture processor |
- | 12 | o Intel Extended Memory 64 Technology processor |
|
- | 13 | ||
- | 14 | CPU |
|
- | 15 | o Intel Xeon with Intel Extended Memory 64 Technology |
|
13 | 16 | ||
14 | SMP COMPATIBILITY |
17 | SMP COMPATIBILITY |
15 | o Bochs 2.2.1 |
18 | o Bochs 2.2.1 |
16 | o 2x-8x AMD64 CPU |
19 | o 2x-8x AMD64 CPU |
17 | o Simics Simics 2.2.19 |
20 | o Simics 2.2.19 |
18 | o 2x-8x AMD hammer CPU |
21 | o 2x-8x AMD hammer CPU |
- | 22 | o HP ProLiant ML350 (HyperThreading) |
|
19 | 23 | ||
20 | EMULATORS AND VIRTUALIZERS |
24 | EMULATORS AND VIRTUALIZERS |
21 | o Bochs 2.2 |
25 | o Bochs 2.2.1 |
22 | o Simics Simics 2.2.19 |
26 | o Simics 2.2.19 |
23 | 27 |