Rev 534 | Only display areas with differences | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 534 | Rev 832 | ||
---|---|---|---|
1 | + implement true memory barriers for all architectures |
1 | + implement true memory barriers for all architectures |
2 | 2 | ||
3 | + implement true memory management |
3 | + implement true memory management |
4 | + [ia32] use int 0x15 ax=0xe820 to get memory map and memory size [DONE] |
4 | + [ia32] use int 0x15 ax=0xe820 to get memory map and memory size [DONE] |
5 | + [mips] use some heuristics to get memory map and memory size |
5 | + [mips] use some heuristics to get memory map and memory size |
6 | + reimplement heap so that it can allocate/deallocate |
6 | + reimplement heap so that it can allocate/deallocate |
7 | itself frames as necessary |
7 | itself frames as necessary [DONE] |
8 | + provide native four-level portable page table interface [DONE] |
8 | + provide native four-level portable page table interface [DONE] |
9 | + every architecture uses its native page table format |
9 | + every architecture uses its native page table format |
10 | + kernel provides unified four-level page table interface |
10 | + kernel provides unified four-level page table interface |
11 | for all architectures |
11 | or page hash table interface to architectures |
12 | + track usage of frames containing middle-level page tables |
12 | + deallocation of memory of empty page tables [DONE] |
13 | (frame leak) |
- | |
14 | 13 | ||
15 | + get user mode support for all architectures |
14 | + get user mode support for all architectures |
16 | 15 | ||
17 | + save/restore floating point context on context switch |
16 | + save/restore floating point context on context switch |
18 | + [ia32] lazy context switch using TS flag [DONE] |
17 | + [ia32] lazy context switch using TS flag [DONE] |
19 | + [ia32] MMX,SSE1-.. initialization |
18 | + [ia32] MMX,SSE1-.. initialization |
20 | + [ia32] review privilege separation [DONE] |
19 | + [ia32] review privilege separation [DONE] |
21 | + zero IOPL in EFLAGS [DONE] |
20 | + zero IOPL in EFLAGS [DONE] |
22 | + before IRET (from SYSCALL), zero NT in EFLAGS [DONE] |
21 | + before IRET (from SYSCALL), zero NT in EFLAGS [DONE] |
23 | + [ia32] review the cache controling bits in CR0 register |
22 | + [ia32] review the cache controling bits in CR0 register |
24 | + [ia32] zero the alignment exception bit in EFLAGS [DONE] |
23 | + [ia32] zero the alignment exception bit in EFLAGS [DONE] |
25 | - Task changed to clear AM in CR0 so that |
24 | - Task changed to clear AM in CR0 so that |
26 | the alignment check is disabled globally |
25 | the alignment check is disabled globally |
27 | + make emulated architectures also work on real hardware |
26 | + make emulated architectures also work on real hardware |
28 | 27 |