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1 | # |
1 | # |
2 | # Copyright (C) 2006 Martin Decky |
2 | # Copyright (C) 2006 Martin Decky |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | #include <arch/asm/regname.h> |
29 | #include <arch/asm/regname.h> |
30 | 30 | ||
31 | .text |
31 | .text |
32 | 32 | ||
- | 33 | .global userspace_asm |
|
33 | .global iret |
34 | .global iret |
- | 35 | .global iret_syscall |
|
34 | .global memsetb |
36 | .global memsetb |
35 | .global memcpy |
37 | .global memcpy |
- | 38 | .global memcpy_from_uspace |
|
- | 39 | .global memcpy_to_uspace |
|
- | 40 | .global memcpy_from_uspace_failover_address |
|
- | 41 | .global memcpy_to_uspace_failover_address |
|
- | 42 | ||
- | 43 | userspace_asm: |
|
- | 44 | ||
- | 45 | # r3 = uspace_uarg |
|
- | 46 | # r4 = stack |
|
- | 47 | # r5 = entry |
|
- | 48 | ||
- | 49 | # disable interrupts |
|
- | 50 | ||
- | 51 | mfmsr r31 |
|
- | 52 | rlwinm r31, r31, 0, 17, 15 |
|
- | 53 | mtmsr r31 |
|
- | 54 | ||
- | 55 | # set entry point |
|
- | 56 | ||
- | 57 | mtsrr0 r5 |
|
- | 58 | ||
- | 59 | # set problem state, enable interrupts |
|
- | 60 | ||
- | 61 | ori r31, r31, msr_pr |
|
- | 62 | ori r31, r31, msr_ee |
|
- | 63 | mtsrr1 r31 |
|
- | 64 | ||
- | 65 | # set stack |
|
- | 66 | ||
- | 67 | mr sp, r4 |
|
- | 68 | ||
- | 69 | # jump to userspace |
|
- | 70 | ||
- | 71 | rfi |
|
36 | 72 | ||
37 | iret: |
73 | iret: |
38 | lwz r3, 144(sp) |
- | |
39 | mtxer r3 |
- | |
40 | 74 | ||
41 | lwz r3, 140(sp) |
75 | # disable interrupts |
42 | mtctr r3 |
- | |
43 | 76 | ||
- | 77 | mfmsr r31 |
|
- | 78 | rlwinm r31, r31, 0, 17, 15 |
|
- | 79 | mtmsr r31 |
|
- | 80 | ||
- | 81 | lwz r0, 8(sp) |
|
- | 82 | lwz r2, 12(sp) |
|
44 | lwz r3, 136(sp) |
83 | lwz r3, 16(sp) |
- | 84 | lwz r4, 20(sp) |
|
- | 85 | lwz r5, 24(sp) |
|
- | 86 | lwz r6, 28(sp) |
|
- | 87 | lwz r7, 32(sp) |
|
- | 88 | lwz r8, 36(sp) |
|
- | 89 | lwz r9, 40(sp) |
|
- | 90 | lwz r10, 44(sp) |
|
- | 91 | lwz r11, 48(sp) |
|
- | 92 | lwz r13, 52(sp) |
|
- | 93 | lwz r14, 56(sp) |
|
- | 94 | lwz r15, 60(sp) |
|
- | 95 | lwz r16, 64(sp) |
|
- | 96 | lwz r17, 68(sp) |
|
- | 97 | lwz r18, 72(sp) |
|
- | 98 | lwz r19, 76(sp) |
|
- | 99 | lwz r20, 80(sp) |
|
- | 100 | lwz r21, 84(sp) |
|
- | 101 | lwz r22, 88(sp) |
|
- | 102 | lwz r23, 92(sp) |
|
- | 103 | lwz r24, 96(sp) |
|
- | 104 | lwz r25, 100(sp) |
|
- | 105 | lwz r26, 104(sp) |
|
- | 106 | lwz r27, 108(sp) |
|
- | 107 | lwz r28, 112(sp) |
|
- | 108 | lwz r29, 116(sp) |
|
- | 109 | lwz r30, 120(sp) |
|
- | 110 | lwz r31, 124(sp) |
|
- | 111 | ||
- | 112 | lwz r12, 128(sp) |
|
45 | mtcr r3 |
113 | mtcr r12 |
- | 114 | ||
- | 115 | lwz r12, 132(sp) |
|
- | 116 | mtsrr0 r12 |
|
- | 117 | ||
- | 118 | lwz r12, 136(sp) |
|
- | 119 | mtsrr1 r12 |
|
- | 120 | ||
- | 121 | lwz r12, 140(sp) |
|
- | 122 | mtlr r12 |
|
46 | 123 | ||
47 | lwz r3, 132(sp) |
124 | lwz r12, 144(sp) |
48 | mtlr r3 |
125 | mtctr r12 |
49 | - | ||
50 | lwz r3, 128(sp) |
- | |
51 | mtspr srr1, r3 |
- | |
52 | - | ||
53 | lwz r3, 124(sp) |
- | |
54 | mtspr srr0, r3 |
- | |
55 | - | ||
56 | lwz r0, 0(sp) |
- | |
57 | lwz r2, 4(sp) |
- | |
58 | lwz r3, 8(sp) |
- | |
59 | lwz r4, 12(sp) |
- | |
60 | lwz r5, 16(sp) |
- | |
61 | lwz r6, 20(sp) |
- | |
62 | lwz r7, 24(sp) |
- | |
63 | lwz r8, 28(sp) |
- | |
64 | lwz r9, 32(sp) |
- | |
65 | lwz r10, 36(sp) |
- | |
66 | lwz r11, 40(sp) |
- | |
67 | lwz r12, 44(sp) |
- | |
68 | lwz r13, 48(sp) |
- | |
69 | lwz r14, 52(sp) |
- | |
70 | lwz r15, 56(sp) |
- | |
71 | lwz r16, 60(sp) |
- | |
72 | lwz r17, 64(sp) |
- | |
73 | lwz r18, 68(sp) |
- | |
74 | lwz r19, 72(sp) |
- | |
75 | lwz r20, 76(sp) |
- | |
76 | lwz r21, 80(sp) |
- | |
77 | lwz r22, 84(sp) |
- | |
78 | lwz r23, 88(sp) |
- | |
79 | lwz r24, 92(sp) |
- | |
80 | lwz r25, 96(sp) |
- | |
81 | lwz r26, 100(sp) |
- | |
82 | lwz r27, 104(sp) |
- | |
83 | lwz r28, 108(sp) |
- | |
84 | lwz r29, 112(sp) |
- | |
85 | lwz r30, 116(sp) |
- | |
86 | lwz r31, 120(sp) |
- | |
87 | 126 | ||
- | 127 | lwz r12, 148(sp) |
|
- | 128 | mtxer r12 |
|
- | 129 | ||
- | 130 | lwz r12, 152(sp) |
|
- | 131 | lwz sp, 156(sp) |
|
- | 132 | ||
- | 133 | rfi |
|
- | 134 | ||
- | 135 | iret_syscall: |
|
- | 136 | ||
- | 137 | # reset decrementer |
|
- | 138 | ||
- | 139 | li r31, 1000 |
|
- | 140 | mtdec r31 |
|
- | 141 | ||
- | 142 | # disable interrupts |
|
- | 143 | ||
88 | mfspr sp, sprg1 |
144 | mfmsr r31 |
- | 145 | rlwinm r31, r31, 0, 17, 15 |
|
- | 146 | mtmsr r31 |
|
- | 147 | ||
- | 148 | lwz r0, 8(sp) |
|
- | 149 | lwz r2, 12(sp) |
|
- | 150 | lwz r4, 20(sp) |
|
- | 151 | lwz r5, 24(sp) |
|
- | 152 | lwz r6, 28(sp) |
|
- | 153 | lwz r7, 32(sp) |
|
- | 154 | lwz r8, 36(sp) |
|
- | 155 | lwz r9, 40(sp) |
|
- | 156 | lwz r10, 44(sp) |
|
- | 157 | lwz r11, 48(sp) |
|
- | 158 | lwz r13, 52(sp) |
|
- | 159 | lwz r14, 56(sp) |
|
- | 160 | lwz r15, 60(sp) |
|
- | 161 | lwz r16, 64(sp) |
|
- | 162 | lwz r17, 68(sp) |
|
- | 163 | lwz r18, 72(sp) |
|
- | 164 | lwz r19, 76(sp) |
|
- | 165 | lwz r20, 80(sp) |
|
- | 166 | lwz r21, 84(sp) |
|
- | 167 | lwz r22, 88(sp) |
|
- | 168 | lwz r23, 92(sp) |
|
- | 169 | lwz r24, 96(sp) |
|
- | 170 | lwz r25, 100(sp) |
|
- | 171 | lwz r26, 104(sp) |
|
- | 172 | lwz r27, 108(sp) |
|
- | 173 | lwz r28, 112(sp) |
|
- | 174 | lwz r29, 116(sp) |
|
- | 175 | lwz r30, 120(sp) |
|
- | 176 | lwz r31, 124(sp) |
|
- | 177 | ||
- | 178 | lwz r12, 128(sp) |
|
- | 179 | mtcr r12 |
|
- | 180 | ||
- | 181 | lwz r12, 132(sp) |
|
- | 182 | mtsrr0 r12 |
|
- | 183 | ||
- | 184 | lwz r12, 136(sp) |
|
- | 185 | mtsrr1 r12 |
|
- | 186 | ||
- | 187 | lwz r12, 140(sp) |
|
- | 188 | mtlr r12 |
|
- | 189 | ||
- | 190 | lwz r12, 144(sp) |
|
- | 191 | mtctr r12 |
|
- | 192 | ||
- | 193 | lwz r12, 148(sp) |
|
- | 194 | mtxer r12 |
|
- | 195 | ||
- | 196 | lwz r12, 152(sp) |
|
- | 197 | lwz sp, 156(sp) |
|
89 | 198 | ||
90 | rfi |
199 | rfi |
91 | 200 | ||
92 | memsetb: |
201 | memsetb: |
93 | rlwimi r5, r5, 8, 16, 23 |
202 | rlwimi r5, r5, 8, 16, 23 |
94 | rlwimi r5, r5, 16, 0, 15 |
203 | rlwimi r5, r5, 16, 0, 15 |
95 | 204 | ||
96 | addi r14, r3, -4 |
205 | addi r14, r3, -4 |
97 | 206 | ||
98 | cmplwi 0, r4, 4 |
207 | cmplwi 0, r4, 4 |
99 | blt 7f |
208 | blt 7f |
100 | 209 | ||
101 | stwu r5, 4(r14) |
210 | stwu r5, 4(r14) |
102 | beqlr |
211 | beqlr |
103 | 212 | ||
104 | andi. r15, r14, 3 |
213 | andi. r15, r14, 3 |
105 | add r4, r15, r4 |
214 | add r4, r15, r4 |
106 | subf r14, r15, r14 |
215 | subf r14, r15, r14 |
107 | srwi r15, r4, 2 |
216 | srwi r15, r4, 2 |
108 | mtctr r15 |
217 | mtctr r15 |
109 | 218 | ||
110 | bdz 6f |
219 | bdz 6f |
111 | 220 | ||
112 | 1: |
221 | 1: |
113 | stwu r5, 4(r14) |
222 | stwu r5, 4(r14) |
114 | bdnz 1b |
223 | bdnz 1b |
115 | 224 | ||
116 | 6: |
225 | 6: |
117 | 226 | ||
118 | andi. r4, r4, 3 |
227 | andi. r4, r4, 3 |
119 | 228 | ||
120 | 7: |
229 | 7: |
121 | 230 | ||
122 | cmpwi 0, r4, 0 |
231 | cmpwi 0, r4, 0 |
123 | beqlr |
232 | beqlr |
124 | 233 | ||
125 | mtctr r4 |
234 | mtctr r4 |
126 | addi r6, r6, 3 |
235 | addi r6, r6, 3 |
127 | 236 | ||
128 | 8: |
237 | 8: |
129 | 238 | ||
130 | stbu r5, 1(r14) |
239 | stbu r5, 1(r14) |
131 | bdnz 8b |
240 | bdnz 8b |
132 | 241 | ||
133 | blr |
242 | blr |
134 | 243 | ||
135 | memcpy: |
244 | memcpy: |
- | 245 | memcpy_from_uspace: |
|
- | 246 | memcpy_to_uspace: |
|
- | 247 | ||
136 | srwi. r7, r5, 3 |
248 | srwi. r7, r5, 3 |
137 | addi r6, r3, -4 |
249 | addi r6, r3, -4 |
138 | addi r4, r4, -4 |
250 | addi r4, r4, -4 |
139 | beq 2f |
251 | beq 2f |
140 | 252 | ||
141 | andi. r0, r6, 3 |
253 | andi. r0, r6, 3 |
142 | mtctr r7 |
254 | mtctr r7 |
143 | bne 5f |
255 | bne 5f |
144 | 256 | ||
145 | 1: |
257 | 1: |
146 | 258 | ||
147 | lwz r7, 4(r4) |
259 | lwz r7, 4(r4) |
148 | lwzu r8, 8(r4) |
260 | lwzu r8, 8(r4) |
149 | stw r7, 4(r6) |
261 | stw r7, 4(r6) |
150 | stwu r8, 8(r6) |
262 | stwu r8, 8(r6) |
151 | bdnz 1b |
263 | bdnz 1b |
152 | 264 | ||
153 | andi. r5, r5, 7 |
265 | andi. r5, r5, 7 |
154 | 266 | ||
155 | 2: |
267 | 2: |
156 | 268 | ||
157 | cmplwi 0, r5, 4 |
269 | cmplwi 0, r5, 4 |
158 | blt 3f |
270 | blt 3f |
159 | 271 | ||
160 | lwzu r0, 4(r4) |
272 | lwzu r0, 4(r4) |
161 | addi r5, r5, -4 |
273 | addi r5, r5, -4 |
162 | stwu r0, 4(r6) |
274 | stwu r0, 4(r6) |
163 | 275 | ||
164 | 3: |
276 | 3: |
165 | 277 | ||
166 | cmpwi 0, r5, 0 |
278 | cmpwi 0, r5, 0 |
167 | beqlr |
279 | beqlr |
168 | mtctr r5 |
280 | mtctr r5 |
169 | addi r4, r4, 3 |
281 | addi r4, r4, 3 |
170 | addi r6, r6, 3 |
282 | addi r6, r6, 3 |
171 | 283 | ||
172 | 4: |
284 | 4: |
173 | 285 | ||
174 | lbzu r0, 1(r4) |
286 | lbzu r0, 1(r4) |
175 | stbu r0, 1(r6) |
287 | stbu r0, 1(r6) |
176 | bdnz 4b |
288 | bdnz 4b |
177 | blr |
289 | blr |
178 | 290 | ||
179 | 5: |
291 | 5: |
180 | 292 | ||
181 | subfic r0, r0, 4 |
293 | subfic r0, r0, 4 |
182 | mtctr r0 |
294 | mtctr r0 |
183 | 295 | ||
184 | 6: |
296 | 6: |
185 | 297 | ||
186 | lbz r7, 4(r4) |
298 | lbz r7, 4(r4) |
187 | addi r4, r4, 1 |
299 | addi r4, r4, 1 |
188 | stb r7, 4(r6) |
300 | stb r7, 4(r6) |
189 | addi r6, r6, 1 |
301 | addi r6, r6, 1 |
190 | bdnz 6b |
302 | bdnz 6b |
191 | subf r5, r0, r5 |
303 | subf r5, r0, r5 |
192 | rlwinm. r7, r5, 32-3, 3, 31 |
304 | rlwinm. r7, r5, 32-3, 3, 31 |
193 | beq 2b |
305 | beq 2b |
194 | mtctr r7 |
306 | mtctr r7 |
195 | b 1b |
307 | b 1b |
- | 308 | ||
- | 309 | memcpy_from_uspace_failover_address: |
|
- | 310 | memcpy_to_uspace_failover_address: |
|
- | 311 | b memcpy_from_uspace_failover_address |
|
196 | 312 |