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1 | /* |
1 | /* |
2 | * Copyright (C) 2003-2004 Jakub Jermar |
2 | * Copyright (C) 2003-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | 29 | ||
30 | #include <arch.h> |
30 | #include <arch.h> |
31 | #include <arch/cp0.h> |
31 | #include <arch/cp0.h> |
32 | #include <arch/exception.h> |
32 | #include <arch/exception.h> |
33 | #include <arch/asm.h> |
33 | #include <arch/asm.h> |
34 | #include <mm/as.h> |
34 | #include <mm/as.h> |
35 | 35 | ||
36 | #include <userspace.h> |
36 | #include <userspace.h> |
37 | #include <arch/console.h> |
37 | #include <arch/console.h> |
38 | #include <memstr.h> |
38 | #include <memstr.h> |
39 | #include <proc/thread.h> |
39 | #include <proc/thread.h> |
40 | #include <print.h> |
40 | #include <print.h> |
41 | 41 | ||
42 | #include <arch/interrupt.h> |
42 | #include <arch/interrupt.h> |
43 | #include <arch/drivers/arc.h> |
43 | #include <arch/drivers/arc.h> |
44 | #include <console/chardev.h> |
44 | #include <console/chardev.h> |
45 | #include <arch/debugger.h> |
45 | #include <arch/debugger.h> |
46 | 46 | ||
47 | #include <arch/asm/regname.h> |
47 | #include <arch/asm/regname.h> |
48 | 48 | ||
49 | /* Size of the code jumping to the exception handler code |
49 | /* Size of the code jumping to the exception handler code |
50 | * - J+NOP |
50 | * - J+NOP |
51 | */ |
51 | */ |
52 | #define EXCEPTION_JUMP_SIZE 8 |
52 | #define EXCEPTION_JUMP_SIZE 8 |
53 | 53 | ||
54 | #define TLB_EXC ((char *) 0x80000000) |
54 | #define TLB_EXC ((char *) 0x80000000) |
55 | #define NORM_EXC ((char *) 0x80000180) |
55 | #define NORM_EXC ((char *) 0x80000180) |
56 | #define CACHE_EXC ((char *) 0x80000100) |
56 | #define CACHE_EXC ((char *) 0x80000100) |
57 | 57 | ||
58 | void arch_pre_mm_init(void) |
58 | void arch_pre_mm_init(void) |
59 | { |
59 | { |
60 | /* It is not assumed by default */ |
60 | /* It is not assumed by default */ |
61 | interrupts_disable(); |
61 | interrupts_disable(); |
62 | 62 | ||
63 | /* Initialize dispatch table */ |
63 | /* Initialize dispatch table */ |
64 | exception_init(); |
64 | exception_init(); |
65 | interrupt_init(); |
65 | interrupt_init(); |
66 | 66 | ||
67 | arc_init(); |
67 | arc_init(); |
68 | 68 | ||
69 | /* Copy the exception vectors to the right places */ |
69 | /* Copy the exception vectors to the right places */ |
70 | memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
70 | memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
71 | memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE); |
71 | memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE); |
72 | memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE); |
72 | memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE); |
73 | 73 | ||
74 | /* |
74 | /* |
75 | * Switch to BEV normal level so that exception vectors point to the kernel. |
75 | * Switch to BEV normal level so that exception vectors point to the kernel. |
76 | * Clear the error level. |
76 | * Clear the error level. |
77 | */ |
77 | */ |
78 | cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit)); |
78 | cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit)); |
79 | 79 | ||
80 | /* |
80 | /* |
81 | * Mask all interrupts |
81 | * Mask all interrupts |
82 | */ |
82 | */ |
83 | cp0_mask_all_int(); |
83 | cp0_mask_all_int(); |
84 | /* |
84 | /* |
85 | * Unmask hardware clock interrupt. |
85 | * Unmask hardware clock interrupt. |
86 | */ |
86 | */ |
87 | cp0_unmask_int(TIMER_IRQ); |
87 | cp0_unmask_int(TIMER_IRQ); |
88 | 88 | ||
89 | /* |
89 | /* |
90 | * Start hardware clock. |
90 | * Start hardware clock. |
91 | */ |
91 | */ |
92 | cp0_compare_write(cp0_compare_value + cp0_count_read()); |
92 | cp0_compare_write(cp0_compare_value + cp0_count_read()); |
93 | 93 | ||
94 | console_init(); |
94 | console_init(); |
95 | debugger_init(); |
95 | debugger_init(); |
96 | 96 | ||
97 | /* Setup usermode */ |
97 | /* Setup usermode */ |
98 | init.cnt = 1; |
98 | init.cnt = 1; |
99 | init.tasks[0].addr = INIT_ADDRESS; |
99 | init.tasks[0].addr = INIT_ADDRESS; |
100 | init.tasks[0].size = INIT_SIZE; |
100 | init.tasks[0].size = INIT_SIZE; |
101 | } |
101 | } |
102 | 102 | ||
103 | void arch_post_mm_init(void) |
103 | void arch_post_mm_init(void) |
104 | { |
104 | { |
105 | } |
105 | } |
106 | 106 | ||
107 | void arch_pre_smp_init(void) |
107 | void arch_pre_smp_init(void) |
108 | { |
108 | { |
109 | } |
109 | } |
110 | 110 | ||
111 | void arch_post_smp_init(void) |
111 | void arch_post_smp_init(void) |
112 | { |
112 | { |
113 | } |
113 | } |
114 | 114 | ||
115 | /* Stack pointer saved when entering user mode */ |
115 | /* Stack pointer saved when entering user mode */ |
116 | /* TODO: How do we do it on SMP system???? */ |
116 | /* TODO: How do we do it on SMP system???? */ |
117 | 117 | ||
118 | /* Why the linker moves the variable 64K away in assembler |
118 | /* Why the linker moves the variable 64K away in assembler |
119 | * when not in .text section ???????? |
119 | * when not in .text section ???????? |
120 | */ |
120 | */ |
121 | __address supervisor_sp __attribute__ ((section (".text"))); |
121 | __address supervisor_sp __attribute__ ((section (".text"))); |
122 | 122 | ||
123 | void userspace(__address entry) |
123 | void userspace(uspace_arg_t *uarg) |
124 | { |
124 | { |
125 | /* EXL=1, UM=1, IE=1 */ |
125 | /* EXL=1, UM=1, IE=1 */ |
126 | cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
126 | cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
127 | cp0_status_um_bit | |
127 | cp0_status_um_bit | |
128 | cp0_status_ie_enabled_bit)); |
128 | cp0_status_ie_enabled_bit)); |
129 | cp0_epc_write(entry); |
129 | cp0_epc_write(uarg->uspace_entry); |
130 | userspace_asm(USTACK_ADDRESS+PAGE_SIZE); |
130 | userspace_asm(uarg->uspace_stack+PAGE_SIZE); |
131 | while (1) |
131 | while (1) |
132 | ; |
132 | ; |
133 | } |
133 | } |
134 | 134 | ||
135 | void before_thread_runs_arch(void) |
135 | void before_thread_runs_arch(void) |
136 | { |
136 | { |
137 | supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; |
137 | supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; |
138 | } |
138 | } |
139 | 139 | ||
140 | void after_thread_ran_arch(void) |
140 | void after_thread_ran_arch(void) |
141 | { |
141 | { |
142 | } |
142 | } |
143 | 143 |