Rev 1187 | Rev 1332 | Go to most recent revision | Only display areas with differences | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 1187 | Rev 1222 | ||
---|---|---|---|
1 | /* |
1 | /* |
2 | * Copyright (C) 2003-2004 Jakub Jermar |
2 | * Copyright (C) 2003-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | 29 | ||
30 | #include <arch.h> |
30 | #include <arch.h> |
31 | #include <arch/cp0.h> |
31 | #include <arch/cp0.h> |
32 | #include <arch/exception.h> |
32 | #include <arch/exception.h> |
33 | #include <arch/asm.h> |
33 | #include <arch/asm.h> |
34 | #include <mm/as.h> |
34 | #include <mm/as.h> |
35 | 35 | ||
36 | #include <userspace.h> |
36 | #include <userspace.h> |
37 | #include <arch/console.h> |
37 | #include <arch/console.h> |
38 | #include <memstr.h> |
38 | #include <memstr.h> |
39 | #include <proc/thread.h> |
39 | #include <proc/thread.h> |
40 | #include <proc/uarg.h> |
40 | #include <proc/uarg.h> |
41 | #include <print.h> |
41 | #include <print.h> |
42 | #include <syscall/syscall.h> |
42 | #include <syscall/syscall.h> |
43 | 43 | ||
44 | #include <arch/interrupt.h> |
44 | #include <arch/interrupt.h> |
45 | #include <arch/drivers/arc.h> |
45 | #include <arch/drivers/arc.h> |
46 | #include <console/chardev.h> |
46 | #include <console/chardev.h> |
47 | #include <arch/debugger.h> |
47 | #include <arch/debugger.h> |
48 | 48 | ||
49 | #include <arch/asm/regname.h> |
49 | #include <arch/asm/regname.h> |
50 | 50 | ||
51 | /* Size of the code jumping to the exception handler code |
51 | /* Size of the code jumping to the exception handler code |
52 | * - J+NOP |
52 | * - J+NOP |
53 | */ |
53 | */ |
54 | #define EXCEPTION_JUMP_SIZE 8 |
54 | #define EXCEPTION_JUMP_SIZE 8 |
55 | 55 | ||
56 | #define TLB_EXC ((char *) 0x80000000) |
56 | #define TLB_EXC ((char *) 0x80000000) |
57 | #define NORM_EXC ((char *) 0x80000180) |
57 | #define NORM_EXC ((char *) 0x80000180) |
58 | #define CACHE_EXC ((char *) 0x80000100) |
58 | #define CACHE_EXC ((char *) 0x80000100) |
59 | 59 | ||
- | 60 | void arch_pre_main(void) |
|
- | 61 | { |
|
- | 62 | /* Setup usermode */ |
|
- | 63 | init.cnt = 1; |
|
- | 64 | init.tasks[0].addr = INIT_ADDRESS; |
|
- | 65 | init.tasks[0].size = INIT_SIZE; |
|
- | 66 | } |
|
- | 67 | ||
60 | void arch_pre_mm_init(void) |
68 | void arch_pre_mm_init(void) |
61 | { |
69 | { |
62 | /* It is not assumed by default */ |
70 | /* It is not assumed by default */ |
63 | interrupts_disable(); |
71 | interrupts_disable(); |
64 | 72 | ||
65 | /* Initialize dispatch table */ |
73 | /* Initialize dispatch table */ |
66 | exception_init(); |
74 | exception_init(); |
67 | interrupt_init(); |
75 | interrupt_init(); |
68 | 76 | ||
69 | arc_init(); |
77 | arc_init(); |
70 | 78 | ||
71 | /* Copy the exception vectors to the right places */ |
79 | /* Copy the exception vectors to the right places */ |
72 | memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
80 | memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
73 | memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE); |
81 | memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE); |
74 | memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE); |
82 | memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE); |
75 | 83 | ||
76 | /* |
84 | /* |
77 | * Switch to BEV normal level so that exception vectors point to the kernel. |
85 | * Switch to BEV normal level so that exception vectors point to the kernel. |
78 | * Clear the error level. |
86 | * Clear the error level. |
79 | */ |
87 | */ |
80 | cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit)); |
88 | cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit)); |
81 | 89 | ||
82 | /* |
90 | /* |
83 | * Mask all interrupts |
91 | * Mask all interrupts |
84 | */ |
92 | */ |
85 | cp0_mask_all_int(); |
93 | cp0_mask_all_int(); |
86 | /* |
94 | /* |
87 | * Unmask hardware clock interrupt. |
95 | * Unmask hardware clock interrupt. |
88 | */ |
96 | */ |
89 | cp0_unmask_int(TIMER_IRQ); |
97 | cp0_unmask_int(TIMER_IRQ); |
90 | 98 | ||
91 | /* |
99 | /* |
92 | * Start hardware clock. |
100 | * Start hardware clock. |
93 | */ |
101 | */ |
94 | cp0_compare_write(cp0_compare_value + cp0_count_read()); |
102 | cp0_compare_write(cp0_compare_value + cp0_count_read()); |
95 | 103 | ||
96 | console_init(); |
104 | console_init(); |
97 | debugger_init(); |
105 | debugger_init(); |
98 | - | ||
99 | /* Setup usermode */ |
- | |
100 | init.cnt = 1; |
- | |
101 | init.tasks[0].addr = INIT_ADDRESS; |
- | |
102 | init.tasks[0].size = INIT_SIZE; |
- | |
103 | } |
106 | } |
104 | 107 | ||
105 | void arch_post_mm_init(void) |
108 | void arch_post_mm_init(void) |
106 | { |
109 | { |
107 | } |
110 | } |
108 | 111 | ||
109 | void arch_pre_smp_init(void) |
112 | void arch_pre_smp_init(void) |
110 | { |
113 | { |
111 | } |
114 | } |
112 | 115 | ||
113 | void arch_post_smp_init(void) |
116 | void arch_post_smp_init(void) |
114 | { |
117 | { |
115 | } |
118 | } |
116 | 119 | ||
117 | /* Stack pointer saved when entering user mode */ |
120 | /* Stack pointer saved when entering user mode */ |
118 | /* TODO: How do we do it on SMP system???? */ |
121 | /* TODO: How do we do it on SMP system???? */ |
119 | 122 | ||
120 | /* Why the linker moves the variable 64K away in assembler |
123 | /* Why the linker moves the variable 64K away in assembler |
121 | * when not in .text section ???????? |
124 | * when not in .text section ???????? |
122 | */ |
125 | */ |
123 | __address supervisor_sp __attribute__ ((section (".text"))); |
126 | __address supervisor_sp __attribute__ ((section (".text"))); |
124 | 127 | ||
125 | void userspace(uspace_arg_t *kernel_uarg) |
128 | void userspace(uspace_arg_t *kernel_uarg) |
126 | { |
129 | { |
127 | /* EXL=1, UM=1, IE=1 */ |
130 | /* EXL=1, UM=1, IE=1 */ |
128 | cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
131 | cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
129 | cp0_status_um_bit | |
132 | cp0_status_um_bit | |
130 | cp0_status_ie_enabled_bit)); |
133 | cp0_status_ie_enabled_bit)); |
131 | cp0_epc_write((__address) kernel_uarg->uspace_entry); |
134 | cp0_epc_write((__address) kernel_uarg->uspace_entry); |
132 | userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE), |
135 | userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE), |
133 | (__address) kernel_uarg->uspace_uarg, |
136 | (__address) kernel_uarg->uspace_uarg, |
134 | (__address) kernel_uarg->uspace_entry); |
137 | (__address) kernel_uarg->uspace_entry); |
135 | while (1) |
138 | while (1) |
136 | ; |
139 | ; |
137 | } |
140 | } |
138 | 141 | ||
139 | /** Perform mips32 specific tasks needed before the new task is run. */ |
142 | /** Perform mips32 specific tasks needed before the new task is run. */ |
140 | void before_task_runs_arch(void) |
143 | void before_task_runs_arch(void) |
141 | { |
144 | { |
142 | } |
145 | } |
143 | 146 | ||
144 | /** Perform mips32 specific tasks needed before the new thread is scheduled. */ |
147 | /** Perform mips32 specific tasks needed before the new thread is scheduled. */ |
145 | void before_thread_runs_arch(void) |
148 | void before_thread_runs_arch(void) |
146 | { |
149 | { |
147 | supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; |
150 | supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; |
148 | } |
151 | } |
149 | 152 | ||
150 | void after_thread_ran_arch(void) |
153 | void after_thread_ran_arch(void) |
151 | { |
154 | { |
152 | } |
155 | } |
153 | 156 | ||
154 | /** Set thread-local-storage pointer |
157 | /** Set thread-local-storage pointer |
155 | * |
158 | * |
156 | * We have it currently in K1, it is |
159 | * We have it currently in K1, it is |
157 | * possible to have it separately in the future. |
160 | * possible to have it separately in the future. |
158 | */ |
161 | */ |
159 | __native sys_tls_set(__native addr) |
162 | __native sys_tls_set(__native addr) |
160 | { |
163 | { |
161 | return 0; |
164 | return 0; |
162 | } |
165 | } |
163 | 166 |