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1 | # |
1 | # |
2 | # Copyright (C) 2005 Jakub Jermar |
2 | # Copyright (C) 2005 Jakub Jermar |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | #include <arch/register.h> |
29 | #include <arch/register.h> |
30 | 30 | ||
31 | .text |
31 | .text |
32 | 32 | ||
33 | /** Copy memory from/to userspace. |
33 | /** Copy memory from/to userspace. |
34 | * |
34 | * |
- | 35 | * This memcpy() has been taken from the assembler output of |
|
- | 36 | * the generic _memcpy() and modified to have the failover part. |
|
- | 37 | * |
|
35 | * @param in0 Destination address. |
38 | * @param in0 Destination address. |
36 | * @param in1 Source address. |
39 | * @param in1 Source address. |
37 | * @param in2 Number of byte to copy. |
40 | * @param in2 Number of byte to copy. |
38 | */ |
41 | */ |
39 | .global memcpy |
42 | .global memcpy |
40 | .global memcpy_from_uspace |
43 | .global memcpy_from_uspace |
41 | .global memcpy_to_uspace |
44 | .global memcpy_to_uspace |
42 | .global memcpy_from_uspace_failover_address |
45 | .global memcpy_from_uspace_failover_address |
43 | .global memcpy_to_uspace_failover_address |
46 | .global memcpy_to_uspace_failover_address |
44 | memcpy: |
47 | memcpy: |
45 | memcpy_from_uspace: |
48 | memcpy_from_uspace: |
46 | memcpy_to_uspace: |
49 | memcpy_to_uspace: |
- | 50 | alloc loc0 = ar.pfs, 3, 1, 0, 0 |
|
- | 51 | ||
- | 52 | shr.u r18 = in2, 3 |
|
- | 53 | mov r8 = in1 ;; /* prepare to return in1 on success */ |
|
- | 54 | cmp.ne p6, p7 = 0, r18 ;; |
|
- | 55 | (p7) mov r17 = r0 |
|
- | 56 | (p7) br.cond.dptk 1f ;; |
|
47 | br _memcpy |
57 | mov r16 = r0 |
- | 58 | mov r17 = r0 ;; |
|
- | 59 | ||
- | 60 | 0: |
|
- | 61 | shladd r14 = r17, 3, r0 |
|
- | 62 | adds r16 = 1, r16 ;; |
|
- | 63 | add r15 = r14, r8 |
|
- | 64 | sxt4 r17 = r16 |
|
- | 65 | add r14 = r14, in0 ;; |
|
- | 66 | ld8 r15 = [r15] |
|
- | 67 | cmp.gtu p6, p7 = r18, r17 ;; |
|
- | 68 | st8 [r14] = r15 |
|
- | 69 | (p6) br.cond.dptk 0b |
|
- | 70 | ||
- | 71 | 1: |
|
- | 72 | and in2 = 7, in2 ;; |
|
- | 73 | cmp.eq p6, p7 = 0, in2 ;; |
|
- | 74 | (p6) mov ar.pfs = loc0 |
|
- | 75 | (p6) br.ret.dptk.many rp |
|
- | 76 | shladd r14 = r17, 3, r0 |
|
- | 77 | mov r16 = r0 |
|
- | 78 | mov r17 = r0 ;; |
|
- | 79 | add in0 = in0, r14 |
|
- | 80 | add r18 = r8, r14 ;; |
|
- | 81 | ||
- | 82 | 2: |
|
- | 83 | add r14 = r16, r18 |
|
- | 84 | adds r17 = 1, r17 |
|
- | 85 | add r15 = in0, r16 ;; |
|
- | 86 | ld1 r14 = [r14] |
|
- | 87 | sxt4 r16 = r17 ;; |
|
- | 88 | st1 [r15] = r14 |
|
- | 89 | cmp.gtu p6, p7 = in2, r16 |
|
- | 90 | (p6) br.cond.dptk 2b |
|
- | 91 | ||
- | 92 | mov ar.pfs = loc0 |
|
- | 93 | br.ret.sptk.many rp |
|
48 | 94 | ||
49 | memcpy_from_uspace_failover_address: |
95 | memcpy_from_uspace_failover_address: |
50 | memcpy_to_uspace_failover_address: |
96 | memcpy_to_uspace_failover_address: |
51 | br memcpy_from_uspace_failover_address |
97 | mov r8 = r0 /* return 0 on failure */ |
- | 98 | mov ar.pfs = loc0 |
|
- | 99 | br.ret.sptk.many rp |
|
52 | 100 | ||
53 | .global memsetb |
101 | .global memsetb |
54 | memsetb: |
102 | memsetb: |
55 | br _memsetb |
103 | br _memsetb |
56 | 104 | ||
57 | .global cpu_halt |
105 | .global cpu_halt |
58 | cpu_halt: |
106 | cpu_halt: |
59 | br cpu_halt |
107 | br cpu_halt |
60 | 108 | ||
61 | .global panic_printf |
109 | .global panic_printf |
62 | panic_printf: |
110 | panic_printf: |
63 | { |
111 | { |
64 | br.call.sptk.many b0=printf |
112 | br.call.sptk.many b0=printf |
65 | } |
113 | } |
66 | br halt |
114 | br halt |
67 | 115 | ||
68 | /** Switch to userspace - low level code. |
116 | /** Switch to userspace - low level code. |
69 | * |
117 | * |
70 | * @param in0 Userspace entry point address. |
118 | * @param in0 Userspace entry point address. |
71 | * @param in1 Userspace stack pointer address. |
119 | * @param in1 Userspace stack pointer address. |
72 | * @param in2 Userspace register stack pointer address. |
120 | * @param in2 Userspace register stack pointer address. |
73 | * @param in3 Userspace address of thread uspace_arg_t structure. |
121 | * @param in3 Userspace address of thread uspace_arg_t structure. |
74 | * @param in4 Value to be stored in IPSR. |
122 | * @param in4 Value to be stored in IPSR. |
75 | * @param in5 Value to be stored in RSC. |
123 | * @param in5 Value to be stored in RSC. |
76 | */ |
124 | */ |
77 | .global switch_to_userspace |
125 | .global switch_to_userspace |
78 | switch_to_userspace: |
126 | switch_to_userspace: |
79 | alloc loc0 = ar.pfs, 6, 3, 0, 0 |
127 | alloc loc0 = ar.pfs, 6, 3, 0, 0 |
80 | rsm (PSR_IC_MASK | PSR_I_MASK) /* disable interruption collection and interrupts */ |
128 | rsm (PSR_IC_MASK | PSR_I_MASK) /* disable interruption collection and interrupts */ |
81 | srlz.d ;; |
129 | srlz.d ;; |
82 | srlz.i ;; |
130 | srlz.i ;; |
83 | 131 | ||
84 | mov cr.ipsr = in4 |
132 | mov cr.ipsr = in4 |
85 | mov cr.iip = in0 |
133 | mov cr.iip = in0 |
86 | mov r12 = in1 |
134 | mov r12 = in1 |
87 | 135 | ||
88 | xor r1 = r1, r1 |
136 | xor r1 = r1, r1 |
89 | 137 | ||
90 | mov loc1 = cr.ifs |
138 | mov loc1 = cr.ifs |
91 | movl loc2 = PFM_MASK ;; |
139 | movl loc2 = PFM_MASK ;; |
92 | and loc1 = loc2, loc1 ;; |
140 | and loc1 = loc2, loc1 ;; |
93 | mov cr.ifs = loc1 ;; /* prevent decrementing BSP by rfi */ |
141 | mov cr.ifs = loc1 ;; /* prevent decrementing BSP by rfi */ |
94 | 142 | ||
95 | invala |
143 | invala |
96 | 144 | ||
97 | mov loc1 = ar.rsc ;; |
145 | mov loc1 = ar.rsc ;; |
98 | and loc1 = ~3, loc1 ;; |
146 | and loc1 = ~3, loc1 ;; |
99 | mov ar.rsc = loc1 ;; /* put RSE into enforced lazy mode */ |
147 | mov ar.rsc = loc1 ;; /* put RSE into enforced lazy mode */ |
100 | 148 | ||
101 | flushrs ;; |
149 | flushrs ;; |
102 | 150 | ||
103 | mov ar.bspstore = in2 ;; |
151 | mov ar.bspstore = in2 ;; |
104 | mov ar.rsc = in5 ;; |
152 | mov ar.rsc = in5 ;; |
105 | 153 | ||
106 | mov r8 = in3 |
154 | mov r8 = in3 |
107 | 155 | ||
108 | rfi ;; |
156 | rfi ;; |
109 | 157 | ||
110 | 158 | ||
111 |
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159 |
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112 | 160 | ||
113 | 161 | ||
114 | 162 |