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1 | # |
1 | # |
2 | # Copyright (C) 2005 Jakub Jermar |
2 | # Copyright (C) 2005 Jakub Jermar |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | #include <arch/register.h> |
29 | #include <arch/register.h> |
30 | 30 | ||
31 | .text |
31 | .text |
32 | 32 | ||
33 | .global memcpy |
33 | .global memcpy |
34 | memcpy: |
34 | memcpy: |
35 | br _memcpy |
35 | br _memcpy |
36 | 36 | ||
37 | .global memsetb |
37 | .global memsetb |
38 | memsetb: |
38 | memsetb: |
39 | br _memsetb |
39 | br _memsetb |
40 | 40 | ||
41 | .global cpu_halt |
41 | .global cpu_halt |
42 | cpu_halt: |
42 | cpu_halt: |
43 | br cpu_halt |
43 | br cpu_halt |
44 | 44 | ||
45 | .global panic_printf |
45 | .global panic_printf |
46 | panic_printf: |
46 | panic_printf: |
47 | { |
47 | { |
48 | br.call.sptk.many b0=printf |
48 | br.call.sptk.many b0=printf |
49 | } |
49 | } |
50 | br halt |
50 | br halt |
51 | 51 | ||
52 | /** Switch to userspace - low level code. |
52 | /** Switch to userspace - low level code. |
53 | * |
53 | * |
54 | * @param in0 Userspace entry point address. |
54 | * @param in0 Userspace entry point address. |
55 | * @param in1 Userspace stack pointer address. |
55 | * @param in1 Userspace stack pointer address. |
56 | * @param in2 Userspace register stack pointer address. |
56 | * @param in2 Userspace register stack pointer address. |
- | 57 | * @param in3 Userspace address of thread uspace_arg_t structure. |
|
57 | * @param in3 Value to be stored in IPSR. |
58 | * @param in4 Value to be stored in IPSR. |
58 | * @param in4 Value to be stored in RSC. |
59 | * @param in5 Value to be stored in RSC. |
59 | */ |
60 | */ |
60 | .global switch_to_userspace |
61 | .global switch_to_userspace |
61 | switch_to_userspace: |
62 | switch_to_userspace: |
62 | alloc loc0 = ar.pfs, 5, 3, 0, 0 |
63 | alloc loc0 = ar.pfs, 6, 3, 0, 0 |
63 | rsm (PSR_IC_MASK | PSR_I_MASK) /* disable interruption collection and interrupts */ |
64 | rsm (PSR_IC_MASK | PSR_I_MASK) /* disable interruption collection and interrupts */ |
64 | srlz.d ;; |
65 | srlz.d ;; |
65 | srlz.i ;; |
66 | srlz.i ;; |
66 | 67 | ||
67 | mov cr.ipsr = in3 |
68 | mov cr.ipsr = in4 |
68 | mov cr.iip = in0 |
69 | mov cr.iip = in0 |
69 | mov r12 = in1 |
70 | mov r12 = in1 |
70 | 71 | ||
71 | xor r1 = r1, r1 |
72 | xor r1 = r1, r1 |
72 | 73 | ||
73 | mov loc1 = cr.ifs |
74 | mov loc1 = cr.ifs |
74 | movl loc2 = PFM_MASK ;; |
75 | movl loc2 = PFM_MASK ;; |
75 | and loc1 = loc2, loc1 ;; |
76 | and loc1 = loc2, loc1 ;; |
76 | mov cr.ifs = loc1 ;; /* prevent decrementing BSP by rfi */ |
77 | mov cr.ifs = loc1 ;; /* prevent decrementing BSP by rfi */ |
77 | 78 | ||
78 | invala |
79 | invala |
79 | 80 | ||
80 | mov loc1 = ar.rsc ;; |
81 | mov loc1 = ar.rsc ;; |
81 | and loc1 = ~3, loc1 ;; |
82 | and loc1 = ~3, loc1 ;; |
82 | mov ar.rsc = loc1 ;; /* put RSE into enforced lazy mode */ |
83 | mov ar.rsc = loc1 ;; /* put RSE into enforced lazy mode */ |
83 | 84 | ||
84 | flushrs ;; |
85 | flushrs ;; |
85 | 86 | ||
86 | mov ar.bspstore = in2 ;; |
87 | mov ar.bspstore = in2 ;; |
87 | mov ar.rsc = in4 ;; |
88 | mov ar.rsc = in5 ;; |
- | 89 | ||
- | 90 | mov r8 = in3 |
|
88 | 91 | ||
89 | rfi ;; |
92 | rfi ;; |
90 | 93 | ||
91 | 94 | ||
92 |
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95 |
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93 | 96 | ||
94 | 97 | ||
95 | 98 |