WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia64/include/mm/page.h


/*
 * Copyright (C) 2005 - 2006 Jakub Jermar
 * Copyright (C) 2006 Jakub Vana
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef __ia64_PAGE_H__
#define __ia64_PAGE_H__
 
#include <arch/mm/frame.h>
#include <genarch/mm/page_ht.h>
#include <arch/mm/asid.h>
#include <arch/types.h>
#include <typedefs.h>
#include <debug.h>
 
#define PAGE_SIZE   FRAME_SIZE
#define PAGE_WIDTH  FRAME_WIDTH
 
#define KA2PA(x)    ((__address) (x))
#define PA2KA(x)    ((__address) (x))
 
#define SET_PTL0_ADDRESS_ARCH(x)    /**< To be removed as situation permits. */
 
#define PPN_SHIFT           12
 
#define VRN_SHIFT           61
#define VRN_MASK            (7LL << VRN_SHIFT)
#define VRN_KERNEL          0
#define REGION_REGISTERS        8
 
#define VHPT_WIDTH          20          /* 1M */
#define VHPT_SIZE           (1 << VHPT_WIDTH)
#define VHPT_BASE           0       /* Must be aligned to VHPT_SIZE */
 
#define PTA_BASE_SHIFT          15
 
/** Memory Attributes. */
#define MA_WRITEBACK    0x0
#define MA_UNCACHEABLE  0x4
 
/** Privilege Levels. Only the most and the least privileged ones are ever used. */
#define PL_KERNEL   0x0
#define PL_USER     0x3
 
/* Access Rigths. Only certain combinations are used by the kernel. */
#define AR_READ     0x0
#define AR_EXECUTE  0x1
#define AR_WRITE    0x2
 
 
#define VA_REGION_INDEX 61
 
#define VA_REGION(va) (va>>VA_REGION_INDEX)
 
 
 
struct vhpt_tag_info {
    unsigned long long tag : 63;
    unsigned ti : 1;
} __attribute__ ((packed));
 
union vhpt_tag {
    struct vhpt_tag_info tag_info;
    unsigned tag_word;
};
 
struct vhpt_entry_present {
    /* Word 0 */
    unsigned p : 1;
    unsigned : 1;
    unsigned ma : 3;
    unsigned a : 1;
    unsigned d : 1;
    unsigned pl : 2;
    unsigned ar : 3;
    unsigned long long ppn : 38;
    unsigned : 2;
    unsigned ed : 1;
    unsigned ig1 : 11;
   
    /* Word 1 */
    unsigned : 2;
    unsigned ps : 6;
    unsigned key : 24;
    unsigned : 32;
   
    /* Word 2 */
    union vhpt_tag tag;
   
    /* Word 3 */                                                   
    __u64 ig3 : 64;
} __attribute__ ((packed));
 
struct vhpt_entry_not_present {
    /* Word 0 */
    unsigned p : 1;
    unsigned long long ig0 : 52;
    unsigned ig1 : 11;
   
    /* Word 1 */
    unsigned : 2;
    unsigned ps : 6;
    unsigned long long ig2 : 56;
 
    /* Word 2 */
    union vhpt_tag tag;
   
    /* Word 3 */                                                   
    __u64 ig3 : 64;
} __attribute__ ((packed));
 
typedef union vhpt_entry {
    struct vhpt_entry_present present;
    struct vhpt_entry_not_present not_present;
    __u64 word[4];
} vhpt_entry_t;
 
typedef vhpt_entry_t tlb_entry_t;
 
struct region_register_map {
    unsigned ve : 1;
    unsigned : 1;
    unsigned ps : 6;
    unsigned rid : 24;
    unsigned : 32;
} __attribute__ ((packed));
 
typedef union region_register {
    struct region_register_map map;
    unsigned long long word;
} region_register;
 
struct pta_register_map {
    unsigned ve : 1;
    unsigned : 1;
    unsigned size : 6;
    unsigned vf : 1;
    unsigned : 6;
    unsigned long long base : 49;
} __attribute__ ((packed));
 
typedef union pta_register {
    struct pta_register_map map;
    __u64 word;
} pta_register;
 
/** Return Translation Hashed Entry Address.
 *
 * VRN bits are used to read RID (ASID) from one
 * of the eight region registers registers.
 *
 * @param va Virtual address including VRN bits.
 *
 * @return Address of the head of VHPT collision chain.
 */
static inline __u64 thash(__u64 va)
{
    __u64 ret;
 
    __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
 
    return ret;
}
 
/** Return Translation Hashed Entry Tag.
 *
 * VRN bits are used to read RID (ASID) from one
 * of the eight region registers.
 *
 * @param va Virtual address including VRN bits.
 *
 * @return The unique tag for VPN and RID in the collision chain returned by thash().
 */
static inline __u64 ttag(__u64 va)
{
    __u64 ret;
 
    __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
 
    return ret;
}
 
/** Read Region Register.
 *
 * @param i Region register index.
 *
 * @return Current contents of rr[i].
 */
static inline __u64 rr_read(index_t i)
{
    __u64 ret;
   
    ASSERT(i < REGION_REGISTERS);
    __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i));
   
    return ret;
}
 
 
/** Write Region Register.
 *
 * @param i Region register index.
 * @param v Value to be written to rr[i].
 */
static inline void rr_write(index_t i, __u64 v)
{
    ASSERT(i < REGION_REGISTERS);
    __asm__ volatile (
    "mov rr[%0] = %1;;\n"
 
    :
    : "r" (i), "r" (v));
}
 
/** Read Page Table Register.
 *
 * @return Current value stored in PTA.
 */
static inline __u64 pta_read(void)
{
    __u64 ret;
   
    __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
   
    return ret;
}
 
/** Write Page Table Register.
 *
 * @param v New value to be stored in PTA.
 */
static inline void pta_write(__u64 v)
{
    __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
}
 
extern void page_arch_init(void);
 
extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);
extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);
extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
 
#endif
 

Rev 818	Rev 819
1	/*	1	/*
2	* Copyright (C) 2005 - 2006 Jakub Jermar	2	* Copyright (C) 2005 - 2006 Jakub Jermar
3	* Copyright (C) 2006 Jakub Vana	3	* Copyright (C) 2006 Jakub Vana
4	* All rights reserved.	4	* All rights reserved.
5	*	5	*
6	* Redistribution and use in source and binary forms, with or without	6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions	7	* modification, are permitted provided that the following conditions
8	* are met:	8	* are met:
9	*	9	*
10	* - Redistributions of source code must retain the above copyright	10	* - Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.	11	* notice, this list of conditions and the following disclaimer.
12	* - Redistributions in binary form must reproduce the above copyright	12	* - Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the	13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.	14	* documentation and/or other materials provided with the distribution.
15	* - The name of the author may not be used to endorse or promote products	15	* - The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.	16	* derived from this software without specific prior written permission.
17	*	17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	*/	28	*/
29		29
30	#ifndef __ia64_PAGE_H__	30	#ifndef __ia64_PAGE_H__
31	#define __ia64_PAGE_H__	31	#define __ia64_PAGE_H__
32		32
33	#include <arch/mm/frame.h>	33	#include <arch/mm/frame.h>
34	#include <genarch/mm/page_ht.h>	34	#include <genarch/mm/page_ht.h>
35	#include <arch/mm/asid.h>	35	#include <arch/mm/asid.h>
36	#include <arch/types.h>	36	#include <arch/types.h>
37	#include <typedefs.h>	37	#include <typedefs.h>
38	#include <debug.h>	38	#include <debug.h>
39		39
40	#define PAGE_SIZE FRAME_SIZE	40	#define PAGE_SIZE FRAME_SIZE
41	#define PAGE_WIDTH FRAME_WIDTH	41	#define PAGE_WIDTH FRAME_WIDTH
42		42
43	#define KA2PA(x) ((__address) (x))	43	#define KA2PA(x) ((__address) (x))
44	#define PA2KA(x) ((__address) (x))	44	#define PA2KA(x) ((__address) (x))
45		45
46	#define SET_PTL0_ADDRESS_ARCH(x) /*< To be removed as situation permits. /	46	#define SET_PTL0_ADDRESS_ARCH(x) /*< To be removed as situation permits. /
47		47
48	#define PPN_SHIFT 12	48	#define PPN_SHIFT 12
49		49
50	#define VRN_SHIFT 61	50	#define VRN_SHIFT 61
51	#define VRN_MASK (7LL << VRN_SHIFT)	51	#define VRN_MASK (7LL << VRN_SHIFT)
52	#define VRN_KERNEL 0	52	#define VRN_KERNEL 0
53	#define REGION_REGISTERS 8	53	#define REGION_REGISTERS 8
54		54
55	#define VHPT_WIDTH 20 /* 1M */	55	#define VHPT_WIDTH 20 /* 1M */
56	#define VHPT_SIZE (1 << VHPT_WIDTH)	56	#define VHPT_SIZE (1 << VHPT_WIDTH)
57	#define VHPT_BASE 0 /* Must be aligned to VHPT_SIZE */	57	#define VHPT_BASE 0 /* Must be aligned to VHPT_SIZE */
58		58
59	#define PTA_BASE_SHIFT 15	59	#define PTA_BASE_SHIFT 15
60		60
61	/** Memory Attributes. */	61	/** Memory Attributes. */
62	#define MA_WRITEBACK 0x0	62	#define MA_WRITEBACK 0x0
63	#define MA_UNCACHEABLE 0x4	63	#define MA_UNCACHEABLE 0x4
64		64
65	/** Privilege Levels. Only the most and the least privileged ones are ever used. */	65	/** Privilege Levels. Only the most and the least privileged ones are ever used. */
66	#define PL_KERNEL 0x0	66	#define PL_KERNEL 0x0
67	#define PL_USER 0x3	67	#define PL_USER 0x3
68		68
69	/* Access Rigths. Only certain combinations are used by the kernel. */	69	/* Access Rigths. Only certain combinations are used by the kernel. */
70	#define AR_READ 0x0	70	#define AR_READ 0x0
71	#define AR_EXECUTE 0x1	71	#define AR_EXECUTE 0x1
72	#define AR_WRITE 0x2	72	#define AR_WRITE 0x2
73		73
74		74
75	#define VA_REGION_INDEX 61	75	#define VA_REGION_INDEX 61
76		76
77	#define VA_REGION(va) (va>>VA_REGION_INDEX)	77	#define VA_REGION(va) (va>>VA_REGION_INDEX)
78		78
79		79
80		80
81	struct vhpt_tag_info {	81	struct vhpt_tag_info {
82	unsigned long long tag : 63;	82	unsigned long long tag : 63;
83	unsigned ti : 1;	83	unsigned ti : 1;
84	} __attribute__ ((packed));	84	} __attribute__ ((packed));
85		85
86	union vhpt_tag {	86	union vhpt_tag {
87	struct vhpt_tag_info tag_info;	87	struct vhpt_tag_info tag_info;
88	unsigned tag_word;	88	unsigned tag_word;
89	};	89	};
90		90
91	struct vhpt_entry_present {	91	struct vhpt_entry_present {
92	/* Word 0 */	92	/* Word 0 */
93	unsigned p : 1;	93	unsigned p : 1;
94	unsigned : 1;	94	unsigned : 1;
95	unsigned ma : 3;	95	unsigned ma : 3;
96	unsigned a : 1;	96	unsigned a : 1;
97	unsigned d : 1;	97	unsigned d : 1;
98	unsigned pl : 2;	98	unsigned pl : 2;
99	unsigned ar : 3;	99	unsigned ar : 3;
100	unsigned long long ppn : 38;	100	unsigned long long ppn : 38;
101	unsigned : 2;	101	unsigned : 2;
102	unsigned ed : 1;	102	unsigned ed : 1;
103	unsigned ig1 : 11;	103	unsigned ig1 : 11;
104		104
105	/* Word 1 */	105	/* Word 1 */
106	unsigned : 2;	106	unsigned : 2;
107	unsigned ps : 6;	107	unsigned ps : 6;
108	unsigned key : 24;	108	unsigned key : 24;
109	unsigned : 32;	109	unsigned : 32;
110		110
111	/* Word 2 */	111	/* Word 2 */
112	union vhpt_tag tag;	112	union vhpt_tag tag;
113		113
114	/* Word 3 */	114	/* Word 3 */
115	__u64 ig3 : 64;	115	__u64 ig3 : 64;
116	} __attribute__ ((packed));	116	} __attribute__ ((packed));
117		117
118	struct vhpt_entry_not_present {	118	struct vhpt_entry_not_present {
119	/* Word 0 */	119	/* Word 0 */
120	unsigned p : 1;	120	unsigned p : 1;
121	unsigned long long ig0 : 52;	121	unsigned long long ig0 : 52;
122	unsigned ig1 : 11;	122	unsigned ig1 : 11;
123		123
124	/* Word 1 */	124	/* Word 1 */
125	unsigned : 2;	125	unsigned : 2;
126	unsigned ps : 6;	126	unsigned ps : 6;
127	unsigned long long ig2 : 56;	127	unsigned long long ig2 : 56;
128		128
129	/* Word 2 */	129	/* Word 2 */
130	union vhpt_tag tag;	130	union vhpt_tag tag;
131		131
132	/* Word 3 */	132	/* Word 3 */
133	__u64 ig3 : 64;	133	__u64 ig3 : 64;
134	} __attribute__ ((packed));	134	} __attribute__ ((packed));
135		135
136	typedef union vhpt_entry {	136	typedef union vhpt_entry {
137	struct vhpt_entry_present present;	137	struct vhpt_entry_present present;
138	struct vhpt_entry_not_present not_present;	138	struct vhpt_entry_not_present not_present;
139	__u64 word[4];	139	__u64 word[4];
140	} vhpt_entry_t;	140	} vhpt_entry_t;
141		141
-		142	typedef vhpt_entry_t tlb_entry_t;
-		143
142	struct region_register_map {	144	struct region_register_map {
143	unsigned ve : 1;	145	unsigned ve : 1;
144	unsigned : 1;	146	unsigned : 1;
145	unsigned ps : 6;	147	unsigned ps : 6;
146	unsigned rid : 24;	148	unsigned rid : 24;
147	unsigned : 32;	149	unsigned : 32;
148	} __attribute__ ((packed));	150	} __attribute__ ((packed));
149		151
150	typedef union region_register {	152	typedef union region_register {
151	struct region_register_map map;	153	struct region_register_map map;
152	unsigned long long word;	154	unsigned long long word;
153	} region_register;	155	} region_register;
154		156
155	struct pta_register_map {	157	struct pta_register_map {
156	unsigned ve : 1;	158	unsigned ve : 1;
157	unsigned : 1;	159	unsigned : 1;
158	unsigned size : 6;	160	unsigned size : 6;
159	unsigned vf : 1;	161	unsigned vf : 1;
160	unsigned : 6;	162	unsigned : 6;
161	unsigned long long base : 49;	163	unsigned long long base : 49;
162	} __attribute__ ((packed));	164	} __attribute__ ((packed));
163		165
164	typedef union pta_register {	166	typedef union pta_register {
165	struct pta_register_map map;	167	struct pta_register_map map;
166	__u64 word;	168	__u64 word;
167	} pta_register;	169	} pta_register;
168		170
169	/** Return Translation Hashed Entry Address.	171	/** Return Translation Hashed Entry Address.
170	*	172	*
171	* VRN bits are used to read RID (ASID) from one	173	* VRN bits are used to read RID (ASID) from one
172	* of the eight region registers registers.	174	* of the eight region registers registers.
173	*	175	*
174	* @param va Virtual address including VRN bits.	176	* @param va Virtual address including VRN bits.
175	*	177	*
176	* @return Address of the head of VHPT collision chain.	178	* @return Address of the head of VHPT collision chain.
177	*/	179	*/
178	static inline __u64 thash(__u64 va)	180	static inline __u64 thash(__u64 va)
179	{	181	{
180	__u64 ret;	182	__u64 ret;
181		183
182	__asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));	184	__asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
183		185
184	return ret;	186	return ret;
185	}	187	}
186		188
187	/** Return Translation Hashed Entry Tag.	189	/** Return Translation Hashed Entry Tag.
188	*	190	*
189	* VRN bits are used to read RID (ASID) from one	191	* VRN bits are used to read RID (ASID) from one
190	* of the eight region registers.	192	* of the eight region registers.
191	*	193	*
192	* @param va Virtual address including VRN bits.	194	* @param va Virtual address including VRN bits.
193	*	195	*
194	* @return The unique tag for VPN and RID in the collision chain returned by thash().	196	* @return The unique tag for VPN and RID in the collision chain returned by thash().
195	*/	197	*/
196	static inline __u64 ttag(__u64 va)	198	static inline __u64 ttag(__u64 va)
197	{	199	{
198	__u64 ret;	200	__u64 ret;
199		201
200	__asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));	202	__asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
201		203
202	return ret;	204	return ret;
203	}	205	}
204		206
205	/** Read Region Register.	207	/** Read Region Register.
206	*	208	*
207	* @param i Region register index.	209	* @param i Region register index.
208	*	210	*
209	* @return Current contents of rr[i].	211	* @return Current contents of rr[i].
210	*/	212	*/
211	static inline __u64 rr_read(index_t i)	213	static inline __u64 rr_read(index_t i)
212	{	214	{
213	__u64 ret;	215	__u64 ret;
214		216
215	ASSERT(i < REGION_REGISTERS);	217	ASSERT(i < REGION_REGISTERS);
216	__asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i));	218	__asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i));
217		219
218	return ret;	220	return ret;
219	}	221	}
220		222
221		223
222	/** Write Region Register.	224	/** Write Region Register.
223	*	225	*
224	* @param i Region register index.	226	* @param i Region register index.
225	* @param v Value to be written to rr[i].	227	* @param v Value to be written to rr[i].
226	*/	228	*/
227	static inline void rr_write(index_t i, __u64 v)	229	static inline void rr_write(index_t i, __u64 v)
228	{	230	{
229	ASSERT(i < REGION_REGISTERS);	231	ASSERT(i < REGION_REGISTERS);
230	__asm__ volatile (	232	__asm__ volatile (
231	"mov rr[%0] = %1;;\n"	233	"mov rr[%0] = %1;;\n"
232	"srlz.d;;\n"	-
233	:	234	:
234	: "r" (i), "r" (v));	235	: "r" (i), "r" (v));
235	}	236	}
236		237
237	/** Read Page Table Register.	238	/** Read Page Table Register.
238	*	239	*
239	* @return Current value stored in PTA.	240	* @return Current value stored in PTA.
240	*/	241	*/
241	static inline __u64 pta_read(void)	242	static inline __u64 pta_read(void)
242	{	243	{
243	__u64 ret;	244	__u64 ret;
244		245
245	__asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));	246	__asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
246		247
247	return ret;	248	return ret;
248	}	249	}
249		250
250	/** Write Page Table Register.	251	/** Write Page Table Register.
251	*	252	*
252	* @param v New value to be stored in PTA.	253	* @param v New value to be stored in PTA.
253	*/	254	*/
254	static inline void pta_write(__u64 v)	255	static inline void pta_write(__u64 v)
255	{	256	{
256	__asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));	257	__asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
257	}	258	}
258		259
259	extern void page_arch_init(void);	260	extern void page_arch_init(void);
260		261
261	extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);	262	extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);
262	extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);	263	extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);
263	extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);	264	extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
264		265
265	#endif	266	#endif
266		267

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(root)/kernel/trunk/arch/ia64/include/mm/page.h @ 1170 – Rev 818 → 819