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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
- | 29 | /** @addtogroup ia64interrupt |
|
- | 30 | * @{ |
|
- | 31 | */ |
|
- | 32 | /** @file |
|
- | 33 | */ |
|
- | 34 | ||
29 | #ifndef __ia64_INTERRUPT_H__ |
35 | #ifndef __ia64_INTERRUPT_H__ |
30 | #define __ia64_INTERRUPT_H__ |
36 | #define __ia64_INTERRUPT_H__ |
31 | 37 | ||
32 | #include <typedefs.h> |
38 | #include <typedefs.h> |
33 | #include <arch/types.h> |
39 | #include <arch/types.h> |
34 | #include <arch/register.h> |
40 | #include <arch/register.h> |
35 | 41 | ||
36 | #define IRQ_COUNT 257 /* 256 NOT suppotred IRQS*//* TODO */ |
42 | #define IRQ_COUNT 257 /* 256 NOT suppotred IRQS*//* TODO */ |
37 | #define IRQ_KBD 256 /* One simulated interrupt for ski simulator keyboard*/ |
43 | #define IRQ_KBD 256 /* One simulated interrupt for ski simulator keyboard*/ |
38 | 44 | ||
39 | /** External Interrupt vectors. */ |
45 | /** External Interrupt vectors. */ |
40 | #define INTERRUPT_TIMER 0 |
46 | #define INTERRUPT_TIMER 0 |
41 | #define INTERRUPT_SPURIOUS 15 |
47 | #define INTERRUPT_SPURIOUS 15 |
42 | 48 | ||
43 | /** General Exception codes. */ |
49 | /** General Exception codes. */ |
44 | #define GE_ILLEGALOP 0 |
50 | #define GE_ILLEGALOP 0 |
45 | #define GE_PRIVOP 1 |
51 | #define GE_PRIVOP 1 |
46 | #define GE_PRIVREG 2 |
52 | #define GE_PRIVREG 2 |
47 | #define GE_RESREGFLD 3 |
53 | #define GE_RESREGFLD 3 |
48 | #define GE_DISBLDISTRAN 4 |
54 | #define GE_DISBLDISTRAN 4 |
49 | #define GE_ILLEGALDEP 8 |
55 | #define GE_ILLEGALDEP 8 |
50 | 56 | ||
51 | #define EOI 0 /**< The actual value doesn't matter. */ |
57 | #define EOI 0 /**< The actual value doesn't matter. */ |
52 | 58 | ||
53 | struct istate { |
59 | struct istate { |
54 | __r128 f2; |
60 | __r128 f2; |
55 | __r128 f3; |
61 | __r128 f3; |
56 | __r128 f4; |
62 | __r128 f4; |
57 | __r128 f5; |
63 | __r128 f5; |
58 | __r128 f6; |
64 | __r128 f6; |
59 | __r128 f7; |
65 | __r128 f7; |
60 | __r128 f8; |
66 | __r128 f8; |
61 | __r128 f9; |
67 | __r128 f9; |
62 | __r128 f10; |
68 | __r128 f10; |
63 | __r128 f11; |
69 | __r128 f11; |
64 | __r128 f12; |
70 | __r128 f12; |
65 | __r128 f13; |
71 | __r128 f13; |
66 | __r128 f14; |
72 | __r128 f14; |
67 | __r128 f15; |
73 | __r128 f15; |
68 | __r128 f16; |
74 | __r128 f16; |
69 | __r128 f17; |
75 | __r128 f17; |
70 | __r128 f18; |
76 | __r128 f18; |
71 | __r128 f19; |
77 | __r128 f19; |
72 | __r128 f20; |
78 | __r128 f20; |
73 | __r128 f21; |
79 | __r128 f21; |
74 | __r128 f22; |
80 | __r128 f22; |
75 | __r128 f23; |
81 | __r128 f23; |
76 | __r128 f24; |
82 | __r128 f24; |
77 | __r128 f25; |
83 | __r128 f25; |
78 | __r128 f26; |
84 | __r128 f26; |
79 | __r128 f27; |
85 | __r128 f27; |
80 | __r128 f28; |
86 | __r128 f28; |
81 | __r128 f29; |
87 | __r128 f29; |
82 | __r128 f30; |
88 | __r128 f30; |
83 | __r128 f31; |
89 | __r128 f31; |
84 | 90 | ||
85 | __address ar_bsp; |
91 | __address ar_bsp; |
86 | __address ar_bspstore; |
92 | __address ar_bspstore; |
87 | __address ar_bspstore_new; |
93 | __address ar_bspstore_new; |
88 | __u64 ar_rnat; |
94 | __u64 ar_rnat; |
89 | __u64 ar_ifs; |
95 | __u64 ar_ifs; |
90 | __u64 ar_pfs; |
96 | __u64 ar_pfs; |
91 | __u64 ar_rsc; |
97 | __u64 ar_rsc; |
92 | __address cr_ifa; |
98 | __address cr_ifa; |
93 | cr_isr_t cr_isr; |
99 | cr_isr_t cr_isr; |
94 | __address cr_iipa; |
100 | __address cr_iipa; |
95 | psr_t cr_ipsr; |
101 | psr_t cr_ipsr; |
96 | __address cr_iip; |
102 | __address cr_iip; |
97 | __u64 pr; |
103 | __u64 pr; |
98 | __address sp; |
104 | __address sp; |
99 | 105 | ||
100 | /* |
106 | /* |
101 | * The following variables are defined only for break_instruction handler. |
107 | * The following variables are defined only for break_instruction handler. |
102 | */ |
108 | */ |
103 | __u64 in0; |
109 | __u64 in0; |
104 | __u64 in1; |
110 | __u64 in1; |
105 | __u64 in2; |
111 | __u64 in2; |
106 | __u64 in3; |
112 | __u64 in3; |
107 | __u64 in4; |
113 | __u64 in4; |
108 | }; |
114 | }; |
109 | 115 | ||
110 | static inline void istate_set_retaddr(istate_t *istate, __address retaddr) |
116 | static inline void istate_set_retaddr(istate_t *istate, __address retaddr) |
111 | { |
117 | { |
112 | istate->cr_iip = retaddr; |
118 | istate->cr_iip = retaddr; |
113 | istate->cr_ipsr.ri = 0; /* return to instruction slot #0 */ |
119 | istate->cr_ipsr.ri = 0; /* return to instruction slot #0 */ |
114 | } |
120 | } |
115 | 121 | ||
116 | static inline __native istate_get_pc(istate_t *istate) |
122 | static inline __native istate_get_pc(istate_t *istate) |
117 | { |
123 | { |
118 | return istate->cr_iip; |
124 | return istate->cr_iip; |
119 | } |
125 | } |
120 | #include <panic.h> |
126 | #include <panic.h> |
121 | static inline int istate_from_uspace(istate_t *istate) |
127 | static inline int istate_from_uspace(istate_t *istate) |
122 | { |
128 | { |
123 | return (istate->cr_iip)<0xe000000000000000ULL; |
129 | return (istate->cr_iip)<0xe000000000000000ULL; |
124 | } |
130 | } |
125 | 131 | ||
126 | extern void *ivt; |
132 | extern void *ivt; |
127 | 133 | ||
128 | extern void general_exception(__u64 vector, istate_t *istate); |
134 | extern void general_exception(__u64 vector, istate_t *istate); |
129 | extern int break_instruction(__u64 vector, istate_t *istate); |
135 | extern int break_instruction(__u64 vector, istate_t *istate); |
130 | extern void universal_handler(__u64 vector, istate_t *istate); |
136 | extern void universal_handler(__u64 vector, istate_t *istate); |
131 | extern void nop_handler(__u64 vector, istate_t *istate); |
137 | extern void nop_handler(__u64 vector, istate_t *istate); |
132 | extern void external_interrupt(__u64 vector, istate_t *istate); |
138 | extern void external_interrupt(__u64 vector, istate_t *istate); |
133 | extern void virtual_interrupt(__u64 irq, void *param); |
139 | extern void virtual_interrupt(__u64 irq, void *param); |
134 | extern void disabled_fp_register(__u64 vector, istate_t *istate); |
140 | extern void disabled_fp_register(__u64 vector, istate_t *istate); |
135 | 141 | ||
136 | 142 | ||
137 | 143 | ||
138 | #endif |
144 | #endif |
- | 145 | ||
- | 146 | /** @} |
|
- | 147 | */ |
|
- | 148 | ||
139 | 149 |