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1 | /* |
1 | /* |
2 | * Copyright (c) 2008 Jiri Svoboda |
2 | * Copyright (c) 2008 Jiri Svoboda |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup debug |
29 | /** @addtogroup debug |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <stdio.h> |
35 | #include <stdio.h> |
36 | #include <stdlib.h> |
36 | #include <stdlib.h> |
37 | #include <assert.h> |
37 | #include <assert.h> |
38 | #include <sys/types.h> |
38 | #include <sys/types.h> |
39 | #include <errno.h> |
39 | #include <errno.h> |
40 | #include <udebug.h> |
40 | #include <udebug.h> |
41 | 41 | ||
42 | #include "../../../cons.h" |
42 | #include "../../../cons.h" |
43 | #include "../../../main.h" |
43 | #include "../../../main.h" |
44 | #include "../../../breakpoint.h" |
44 | #include "../../../breakpoint.h" |
45 | #include "../../../include/arch.h" |
45 | #include "../../../include/arch.h" |
- | 46 | #include "../../../genarch/idec/idec.h" |
|
46 | 47 | ||
47 | #define OPCODE_BREAK 0x0000000d |
48 | #define OPCODE_BREAK 0x0000000d |
48 | 49 | ||
49 | static istate_t istate; |
50 | static istate_t istate; |
50 | 51 | ||
51 | typedef enum { |
52 | typedef enum { |
52 | /* Branches (conditional) */ |
53 | /* Branches (conditional) */ |
53 | OP_BCzF, |
54 | OP_BCzF, |
54 | OP_BCzFL, |
55 | OP_BCzFL, |
55 | OP_BCzT, |
56 | OP_BCzT, |
56 | OP_BCzTL, |
57 | OP_BCzTL, |
57 | OP_BEQ, |
58 | OP_BEQ, |
58 | OP_BEQL, |
59 | OP_BEQL, |
59 | OP_BGEZ, |
60 | OP_BGEZ, |
60 | OP_BGEZAL, |
61 | OP_BGEZAL, |
61 | OP_BGEZALL, |
62 | OP_BGEZALL, |
62 | OP_BGEZL, |
63 | OP_BGEZL, |
63 | OP_BGTZ, |
64 | OP_BGTZ, |
64 | OP_BGTZL, |
65 | OP_BGTZL, |
65 | OP_BLEZ, |
66 | OP_BLEZ, |
66 | OP_BLEZL, |
67 | OP_BLEZL, |
67 | OP_BLTZ, |
68 | OP_BLTZ, |
68 | OP_BLTZAL, |
69 | OP_BLTZAL, |
69 | OP_BLTZALL, |
70 | OP_BLTZALL, |
70 | OP_BLTZL, |
71 | OP_BLTZL, |
71 | OP_BNE, |
72 | OP_BNE, |
72 | OP_BNEL, |
73 | OP_BNEL, |
73 | 74 | ||
74 | /* Jumps (unconditional) */ |
75 | /* Jumps (unconditional) */ |
75 | OP_J, |
76 | OP_J, |
76 | OP_JAL, |
77 | OP_JAL, |
77 | OP_JALR, |
78 | OP_JALR, |
78 | OP_JR |
79 | OP_JR |
79 | } op_t; |
80 | } op_t; |
80 | 81 | ||
81 | typedef struct { |
82 | typedef struct { |
82 | uint32_t mask; |
83 | uint32_t mask; |
83 | uint32_t value; |
84 | uint32_t value; |
84 | op_t op; |
85 | op_t op; |
85 | } instr_desc_t; |
86 | } instr_desc_t; |
86 | 87 | ||
87 | static instr_desc_t decoding_table[] = { |
88 | static instr_desc_t decoding_table[] = { |
88 | { 0xf3ff0000, 0x41000000, OP_BCzF }, |
89 | { 0xf3ff0000, 0x41000000, OP_BCzF }, |
89 | { 0xf3ff0000, 0x41020000, OP_BCzFL }, |
90 | { 0xf3ff0000, 0x41020000, OP_BCzFL }, |
90 | { 0xf3ff0000, 0x41010000, OP_BCzT }, |
91 | { 0xf3ff0000, 0x41010000, OP_BCzT }, |
91 | { 0xf3ff0000, 0x41030000, OP_BCzTL }, |
92 | { 0xf3ff0000, 0x41030000, OP_BCzTL }, |
92 | { 0xfc000000, 0x10000000, OP_BEQ }, |
93 | { 0xfc000000, 0x10000000, OP_BEQ }, |
93 | { 0xfc000000, 0x50000000, OP_BEQL }, |
94 | { 0xfc000000, 0x50000000, OP_BEQL }, |
94 | { 0xfc1f0000, 0x04010000, OP_BGEZ }, |
95 | { 0xfc1f0000, 0x04010000, OP_BGEZ }, |
95 | { 0xfc1f0000, 0x04110000, OP_BGEZAL }, |
96 | { 0xfc1f0000, 0x04110000, OP_BGEZAL }, |
96 | { 0xfc1f0000, 0x04130000, OP_BGEZALL }, |
97 | { 0xfc1f0000, 0x04130000, OP_BGEZALL }, |
97 | { 0xfc1f0000, 0x04030000, OP_BGEZL }, |
98 | { 0xfc1f0000, 0x04030000, OP_BGEZL }, |
98 | { 0xfc1f0000, 0x1c000000, OP_BGTZ }, |
99 | { 0xfc1f0000, 0x1c000000, OP_BGTZ }, |
99 | { 0xfc1f0000, 0x5c000000, OP_BGTZL }, |
100 | { 0xfc1f0000, 0x5c000000, OP_BGTZL }, |
100 | { 0xfc1f0000, 0x18000000, OP_BLEZ }, |
101 | { 0xfc1f0000, 0x18000000, OP_BLEZ }, |
101 | { 0xfc1f0000, 0x58000000, OP_BLEZL }, |
102 | { 0xfc1f0000, 0x58000000, OP_BLEZL }, |
102 | { 0xfc1f0000, 0x04000000, OP_BLTZ }, |
103 | { 0xfc1f0000, 0x04000000, OP_BLTZ }, |
103 | { 0xfc1f0000, 0x04100000, OP_BLTZAL }, |
104 | { 0xfc1f0000, 0x04100000, OP_BLTZAL }, |
104 | { 0xfc1f0000, 0x04120000, OP_BLTZALL }, |
105 | { 0xfc1f0000, 0x04120000, OP_BLTZALL }, |
105 | { 0xfc1f0000, 0x04020000, OP_BLTZL }, |
106 | { 0xfc1f0000, 0x04020000, OP_BLTZL }, |
106 | { 0xfc000000, 0x14000000, OP_BNE }, |
107 | { 0xfc000000, 0x14000000, OP_BNE }, |
107 | { 0xfc000000, 0x54000000, OP_BNEL }, |
108 | { 0xfc000000, 0x54000000, OP_BNEL }, |
108 | 109 | ||
109 | { 0xfc000000, 0x08000000, OP_J }, |
110 | { 0xfc000000, 0x08000000, OP_J }, |
110 | { 0xfc000000, 0x0c000000, OP_JAL }, |
111 | { 0xfc000000, 0x0c000000, OP_JAL }, |
111 | { 0xfc1f07ff, 0x00000009, OP_JALR }, |
112 | { 0xfc1f07ff, 0x00000009, OP_JALR }, |
112 | { 0xfc1fffff, 0x00000008, OP_JR }, |
113 | { 0xfc1fffff, 0x00000008, OP_JR }, |
113 | 114 | ||
114 | { 0, 0, -1 } |
115 | { 0, 0, -1 } |
115 | }; |
116 | }; |
116 | 117 | ||
117 | void arch_dthread_initialize(dthread_t *dt) |
118 | void arch_dthread_initialize(dthread_t *dt) |
118 | { |
119 | { |
119 | dt->arch.singlestep = false; |
120 | dt->arch.singlestep = false; |
120 | 121 | ||
121 | bstore_initialize(&dt->arch.cur); |
122 | bstore_initialize(&dt->arch.cur); |
122 | bstore_initialize(&dt->arch.next[0]); |
123 | bstore_initialize(&dt->arch.next[0]); |
123 | bstore_initialize(&dt->arch.next[1]); |
124 | bstore_initialize(&dt->arch.next[1]); |
124 | } |
125 | } |
125 | 126 | ||
126 | int arch_breakpoint_set(breakpoint_t *b) |
127 | int arch_breakpoint_set(breakpoint_t *b) |
127 | { |
128 | { |
128 | bstore_initialize(&b->arch.bs); |
- | |
129 | bstore_initialize(&b->arch.next_bs[0]); |
- | |
130 | bstore_initialize(&b->arch.next_bs[1]); |
129 | return idec_breakpoint_set(b); |
131 | - | ||
132 | return bstore_push(&b->arch.bs, b->addr, OPCODE_BREAK); |
- | |
133 | } |
130 | } |
134 | 131 | ||
135 | int arch_breakpoint_remove(breakpoint_t *b) |
132 | int arch_breakpoint_remove(breakpoint_t *b) |
136 | { |
133 | { |
137 | return bstore_pop(&b->arch.bs); |
134 | return idec_breakpoint_remove(b); |
138 | } |
135 | } |
139 | 136 | ||
140 | static int islot_read(uintptr_t addr, uint32_t *instr) |
137 | static int islot_read(uintptr_t addr, uint32_t *instr) |
141 | { |
138 | { |
142 | int rc; |
139 | int rc; |
143 | 140 | ||
144 | rc = udebug_mem_read(app_phone, instr, addr, sizeof(uint32_t)); |
141 | rc = udebug_mem_read(app_phone, instr, addr, sizeof(uint32_t)); |
145 | if (rc != EOK) { |
142 | if (rc != EOK) { |
146 | cons_printf("Error reading memory address 0x%zx\n", addr); |
143 | cons_printf("Error reading memory address 0x%zx\n", addr); |
147 | } |
144 | } |
148 | 145 | ||
149 | return rc; |
146 | return rc; |
150 | } |
147 | } |
151 | 148 | ||
152 | static op_t instr_decode(uint32_t instr) |
149 | static op_t instr_decode(uint32_t instr) |
153 | { |
150 | { |
154 | instr_desc_t *idesc; |
151 | instr_desc_t *idesc; |
155 | 152 | ||
156 | idesc = &decoding_table[0]; |
153 | idesc = &decoding_table[0]; |
157 | while (idesc->op >= 0) { |
154 | while (idesc->op >= 0) { |
158 | if ((instr & idesc->mask) == idesc->value) |
155 | if ((instr & idesc->mask) == idesc->value) |
159 | return idesc->op; |
156 | return idesc->op; |
160 | ++idesc; |
157 | ++idesc; |
161 | } |
158 | } |
162 | 159 | ||
163 | return -1; |
160 | return -1; |
164 | } |
161 | } |
165 | 162 | ||
166 | static int get_reg(int reg_no, uint32_t *value) |
163 | static int get_reg(dthread_t *dt, int reg_no, uint32_t *value) |
167 | { |
164 | { |
- | 165 | int rc; |
|
- | 166 | ||
168 | cons_printf("get_reg...\n"); |
167 | cons_printf("get_reg...\n"); |
169 | 168 | ||
170 | if (reg_no == 0) { |
169 | if (reg_no == 0) { |
171 | *value = 0; |
170 | *value = 0; |
172 | return 0; |
171 | return 0; |
173 | } |
172 | } |
174 | 173 | ||
- | 174 | rc = udebug_regs_read(app_phone, dt->hash, &istate); |
|
- | 175 | if (rc < 0) return rc; |
|
- | 176 | ||
175 | /* FIXME: ugly */ |
177 | /* FIXME: ugly */ |
176 | *value = ((uint32_t *)&istate)[reg_no - 1]; |
178 | *value = ((uint32_t *)&istate)[reg_no - 1]; |
177 | printf("get_reg ok (0x%08x)\n", *value); |
179 | printf("get_reg ok (0x%08x)\n", *value); |
178 | 180 | ||
179 | return 0; |
181 | return 0; |
180 | } |
182 | } |
181 | 183 | ||
182 | /** Get address of the instruction that will be executed after the current one. |
184 | /** Get address of the instruction that will be executed after the current one. |
183 | * |
185 | * |
184 | * Assumptions: addr == PC, *addr is not covered by a BREAK. |
186 | * Assumptions: addr == PC, *addr is not covered by a BREAK. |
185 | * |
187 | * |
- | 188 | * @param dt Dthread on which to operate. |
|
186 | * @param addr Address of an instruction. |
189 | * @param addr Address of an instruction. |
187 | * @param buffer Buffer for storing up to 2 addresses. |
190 | * @param buffer Buffer for storing up to 2 addresses. |
188 | * @return Number of stored addresses or negative error code. |
191 | * @return Number of stored addresses or negative error code. |
189 | */ |
192 | */ |
190 | static int get_next_addr(uintptr_t addr, uintptr_t *buffer) |
193 | int get_next_addr(dthread_t *dt, uintptr_t addr, uintptr_t *buffer) |
191 | { |
194 | { |
192 | /* TODO: J[AL]R, branches and delay slots */ |
195 | /* TODO: J[AL]R, branches and delay slots */ |
193 | uint32_t instr; |
196 | uint32_t instr; |
194 | int32_t offset; |
197 | int32_t offset; |
195 | op_t op; |
198 | op_t op; |
196 | int rc; |
199 | int rc; |
197 | int n; |
200 | int n; |
198 | 201 | ||
199 | rc = islot_read(addr, &instr); |
202 | rc = islot_read(addr, &instr); |
200 | if (rc != 0) return rc; |
203 | if (rc != 0) return rc; |
201 | 204 | ||
202 | op = instr_decode(instr); |
205 | op = instr_decode(instr); |
203 | 206 | ||
204 | switch (op) { |
207 | switch (op) { |
205 | case OP_BCzF: |
208 | case OP_BCzF: |
206 | case OP_BCzFL: |
209 | case OP_BCzFL: |
207 | case OP_BCzT: |
210 | case OP_BCzT: |
208 | case OP_BCzTL: |
211 | case OP_BCzTL: |
209 | case OP_BEQ: |
212 | case OP_BEQ: |
210 | case OP_BEQL: |
213 | case OP_BEQL: |
211 | case OP_BGEZ: |
214 | case OP_BGEZ: |
212 | case OP_BGEZAL: |
215 | case OP_BGEZAL: |
213 | case OP_BGEZALL: |
216 | case OP_BGEZALL: |
214 | case OP_BGEZL: |
217 | case OP_BGEZL: |
215 | case OP_BGTZ: |
218 | case OP_BGTZ: |
216 | case OP_BGTZL: |
219 | case OP_BGTZL: |
217 | case OP_BLEZ: |
220 | case OP_BLEZ: |
218 | case OP_BLTZ: |
221 | case OP_BLTZ: |
219 | case OP_BLTZAL: |
222 | case OP_BLTZAL: |
220 | case OP_BLTZALL: |
223 | case OP_BLTZALL: |
221 | case OP_BLTZL: |
224 | case OP_BLTZL: |
222 | case OP_BNE: |
225 | case OP_BNE: |
223 | case OP_BNEL: |
226 | case OP_BNEL: |
224 | /* Branch */ |
227 | /* Branch */ |
225 | offset = (int32_t)(int16_t)(instr & 0x0000ffff) << 2; |
228 | offset = (int32_t)(int16_t)(instr & 0x0000ffff) << 2; |
226 | buffer[0] = (addr + 4) + offset; /* taken */ |
229 | buffer[0] = (addr + 4) + offset; /* taken */ |
227 | buffer[1] = addr + 8; /* not taken */ |
230 | buffer[1] = addr + 8; /* not taken */ |
228 | n = 2; |
231 | n = 2; |
229 | break; |
232 | break; |
230 | 233 | ||
231 | case OP_J: |
234 | case OP_J: |
232 | case OP_JAL: |
235 | case OP_JAL: |
233 | /* Immediate jump */ |
236 | /* Immediate jump */ |
234 | buffer[0] = |
237 | buffer[0] = |
235 | ((addr + 4) & 0xf0000000) | |
238 | ((addr + 4) & 0xf0000000) | |
236 | ((instr & 0x03ffffff) << 2); |
239 | ((instr & 0x03ffffff) << 2); |
237 | n = 1; |
240 | n = 1; |
238 | break; |
241 | break; |
239 | case OP_JR: |
242 | case OP_JR: |
240 | case OP_JALR: |
243 | case OP_JALR: |
241 | /* Register jump */ |
244 | /* Register jump */ |
242 | rc = get_reg((instr >> 21) & 0x1f, &buffer[0]); |
245 | rc = get_reg(dt, (instr >> 21) & 0x1f, &buffer[0]); |
243 | n = 1; |
246 | n = 1; |
244 | break; |
247 | break; |
245 | default: |
248 | default: |
246 | /* Regular instruction */ |
249 | /* Regular instruction */ |
247 | buffer[0] = addr + 4; |
250 | buffer[0] = addr + 4; |
248 | n = 1; |
251 | n = 1; |
249 | break; |
252 | break; |
250 | } |
253 | } |
251 | 254 | ||
252 | return n; |
255 | return n; |
253 | } |
256 | } |
254 | 257 | ||
255 | static void _ev_breakpoint(thash_t thread_hash) |
- | |
256 | { |
- | |
257 | breakpoint_t *b; |
- | |
258 | dthread_t *dt; |
- | |
259 | int rc, n_next, i; |
- | |
260 | uint32_t epc; |
- | |
261 | uintptr_t brk_addr; |
- | |
262 | uintptr_t next_addr[2]; |
- | |
263 | uint32_t brkp; |
- | |
264 | - | ||
265 | brkp = OPCODE_BREAK; |
- | |
266 | - | ||
267 | cons_printf("arch_event_breakpoint\n"); |
- | |
268 | - | ||
269 | rc = udebug_regs_read(app_phone, thread_hash, &istate); |
- | |
270 | cons_printf("udebug_regs_read -> %d\n", rc); |
- | |
271 | epc = istate_get_pc(&istate); |
- | |
272 | cons_printf("EPC was 0x%08x\n", epc); |
- | |
273 | brk_addr = epc; |
- | |
274 | - | ||
275 | dt = dthread_get(); |
- | |
276 | - | ||
277 | if (active_bkpt != NULL) { |
- | |
278 | assert(active_bkpt->arch.bs.address == brk_addr); |
- | |
279 | b = active_bkpt; |
- | |
280 | - | ||
281 | /* A breakpoint-restoring BRK has been hit */ |
- | |
282 | cons_printf("restoring breakpoint %d\n", b->id); |
- | |
283 | for (i = 0; i < b->arch.n_next; ++i) { |
- | |
284 | rc = bstore_pop(&b->arch.next_bs[i]); |
- | |
285 | if (rc != 0) return; |
- | |
286 | } |
- | |
287 | - | ||
288 | rc = bstore_push(&b->arch.bs, b->addr, OPCODE_BREAK); |
- | |
289 | if (rc != 0) return; |
- | |
290 | active_bkpt = NULL; |
- | |
291 | return; |
- | |
292 | } |
- | |
293 | - | ||
294 | b = breakpoint_find_by_addr(brk_addr); |
- | |
295 | if (b == NULL) { |
- | |
296 | cons_printf("Unrecognized breakpoint at 0x%lx\n", brk_addr); |
- | |
297 | } |
- | |
298 | - | ||
299 | /* A breakpoint has been hit */ |
- | |
300 | cons_printf("breakpoint_hit...\n"); |
- | |
301 | breakpoint_hit(b); |
- | |
302 | - | ||
303 | /* While in breakpoint_hit(), singlestep was activated */ |
- | |
304 | if (dt->arch.singlestep) return; |
- | |
305 | - | ||
306 | cons_printf("move breakpoint\b"); |
- | |
307 | rc = bstore_pop(&b->arch.bs); |
- | |
308 | if (rc != 0) return; |
- | |
309 | - | ||
310 | n_next = get_next_addr(brk_addr, next_addr); |
- | |
311 | if (n_next < 0) return; |
- | |
312 | - | ||
313 | /* |
- | |
314 | * There could be another breakpoint at next_addr, |
- | |
315 | * but that's okay. We'll pop the active breakpoint bs |
- | |
316 | * before doing anything else. |
- | |
317 | */ |
- | |
318 | for (i = 0; i < n_next; ++i) { |
- | |
319 | rc = bstore_push(&b->arch.next_bs[i], next_addr[i], |
- | |
320 | OPCODE_BREAK); |
- | |
321 | if (rc != 0) return; |
- | |
322 | } |
- | |
323 | b->arch.n_next = n_next; |
- | |
324 | - | ||
325 | active_bkpt = b; |
- | |
326 | b->active = true; |
- | |
327 | - | ||
328 | cons_printf("end_hit...\n"); |
- | |
329 | } |
- | |
330 | - | ||
331 | - | ||
332 | static void _ev_singlestep(thash_t thread_hash) |
- | |
333 | { |
- | |
334 | dthread_t *dt; |
- | |
335 | int rc, i; |
- | |
336 | uint32_t epc; |
- | |
337 | int brk_addr; |
- | |
338 | uint32_t brkp; |
- | |
339 | - | ||
340 | dt = dthread_get(); |
- | |
341 | - | ||
342 | assert(active_bkpt == NULL); |
- | |
343 | assert(dt->arch.singlestep); |
- | |
344 | brkp = OPCODE_BREAK; |
- | |
345 | - | ||
346 | cons_printf("arch_event_breakpoint\n"); |
- | |
347 | - | ||
348 | rc = udebug_regs_read(app_phone, thread_hash, &istate); |
- | |
349 | cons_printf("udebug_regs_read -> %d\n", rc); |
- | |
350 | epc = istate_get_pc(&istate); |
- | |
351 | cons_printf("EPC was 0x%08x\n", epc); |
- | |
352 | brk_addr = epc; |
- | |
353 | - | ||
354 | if (dt->arch.cur.valid) { |
- | |
355 | cons_printf("restore breakpoint BREAK\n"); |
- | |
356 | rc = bstore_pop(&dt->arch.cur); |
- | |
357 | } |
- | |
358 | - | ||
359 | cons_printf("\nclear singlestep BREAKs\n"); |
- | |
360 | for (i = 0; i < dt->arch.n_next; ++i) { |
- | |
361 | rc = bstore_pop(&dt->arch.next[i]); |
- | |
362 | if (rc != 0) return; |
- | |
363 | } |
- | |
364 | - | ||
365 | dt->arch.singlestep = false; |
- | |
366 | - | ||
367 | singlestep_hit(); |
- | |
368 | } |
- | |
369 | - | ||
370 | - | ||
371 | void arch_event_breakpoint(thash_t thread_hash) |
258 | void arch_event_breakpoint(thash_t thread_hash) |
372 | { |
259 | { |
373 | dthread_t *dt; |
- | |
374 | - | ||
375 | dt = dthread_get(); |
- | |
376 | if (dt->arch.singlestep) { |
- | |
377 | _ev_singlestep(thread_hash); |
- | |
378 | } else { |
- | |
379 | _ev_breakpoint(thread_hash); |
260 | idec_event_breakpoint(thread_hash); |
380 | } |
- | |
381 | } |
261 | } |
382 | 262 | ||
383 | void arch_event_trap(dthread_t *dt) |
263 | void arch_event_trap(dthread_t *dt) |
384 | { |
264 | { |
385 | /* Unused */ |
265 | /* Unused */ |
386 | (void)dt; |
266 | (void)dt; |
387 | } |
267 | } |
388 | 268 | ||
389 | void arch_dump_regs(thash_t thash) |
269 | void arch_dump_regs(thash_t thash) |
390 | { |
270 | { |
391 | /* TODO */ |
271 | /* TODO */ |
392 | } |
272 | } |
393 | 273 | ||
394 | void arch_singlestep(dthread_t *dt) |
274 | void arch_singlestep(dthread_t *dt) |
395 | { |
275 | { |
396 | int rc, i; |
- | |
397 | uint32_t epc; |
- | |
398 | breakpoint_t *b; |
- | |
399 | uint32_t old_instr; |
- | |
400 | uintptr_t next_addr[2]; |
- | |
401 | int n_next; |
- | |
402 | - | ||
403 | assert(active_bkpt == NULL); |
- | |
404 | assert(dt->arch.singlestep == false); |
- | |
405 | - | ||
406 | cons_printf("arch_singlestep(dt)\n"); |
- | |
407 | rc = udebug_regs_read(app_phone, dt->hash, &istate); |
- | |
408 | cons_printf("udebug_regs_read -> %d\n", rc); |
- | |
409 | epc = istate_get_pc(&istate); |
- | |
410 | cons_printf("EPC was 0x%08x\n", epc); |
- | |
411 | - | ||
412 | cons_printf("initial set singlestep\n"); |
- | |
413 | b = breakpoint_find_by_addr(epc); |
- | |
414 | if (b != NULL) { |
- | |
415 | /* Cover breakpoint with old instruction */ |
- | |
416 | old_instr = b->arch.bs.value; |
- | |
417 | rc = bstore_push(&dt->arch.cur, epc, old_instr); |
- | |
418 | if (rc < 0) return; |
- | |
419 | } |
- | |
420 | - | ||
421 | n_next = get_next_addr(epc, next_addr); |
- | |
422 | if (n_next < 0) return; |
- | |
423 | - | ||
424 | /* Cover next instruction(s) with BREAK */ |
- | |
425 | for (i = 0; i < n_next; ++i) { |
- | |
426 | rc = bstore_push(&dt->arch.next[i], next_addr[i], OPCODE_BREAK); |
- | |
427 | if (rc != 0) return; |
- | |
428 | } |
- | |
429 | dt->arch.n_next = n_next; |
- | |
430 | - | ||
431 | dt->arch.singlestep = true; |
276 | idec_singlestep(dt); |
432 | dthread_resume(dt); |
- | |
433 | } |
277 | } |
434 | 278 | ||
435 | /** @} |
279 | /** @} |
436 | */ |
280 | */ |
437 | 281 |