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/*
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/*
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 * Copyright (c) 2008 Jiri Svoboda
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 * Copyright (c) 2008 Jiri Svoboda
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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/** @addtogroup debug
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/** @addtogroup debug
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 * @{
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 * @{
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 */
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 */
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/** @file
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/** @file
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 */
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 */
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#include <stdio.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include <sys/types.h>
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#include <sys/types.h>
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#include <bool.h>
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#include <bool.h>
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#include <udebug.h>
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#include <udebug.h>
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#include <kernel/arch/context_offset.h>
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#include <kernel/arch/context_offset.h>
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42
 
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#include "../../../cons.h"
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#include "../../../cons.h"
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#include "../../../main.h"
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#include "../../../main.h"
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#include "../../../include/arch.h"
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#include "../../../include/arch.h"
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46
 
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#define OPCODE_INT3     0xCC
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#define OPCODE_INT3     0xCC
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48
 
-
 
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void arch_dthread_initialize(dthread_t *dt)
-
 
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{
-
 
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    dt->arch.singlestep = false;
-
 
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}
-
 
53
 
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static int _set_trap_flag(dthread_t *dt, bool enable)
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static int _set_trap_flag(dthread_t *dt, bool enable)
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{
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{
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    static istate_t istate;
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    static istate_t istate;
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    int rc;
57
    int rc;
53
 
58
 
54
    rc = udebug_regs_read(app_phone, dt->hash, &istate);
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    rc = udebug_regs_read(app_phone, dt->hash, &istate);
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    if (rc < 0) { printf("regs read failed\n"); return; }
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    if (rc < 0) { printf("regs read failed\n"); return -1; }
56
 
61
 
57
    if (enable) istate.eflags |= 0x0100; /* trap flag */
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    if (enable) istate.eflags |= 0x0100; /* trap flag */
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    else if (!active_bkpt) istate.eflags &= ~0x0100; /* trap flag */
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    else if (!active_bkpt) istate.eflags &= ~0x0100; /* trap flag */
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64
 
60
    rc = udebug_regs_write(app_phone, dt->hash, &istate);  
65
    rc = udebug_regs_write(app_phone, dt->hash, &istate);  
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    if (rc < 0) { printf("regs write failed\n"); return; }
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    if (rc < 0) { printf("regs write failed\n"); return -1; }
62
 
67
 
63
    return 0;
68
    return 0;
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}
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}
65
 
70
 
66
int arch_breakpoint_set(breakpoint_t *b)
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int arch_breakpoint_set(breakpoint_t *b)
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{
72
{
68
    char brkp[1];
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    char brkp[1];
69
    int rc;
74
    int rc;
70
 
75
 
71
    rc = udebug_mem_read(app_phone, &b->arch.back, b->addr, 1);
76
    rc = udebug_mem_read(app_phone, &b->arch.back, b->addr, 1);
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    cons_printf("udebug_mem_read() -> %d\n", rc);
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    cons_printf("udebug_mem_read() -> %d\n", rc);
73
    if (rc < 0) return rc;
78
    if (rc < 0) return rc;
74
 
79
 
75
    brkp[0] = OPCODE_INT3;
80
    brkp[0] = OPCODE_INT3;
76
    rc = udebug_mem_write(app_phone, brkp, b->addr, 1);
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    rc = udebug_mem_write(app_phone, brkp, b->addr, 1);
77
    if (rc < 0) return rc;
82
    if (rc < 0) return rc;
78
 
83
 
79
    cons_printf("udebug_mem_write() -> %d\n", rc);
84
    cons_printf("udebug_mem_write() -> %d\n", rc);
80
    return 0;
85
    return 0;
81
}
86
}
82
 
87
 
83
int arch_breakpoint_remove(breakpoint_t *b)
88
int arch_breakpoint_remove(breakpoint_t *b)
84
{
89
{
85
    int rc;
90
    int rc;
86
 
91
 
87
    if (b->active) {
92
    if (b->active) {
88
        active_bkpt = NULL;
93
        active_bkpt = NULL;
89
    } else {
94
    } else {
90
            rc = udebug_mem_write(app_phone, &b->arch.back, b->addr, 1);
95
            rc = udebug_mem_write(app_phone, &b->arch.back, b->addr, 1);
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        if (rc < 0) {
96
        if (rc < 0) {
92
            cons_printf("error writing mem\n");
97
            cons_printf("error writing mem\n");
93
            return rc;
98
            return rc;
94
        }
99
        }
95
    }
100
    }
96
 
101
 
97
    return 0;
102
    return 0;
98
}
103
}
99
 
104
 
100
void arch_event_breakpoint(thash_t thread_hash)
105
void arch_event_breakpoint(thash_t thread_hash)
101
{
106
{
102
    static istate_t istate;
107
    static istate_t istate;
103
    breakpoint_t *b;
108
    breakpoint_t *b;
104
    int rc;
109
    int rc;
105
 
110
 
106
    rc = udebug_regs_read(app_phone, thread_hash, &istate);
111
    rc = udebug_regs_read(app_phone, thread_hash, &istate);
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//  cons_printf("udebug_regs_read -> %d\n", rc);
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//  cons_printf("udebug_regs_read -> %d\n", rc);
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//  cons_printf("EIP was 0x%08x\n", istate.eip);
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//  cons_printf("EIP was 0x%08x\n", istate.eip);
109
    int brk_addr = istate.eip - 1;
114
    int brk_addr = istate.eip - 1;
110
 
115
 
111
    b = breakpoint_find_by_addr(brk_addr);
116
    b = breakpoint_find_by_addr(brk_addr);
112
    if (!b) {
117
    if (!b) {
113
        cons_printf("unrecognized breakpoint at 0x%x\n", brk_addr);
118
        cons_printf("unrecognized breakpoint at 0x%x\n", brk_addr);
114
        return;
119
        return;
115
    }
120
    }
116
 
121
 
117
    istate.eip = brk_addr;
122
    istate.eip = brk_addr;
118
    istate.eflags |= 0x0100; /* trap flag */
123
    istate.eflags |= 0x0100; /* trap flag */
119
 
124
 
120
    rc = udebug_regs_write(app_phone, thread_hash, &istate);
125
    rc = udebug_regs_write(app_phone, thread_hash, &istate);
121
    if (rc < 0) { cons_printf("error writing regs\n"); return; }
126
    if (rc < 0) { cons_printf("error writing regs\n"); return; }
122
        rc = udebug_mem_write(app_phone, &b->arch.back, brk_addr, 1);
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        rc = udebug_mem_write(app_phone, &b->arch.back, brk_addr, 1);
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    if (rc < 0) { cons_printf("error writing mem\n"); return; }
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    if (rc < 0) { cons_printf("error writing mem\n"); return; }
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//      cons_printf("udebug_mem_write(phone, 0x%x, 0x%02x, 1) -> %d\n", brk_addr, brk_list[bi].arch.back, rc);
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//      cons_printf("udebug_mem_write(phone, 0x%x, 0x%02x, 1) -> %d\n", brk_addr, brk_list[bi].arch.back, rc);
125
 
130
 
126
    b->active = true;
131
    b->active = true;
127
    active_bkpt = b;
132
    active_bkpt = b;
128
 
133
 
129
    breakpoint_hit(b);
134
    breakpoint_hit(b);
130
}
135
}
131
 
136
 
132
void arch_event_trap(dthread_t *dt)
137
void arch_event_trap(dthread_t *dt)
133
{
138
{
134
    breakpoint_t *b;
139
    breakpoint_t *b;
135
    static istate_t istate;
140
    static istate_t istate;
136
    unsigned char brkinstr[1];
141
    unsigned char brkinstr[1];
137
    int rc;
142
    int rc;
138
 
143
 
139
//  cons_printf("trap event\n");
144
//  cons_printf("trap event\n");
140
    b = active_bkpt;
145
    b = active_bkpt;
141
   
146
   
142
    if (b) {
147
    if (b) {
143
        brkinstr[0] = OPCODE_INT3;
148
        brkinstr[0] = OPCODE_INT3;
144
        rc = udebug_mem_write(app_phone, brkinstr, b->addr, 1);
149
        rc = udebug_mem_write(app_phone, brkinstr, b->addr, 1);
145
//      cons_printf("restore breakpoint -> %d\n", rc);
150
//      cons_printf("restore breakpoint -> %d\n", rc);
146
        active_bkpt = NULL;
151
        active_bkpt = NULL;
147
    }
152
    }
148
 
153
 
149
    rc = _set_trap_flag(dt, false);
154
    rc = _set_trap_flag(dt, false);
150
    dt->arch.singlestep = false;
155
    dt->arch.singlestep = false;
151
 
156
 
152
    singlestep_hit();
157
    singlestep_hit();
153
}
158
}
154
 
159
 
155
void arch_dump_regs(thash_t thash)
160
void arch_dump_regs(thash_t thash)
156
{
161
{
157
    static istate_t istate;
162
    static istate_t istate;
158
    int rc;
163
    int rc;
159
 
164
 
160
    rc = udebug_regs_read(app_phone, thash, &istate);
165
    rc = udebug_regs_read(app_phone, thash, &istate);
161
    if (rc < 0) { cons_printf("Error reading regs\n"); return; }
166
    if (rc < 0) { cons_printf("Error reading regs\n"); return; }
162
 
167
 
163
    cons_printf(
168
    cons_printf(
164
        "eip:%08x eflags:%08x eax:%08x ebx:%08x ecx:%08x edx:%08x\n"
169
        "eip:%08x eflags:%08x eax:%08x ebx:%08x ecx:%08x edx:%08x\n"
165
        "esi:%08x edi:%08x cs:%04x ds:%04x es:%04x fs:%04x gs:%04x\n",
170
        "esi:%08x edi:%08x cs:%04x ds:%04x es:%04x fs:%04x gs:%04x\n",
166
        istate.eip, istate.eflags, istate.eax, istate.ebx,
171
        istate.eip, istate.eflags, istate.eax, istate.ebx,
167
        istate.ecx, istate.edx, istate.esi, istate.edi, istate.cs,
172
        istate.ecx, istate.edx, istate.esi, istate.edi, istate.cs,
168
        istate.ds, istate.es, istate.fs, istate.gs);
173
        istate.ds, istate.es, istate.fs, istate.gs);
169
}
174
}
170
 
175
 
171
void arch_singlestep(dthread_t *dt)
176
void arch_singlestep(dthread_t *dt)
172
{
177
{
173
    int rc;
178
    int rc;
174
 
179
 
175
    rc = _set_trap_flag(dt, true);
180
    rc = _set_trap_flag(dt, true);
176
    if (rc != 0) return;
181
    if (rc != 0) return;
177
 
182
 
178
    dthread_resume(dt);
183
    dthread_resume(dt);
179
}
184
}
180
 
185
 
181
/** @}
186
/** @}
182
 */
187
 */
183
 
188