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1 | # |
1 | # |
2 | # Copyright (c) 2005 Jakub Jermar |
2 | # Copyright (c) 2005 Jakub Jermar |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | #include <arch/register.h> |
29 | #include <arch/register.h> |
30 | #include <arch/mm/page.h> |
30 | #include <arch/mm/page.h> |
31 | #include <arch/mm/asid.h> |
31 | #include <arch/mm/asid.h> |
32 | #include <mm/asid.h> |
32 | #include <mm/asid.h> |
33 | 33 | ||
34 | #define RR_MASK (0xFFFFFFFF00000002) |
34 | #define RR_MASK (0xFFFFFFFF00000002) |
35 | #define RID_SHIFT 8 |
35 | #define RID_SHIFT 8 |
36 | #define PS_SHIFT 2 |
36 | #define PS_SHIFT 2 |
37 | 37 | ||
38 | #define KERNEL_TRANSLATION_I 0x0010000000000661 |
38 | #define KERNEL_TRANSLATION_I 0x0010000000000661 |
39 | #define KERNEL_TRANSLATION_D 0x0010000000000661 |
39 | #define KERNEL_TRANSLATION_D 0x0010000000000661 |
- | 40 | #define KERNEL_TRANSLATION_VIO 0x0010000000000671 |
|
- | 41 | #define KERNEL_TRANSLATION_IO 0x00100FFFFC000671 |
|
- | 42 | #define VIO_OFFSET 0x0002000000000000 |
|
- | 43 | ||
- | 44 | #define IO_OFFSET 0x0001000000000000 |
|
- | 45 | ||
- | 46 | ||
40 | 47 | ||
41 | .section K_TEXT_START, "ax" |
48 | .section K_TEXT_START, "ax" |
42 | 49 | ||
43 | .global kernel_image_start |
50 | .global kernel_image_start |
44 | 51 | ||
45 | stack0: |
52 | stack0: |
46 | kernel_image_start: |
53 | kernel_image_start: |
47 | .auto |
54 | .auto |
48 | 55 | ||
- | 56 | mov psr.l = r0 |
|
- | 57 | srlz.i |
|
- | 58 | srlz.d |
|
- | 59 | ||
49 | # Fill TR.i and TR.d using Region Register #VRN_KERNEL |
60 | # Fill TR.i and TR.d using Region Register #VRN_KERNEL |
50 | 61 | ||
- | 62 | ||
51 | movl r8 = (VRN_KERNEL << VRN_SHIFT) |
63 | movl r8 = (VRN_KERNEL << VRN_SHIFT) |
52 | mov r9 = rr[r8] |
64 | mov r9 = rr[r8] |
- | 65 | ||
- | 66 | ||
53 | movl r10 = (RR_MASK) |
67 | movl r10 = (RR_MASK) |
54 | and r9 = r10, r9 |
68 | and r9 = r10, r9 |
55 | movl r10 = ((RID_KERNEL << RID_SHIFT) | (KERNEL_PAGE_WIDTH << PS_SHIFT)) |
69 | movl r10 = ((RID_KERNEL << RID_SHIFT) | (KERNEL_PAGE_WIDTH << PS_SHIFT)) |
56 | or r9 = r10, r9 |
70 | or r9 = r10, r9 |
- | 71 | ||
- | 72 | ||
57 | mov rr[r8] = r9 |
73 | mov rr[r8] = r9 |
58 | 74 | ||
- | 75 | ||
- | 76 | ||
59 | movl r8 = (VRN_KERNEL << VRN_SHIFT) |
77 | movl r8 = (VRN_KERNEL << VRN_SHIFT) |
60 | mov cr.ifa = r8 |
78 | mov cr.ifa = r8 |
- | 79 | ||
- | 80 | ||
- | 81 | mov r11 = cr.itir ;; |
|
61 | movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT) |
82 | movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT);; |
- | 83 | or r10 =r10 , r11 ;; |
|
62 | mov cr.itir = r10 |
84 | mov cr.itir = r10;; |
- | 85 | ||
- | 86 | ||
63 | movl r10 = (KERNEL_TRANSLATION_I) |
87 | movl r10 = (KERNEL_TRANSLATION_I) |
64 | itr.i itr[r0] = r10 |
88 | itr.i itr[r0] = r10 |
- | 89 | ||
- | 90 | ||
65 | movl r10 = (KERNEL_TRANSLATION_D) |
91 | movl r10 = (KERNEL_TRANSLATION_D) |
66 | itr.d dtr[r0] = r10 |
92 | itr.d dtr[r0] = r10 |
67 | 93 | ||
- | 94 | ||
- | 95 | movl r7 = 1 |
|
- | 96 | movl r8 = (VRN_KERNEL << VRN_SHIFT) | VIO_OFFSET |
|
- | 97 | mov cr.ifa = r8 |
|
- | 98 | movl r10 = (KERNEL_TRANSLATION_VIO) |
|
- | 99 | itr.d dtr[r7] = r10 |
|
- | 100 | ||
- | 101 | ||
- | 102 | mov r11 = cr.itir ;; |
|
- | 103 | movl r10 = ~0xfc;; |
|
- | 104 | and r10 =r10 , r11 ;; |
|
- | 105 | movl r11 = (IO_PAGE_WIDTH << PS_SHIFT);; |
|
- | 106 | or r10 =r10 , r11 ;; |
|
- | 107 | mov cr.itir = r10;; |
|
- | 108 | ||
- | 109 | ||
- | 110 | movl r7 = 2 |
|
- | 111 | movl r8 = (VRN_KERNEL << VRN_SHIFT) | IO_OFFSET |
|
- | 112 | mov cr.ifa = r8 |
|
- | 113 | movl r10 = (KERNEL_TRANSLATION_IO) |
|
- | 114 | itr.d dtr[r7] = r10 |
|
- | 115 | ||
- | 116 | ||
- | 117 | ||
- | 118 | ||
68 | # initialize PSR |
119 | # initialize PSR |
69 | mov psr.l = r0 |
- | |
70 | srlz.i |
- | |
71 | srlz.d |
- | |
72 | movl r10 = (PSR_DT_MASK | PSR_RT_MASK | PSR_IT_MASK | PSR_IC_MASK) /* Enable paging */ |
120 | movl r10 = (PSR_DT_MASK | PSR_RT_MASK | PSR_IT_MASK | PSR_IC_MASK) /* Enable paging */ |
73 | mov r9 = psr |
121 | mov r9 = psr |
74 | or r10 = r10, r9 |
122 | or r10 = r10, r9 |
75 | mov cr.ipsr = r10 |
123 | mov cr.ipsr = r10 |
76 | mov cr.ifs = r0 |
124 | mov cr.ifs = r0 |
77 | movl r8 = paging_start |
125 | movl r8 = paging_start |
78 | mov cr.iip = r8 |
126 | mov cr.iip = r8 |
79 | srlz.d |
127 | srlz.d |
80 | srlz.i |
128 | srlz.i |
81 | 129 | ||
82 | .explicit |
130 | .explicit |
83 | /* |
131 | /* |
84 | * Return From Interupt is the only the way to fill upper half word of PSR. |
132 | * Return From Interupt is the only the way to fill upper half word of PSR. |
85 | */ |
133 | */ |
86 | rfi;; |
134 | rfi;; |
87 | 135 | ||
88 | .global paging_start |
136 | .global paging_start |
89 | paging_start: |
137 | paging_start: |
90 | 138 | ||
91 | /* |
139 | /* |
92 | * Now we are paging. |
140 | * Now we are paging. |
93 | */ |
141 | */ |
94 | 142 | ||
95 | # switch to register bank 1 |
143 | # switch to register bank 1 |
96 | bsw.1 |
144 | bsw.1 |
97 | 145 | ||
98 | # initialize register stack |
146 | # initialize register stack |
99 | mov ar.rsc = r0 |
147 | mov ar.rsc = r0 |
100 | movl r8 = (VRN_KERNEL << VRN_SHIFT) ;; |
148 | movl r8 = (VRN_KERNEL << VRN_SHIFT) ;; |
101 | mov ar.bspstore = r8 |
149 | mov ar.bspstore = r8 |
102 | loadrs |
150 | loadrs |
103 | 151 | ||
104 | # initialize memory stack to some sane value |
152 | # initialize memory stack to some sane value |
105 | movl r12 = stack0 ;; |
153 | movl r12 = stack0 ;; |
106 | 154 | ||
107 | add r12 = -16, r12 /* allocate a scratch area on the stack */ |
155 | add r12 = -16, r12 /* allocate a scratch area on the stack */ |
108 | 156 | ||
109 | # initialize gp (Global Pointer) register |
157 | # initialize gp (Global Pointer) register |
110 | movl r20 = (VRN_KERNEL << VRN_SHIFT);; |
158 | movl r20 = (VRN_KERNEL << VRN_SHIFT);; |
111 | or r20 = r20,r1;; |
159 | or r20 = r20,r1;; |
112 | movl r1 = _hardcoded_load_address |
160 | movl r1 = _hardcoded_load_address |
113 | 161 | ||
114 | /* |
162 | /* |
115 | * Initialize hardcoded_* variables. |
163 | * Initialize hardcoded_* variables. |
116 | */ |
164 | */ |
117 | movl r14 = _hardcoded_ktext_size |
165 | movl r14 = _hardcoded_ktext_size |
118 | movl r15 = _hardcoded_kdata_size |
166 | movl r15 = _hardcoded_kdata_size |
119 | movl r16 = _hardcoded_load_address ;; |
167 | movl r16 = _hardcoded_load_address ;; |
120 | addl r17 = @gprel(hardcoded_ktext_size), gp |
168 | addl r17 = @gprel(hardcoded_ktext_size), gp |
121 | addl r18 = @gprel(hardcoded_kdata_size), gp |
169 | addl r18 = @gprel(hardcoded_kdata_size), gp |
122 | addl r19 = @gprel(hardcoded_load_address), gp |
170 | addl r19 = @gprel(hardcoded_load_address), gp |
123 | addl r21 = @gprel(bootinfo), gp |
171 | addl r21 = @gprel(bootinfo), gp |
124 | ;; |
172 | ;; |
125 | st8 [r17] = r14 |
173 | st8 [r17] = r14 |
126 | st8 [r18] = r15 |
174 | st8 [r18] = r15 |
127 | st8 [r19] = r16 |
175 | st8 [r19] = r16 |
128 | st8 [r21] = r20 |
176 | st8 [r21] = r20 |
129 | 177 | ||
130 | ssm (1 << 19) ;; /* Disable f32 - f127 */ |
178 | ssm (1 << 19) ;; /* Disable f32 - f127 */ |
131 | srlz.i |
179 | srlz.i |
132 | srlz.d ;; |
180 | srlz.d ;; |
133 | 181 | ||
134 | br.call.sptk.many b0 = arch_pre_main |
182 | br.call.sptk.many b0 = arch_pre_main |
135 | 183 | ||
136 | movl r18 = main_bsp ;; |
184 | movl r18 = main_bsp ;; |
137 | mov b1 = r18 ;; |
185 | mov b1 = r18 ;; |
138 | br.call.sptk.many b0 = b1 |
186 | br.call.sptk.many b0 = b1 |
139 | 187 | ||
140 | 188 | ||
141 | 0: |
189 | 0: |
142 | br 0b |
190 | br 0b |
143 | 191 |