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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia64 |
29 | /** @addtogroup ia64 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #ifndef KERN_ia64_CPU_H_ |
35 | #ifndef KERN_ia64_CPU_H_ |
36 | #define KERN_ia64_CPU_H_ |
36 | #define KERN_ia64_CPU_H_ |
37 | 37 | ||
38 | #include <arch/types.h> |
38 | #include <arch/types.h> |
39 | #include <arch/register.h> |
39 | #include <arch/register.h> |
40 | #include <arch/asm.h> |
40 | #include <arch/asm.h> |
41 | #include <arch/bootinfo.h> |
41 | #include <arch/bootinfo.h> |
42 | 42 | ||
43 | #define FAMILY_ITANIUM 0x7 |
43 | #define FAMILY_ITANIUM 0x7 |
44 | #define FAMILY_ITANIUM2 0x1f |
44 | #define FAMILY_ITANIUM2 0x1f |
45 | 45 | ||
46 | typedef struct { |
46 | typedef struct { |
47 | uint64_t cpuid0; |
47 | uint64_t cpuid0; |
48 | uint64_t cpuid1; |
48 | uint64_t cpuid1; |
49 | cpuid3_t cpuid3; |
49 | cpuid3_t cpuid3; |
50 | } cpu_arch_t; |
50 | } cpu_arch_t; |
51 | 51 | ||
52 | /** Read CPUID register. |
52 | /** Read CPUID register. |
53 | * |
53 | * |
54 | * @param n CPUID register number. |
54 | * @param n CPUID register number. |
55 | * |
55 | * |
56 | * @return Value of CPUID[n] register. |
56 | * @return Value of CPUID[n] register. |
57 | */ |
57 | */ |
58 | static inline uint64_t cpuid_read(int n) |
58 | static inline uint64_t cpuid_read(int n) |
59 | { |
59 | { |
60 | uint64_t v; |
60 | uint64_t v; |
61 | 61 | ||
62 | asm volatile ("mov %0 = cpuid[%1]\n" : "=r" (v) : "r" (n)); |
62 | asm volatile ("mov %0 = cpuid[%1]\n" : "=r" (v) : "r" (n)); |
63 | 63 | ||
64 | return v; |
64 | return v; |
65 | } |
65 | } |
66 | 66 | ||
67 | 67 | ||
68 | #define CR64_ID_SHIFT 24 |
68 | #define CR64_ID_SHIFT 24 |
69 | #define CR64_ID_MASK 0xff000000 |
69 | #define CR64_ID_MASK 0xff000000 |
70 | #define CR64_EID_SHIFT 16 |
70 | #define CR64_EID_SHIFT 16 |
71 | #define CR64_EID_MASK 0xff0000 |
71 | #define CR64_EID_MASK 0xff0000 |
72 | 72 | ||
73 | static inline int ia64_get_cpu_id(void) |
73 | static inline int ia64_get_cpu_id(void) |
74 | { |
74 | { |
75 | uint64_t cr64=cr64_read(); |
75 | uint64_t cr64=cr64_read(); |
76 | return ((CR64_ID_MASK)&cr64)>>CR64_ID_SHIFT; |
76 | return ((CR64_ID_MASK)&cr64)>>CR64_ID_SHIFT; |
77 | } |
77 | } |
78 | 78 | ||
79 | static inline int ia64_get_cpu_eid(void) |
79 | static inline int ia64_get_cpu_eid(void) |
80 | { |
80 | { |
81 | uint64_t cr64=cr64_read(); |
81 | uint64_t cr64=cr64_read(); |
82 | return ((CR64_EID_MASK)&cr64)>>CR64_EID_SHIFT; |
82 | return ((CR64_EID_MASK)&cr64)>>CR64_EID_SHIFT; |
83 | } |
83 | } |
84 | 84 | ||
85 | 85 | ||
86 | - | ||
87 | static inline void ipi_send_ipi(int id,int eid,int intno) |
86 | static inline void ipi_send_ipi(int id, int eid, int intno) |
88 | { |
87 | { |
89 | (bootinfo->sapic)[2*(id*256+eid)]=intno; |
88 | (bootinfo->sapic)[2 * (id * 256 + eid)] = intno; |
90 | srlz_d(); |
89 | srlz_d(); |
91 | 90 | ||
92 | } |
91 | } |
93 | 92 | ||
94 | - | ||
95 | - | ||
96 | #endif |
93 | #endif |
97 | 94 | ||
98 | /** @} |
95 | /** @} |
99 | */ |
96 | */ |
100 | 97 |