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1 | /* |
1 | /* |
2 | * Copyright (c) 2001-2004 Jakub Jermar |
2 | * Copyright (c) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup amd64interrupt |
29 | /** @addtogroup amd64interrupt |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch/interrupt.h> |
35 | #include <arch/interrupt.h> |
36 | #include <print.h> |
36 | #include <print.h> |
37 | #include <debug.h> |
37 | #include <debug.h> |
38 | #include <panic.h> |
38 | #include <panic.h> |
39 | #include <arch/drivers/i8259.h> |
39 | #include <arch/drivers/i8259.h> |
40 | #include <func.h> |
40 | #include <func.h> |
41 | #include <cpu.h> |
41 | #include <cpu.h> |
42 | #include <arch/asm.h> |
42 | #include <arch/asm.h> |
43 | #include <mm/tlb.h> |
43 | #include <mm/tlb.h> |
44 | #include <mm/as.h> |
44 | #include <mm/as.h> |
45 | #include <arch.h> |
45 | #include <arch.h> |
46 | #include <symtab.h> |
- | |
47 | #include <arch/asm.h> |
46 | #include <arch/asm.h> |
48 | #include <proc/scheduler.h> |
47 | #include <proc/scheduler.h> |
49 | #include <proc/thread.h> |
48 | #include <proc/thread.h> |
50 | #include <proc/task.h> |
49 | #include <proc/task.h> |
51 | #include <synch/spinlock.h> |
50 | #include <synch/spinlock.h> |
52 | #include <arch/ddi/ddi.h> |
51 | #include <arch/ddi/ddi.h> |
53 | #include <interrupt.h> |
52 | #include <interrupt.h> |
54 | #include <ddi/irq.h> |
53 | #include <ddi/irq.h> |
- | 54 | #include <symtab.h> |
|
55 | 55 | ||
56 | /* |
56 | /* |
57 | * Interrupt and exception dispatching. |
57 | * Interrupt and exception dispatching. |
58 | */ |
58 | */ |
59 | 59 | ||
60 | void (* disable_irqs_function)(uint16_t irqmask) = NULL; |
60 | void (* disable_irqs_function)(uint16_t irqmask) = NULL; |
61 | void (* enable_irqs_function)(uint16_t irqmask) = NULL; |
61 | void (* enable_irqs_function)(uint16_t irqmask) = NULL; |
62 | void (* eoi_function)(void) = NULL; |
62 | void (* eoi_function)(void) = NULL; |
63 | 63 | ||
64 | void decode_istate(int n, istate_t *istate) |
64 | void decode_istate(int n, istate_t *istate) |
65 | { |
65 | { |
66 | char *symbol; |
66 | char *symbol; |
67 | /* uint64_t *x = &istate->stack[0]; */ |
- | |
68 | 67 | ||
69 | if (!(symbol = get_symtab_entry(istate->rip))) |
68 | symbol = symtab_fmt_name_lookup(istate->rip); |
70 | symbol = ""; |
- | |
71 | 69 | ||
72 | printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n", n, __func__); |
70 | printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n", n, __func__); |
73 | printf("%%rip: %#llx (%s)\n", istate->rip, symbol); |
71 | printf("%%rip: %#llx (%s)\n", istate->rip, symbol); |
74 | printf("ERROR_WORD=%#llx\n", istate->error_word); |
72 | printf("ERROR_WORD=%#llx\n", istate->error_word); |
75 | printf("%%cs=%#llx, rflags=%#llx, %%cr0=%#llx\n", istate->cs, |
73 | printf("%%cs=%#llx, rflags=%#llx, %%cr0=%#llx\n", istate->cs, |
76 | istate->rflags, read_cr0()); |
74 | istate->rflags, read_cr0()); |
77 | printf("%%rax=%#llx, %%rcx=%#llx, %%rdx=%#llx\n", istate->rax, |
75 | printf("%%rax=%#llx, %%rcx=%#llx, %%rdx=%#llx\n", istate->rax, |
78 | istate->rcx, istate->rdx); |
76 | istate->rcx, istate->rdx); |
79 | printf("%%rsi=%#llx, %%rdi=%#llx, %%r8=%#llx\n", istate->rsi, |
77 | printf("%%rsi=%#llx, %%rdi=%#llx, %%r8=%#llx\n", istate->rsi, |
80 | istate->rdi, istate->r8); |
78 | istate->rdi, istate->r8); |
81 | printf("%%r9=%#llx, %%r10=%#llx, %%r11=%#llx\n", istate->r9, |
79 | printf("%%r9=%#llx, %%r10=%#llx, %%r11=%#llx\n", istate->r9, |
82 | istate->r10, istate->r11); |
80 | istate->r10, istate->r11); |
83 | #ifdef CONFIG_DEBUG_ALLREGS |
- | |
84 | printf("%%r12=%#llx, %%r13=%#llx, %%r14=%#llx\n", istate->r12, |
- | |
85 | istate->r13, istate->r14); |
- | |
86 | printf("%%r15=%#llx, %%rbx=%#llx, %%rbp=%#llx\n", istate->r15, |
- | |
87 | istate->rbx, &istate->rbp); |
- | |
88 | #endif |
- | |
89 | printf("%%rsp=%#llx\n", &istate->stack[0]); |
81 | printf("%%rsp=%#llx\n", &istate->stack[0]); |
90 | } |
82 | } |
91 | 83 | ||
92 | static void trap_virtual_eoi(void) |
84 | static void trap_virtual_eoi(void) |
93 | { |
85 | { |
94 | if (eoi_function) |
86 | if (eoi_function) |
95 | eoi_function(); |
87 | eoi_function(); |
96 | else |
88 | else |
97 | panic("no eoi_function\n"); |
89 | panic("No eoi_function."); |
98 | 90 | ||
99 | } |
91 | } |
100 | 92 | ||
101 | static void null_interrupt(int n, istate_t *istate) |
93 | static void null_interrupt(int n, istate_t *istate) |
102 | { |
94 | { |
103 | fault_if_from_uspace(istate, "unserviced interrupt: %d", n); |
95 | fault_if_from_uspace(istate, "Unserviced interrupt: %d.", n); |
104 | decode_istate(n, istate); |
96 | decode_istate(n, istate); |
105 | panic("unserviced interrupt\n"); |
97 | panic("Unserviced interrupt."); |
106 | } |
98 | } |
107 | 99 | ||
108 | /** General Protection Fault. */ |
100 | /** General Protection Fault. */ |
109 | static void gp_fault(int n, istate_t *istate) |
101 | static void gp_fault(int n, istate_t *istate) |
110 | { |
102 | { |
111 | if (TASK) { |
103 | if (TASK) { |
112 | count_t ver; |
104 | count_t ver; |
113 | 105 | ||
114 | spinlock_lock(&TASK->lock); |
106 | spinlock_lock(&TASK->lock); |
115 | ver = TASK->arch.iomapver; |
107 | ver = TASK->arch.iomapver; |
116 | spinlock_unlock(&TASK->lock); |
108 | spinlock_unlock(&TASK->lock); |
117 | 109 | ||
118 | if (CPU->arch.iomapver_copy != ver) { |
110 | if (CPU->arch.iomapver_copy != ver) { |
119 | /* |
111 | /* |
120 | * This fault can be caused by an early access |
112 | * This fault can be caused by an early access |
121 | * to I/O port because of an out-dated |
113 | * to I/O port because of an out-dated |
122 | * I/O Permission bitmap installed on CPU. |
114 | * I/O Permission bitmap installed on CPU. |
123 | * Install the fresh copy and restart |
115 | * Install the fresh copy and restart |
124 | * the instruction. |
116 | * the instruction. |
125 | */ |
117 | */ |
126 | io_perm_bitmap_install(); |
118 | io_perm_bitmap_install(); |
127 | return; |
119 | return; |
128 | } |
120 | } |
129 | fault_if_from_uspace(istate, "general protection fault"); |
121 | fault_if_from_uspace(istate, "General protection fault."); |
130 | } |
122 | } |
131 | 123 | ||
132 | decode_istate(n, istate); |
124 | decode_istate(n, istate); |
133 | panic("general protection fault\n"); |
125 | panic("General protection fault."); |
134 | } |
126 | } |
135 | 127 | ||
136 | static void ss_fault(int n, istate_t *istate) |
128 | static void ss_fault(int n, istate_t *istate) |
137 | { |
129 | { |
138 | fault_if_from_uspace(istate, "stack fault"); |
130 | fault_if_from_uspace(istate, "Stack fault."); |
139 | decode_istate(n, istate); |
131 | decode_istate(n, istate); |
140 | panic("stack fault\n"); |
132 | panic("Stack fault."); |
141 | } |
133 | } |
142 | 134 | ||
143 | static void nm_fault(int n, istate_t *istate) |
135 | static void nm_fault(int n, istate_t *istate) |
144 | { |
136 | { |
145 | #ifdef CONFIG_FPU_LAZY |
137 | #ifdef CONFIG_FPU_LAZY |
146 | scheduler_fpu_lazy_request(); |
138 | scheduler_fpu_lazy_request(); |
147 | #else |
139 | #else |
148 | fault_if_from_uspace(istate, "fpu fault"); |
140 | fault_if_from_uspace(istate, "FPU fault."); |
149 | panic("fpu fault"); |
141 | panic("FPU fault."); |
150 | #endif |
142 | #endif |
151 | } |
143 | } |
152 | 144 | ||
- | 145 | #ifdef CONFIG_SMP |
|
153 | static void tlb_shootdown_ipi(int n, istate_t *istate) |
146 | static void tlb_shootdown_ipi(int n, istate_t *istate) |
154 | { |
147 | { |
155 | trap_virtual_eoi(); |
148 | trap_virtual_eoi(); |
156 | tlb_shootdown_ipi_recv(); |
149 | tlb_shootdown_ipi_recv(); |
157 | } |
150 | } |
- | 151 | #endif |
|
158 | 152 | ||
159 | /** Handler of IRQ exceptions */ |
153 | /** Handler of IRQ exceptions */ |
160 | static void irq_interrupt(int n, istate_t *istate) |
154 | static void irq_interrupt(int n, istate_t *istate) |
161 | { |
155 | { |
162 | ASSERT(n >= IVT_IRQBASE); |
156 | ASSERT(n >= IVT_IRQBASE); |
163 | 157 | ||
164 | int inum = n - IVT_IRQBASE; |
158 | int inum = n - IVT_IRQBASE; |
165 | bool ack = false; |
159 | bool ack = false; |
166 | ASSERT(inum < IRQ_COUNT); |
160 | ASSERT(inum < IRQ_COUNT); |
167 | ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1)); |
161 | ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1)); |
168 | 162 | ||
169 | irq_t *irq = irq_dispatch_and_lock(inum); |
163 | irq_t *irq = irq_dispatch_and_lock(inum); |
170 | if (irq) { |
164 | if (irq) { |
171 | /* |
165 | /* |
172 | * The IRQ handler was found. |
166 | * The IRQ handler was found. |
173 | */ |
167 | */ |
174 | 168 | ||
175 | if (irq->preack) { |
169 | if (irq->preack) { |
176 | /* Send EOI before processing the interrupt */ |
170 | /* Send EOI before processing the interrupt */ |
177 | trap_virtual_eoi(); |
171 | trap_virtual_eoi(); |
178 | ack = true; |
172 | ack = true; |
179 | } |
173 | } |
180 | irq->handler(irq, irq->arg); |
174 | irq->handler(irq); |
181 | spinlock_unlock(&irq->lock); |
175 | spinlock_unlock(&irq->lock); |
182 | } else { |
176 | } else { |
183 | /* |
177 | /* |
184 | * Spurious interrupt. |
178 | * Spurious interrupt. |
185 | */ |
179 | */ |
186 | #ifdef CONFIG_DEBUG |
180 | #ifdef CONFIG_DEBUG |
187 | printf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, inum); |
181 | printf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, inum); |
188 | #endif |
182 | #endif |
189 | } |
183 | } |
190 | 184 | ||
191 | if (!ack) |
185 | if (!ack) |
192 | trap_virtual_eoi(); |
186 | trap_virtual_eoi(); |
193 | } |
187 | } |
194 | 188 | ||
195 | void interrupt_init(void) |
189 | void interrupt_init(void) |
196 | { |
190 | { |
197 | int i; |
191 | int i; |
198 | 192 | ||
199 | for (i = 0; i < IVT_ITEMS; i++) |
193 | for (i = 0; i < IVT_ITEMS; i++) |
200 | exc_register(i, "null", (iroutine) null_interrupt); |
194 | exc_register(i, "null", (iroutine) null_interrupt); |
201 | 195 | ||
202 | for (i = 0; i < IRQ_COUNT; i++) { |
196 | for (i = 0; i < IRQ_COUNT; i++) { |
203 | if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1)) |
197 | if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1)) |
204 | exc_register(IVT_IRQBASE + i, "irq", |
198 | exc_register(IVT_IRQBASE + i, "irq", |
205 | (iroutine) irq_interrupt); |
199 | (iroutine) irq_interrupt); |
206 | } |
200 | } |
207 | 201 | ||
208 | exc_register(7, "nm_fault", (iroutine) nm_fault); |
202 | exc_register(7, "nm_fault", (iroutine) nm_fault); |
209 | exc_register(12, "ss_fault", (iroutine) ss_fault); |
203 | exc_register(12, "ss_fault", (iroutine) ss_fault); |
210 | exc_register(13, "gp_fault", (iroutine) gp_fault); |
204 | exc_register(13, "gp_fault", (iroutine) gp_fault); |
211 | exc_register(14, "ident_mapper", (iroutine) ident_page_fault); |
205 | exc_register(14, "ident_mapper", (iroutine) ident_page_fault); |
212 | 206 | ||
213 | #ifdef CONFIG_SMP |
207 | #ifdef CONFIG_SMP |
214 | exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", |
208 | exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", |
215 | (iroutine) tlb_shootdown_ipi); |
209 | (iroutine) tlb_shootdown_ipi); |
216 | #endif |
210 | #endif |
217 | } |
211 | } |
218 | 212 | ||
219 | void trap_virtual_enable_irqs(uint16_t irqmask) |
213 | void trap_virtual_enable_irqs(uint16_t irqmask) |
220 | { |
214 | { |
221 | if (enable_irqs_function) |
215 | if (enable_irqs_function) |
222 | enable_irqs_function(irqmask); |
216 | enable_irqs_function(irqmask); |
223 | else |
217 | else |
224 | panic("no enable_irqs_function\n"); |
218 | panic("No enable_irqs_function."); |
225 | } |
219 | } |
226 | 220 | ||
227 | void trap_virtual_disable_irqs(uint16_t irqmask) |
221 | void trap_virtual_disable_irqs(uint16_t irqmask) |
228 | { |
222 | { |
229 | if (disable_irqs_function) |
223 | if (disable_irqs_function) |
230 | disable_irqs_function(irqmask); |
224 | disable_irqs_function(irqmask); |
231 | else |
225 | else |
232 | panic("no disable_irqs_function\n"); |
226 | panic("No disable_irqs_function."); |
233 | } |
227 | } |
234 | 228 | ||
235 | /** @} |
229 | /** @} |
236 | */ |
230 | */ |
237 | 231 |