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1 | /* |
1 | /* |
2 | * Copyright (c) 2006 Ondrej Palkovsky |
2 | * Copyright (c) 2006 Ondrej Palkovsky |
3 | * Copyright (c) 2006 Jakub Jermar |
3 | * Copyright (c) 2006 Jakub Jermar |
4 | * All rights reserved. |
4 | * All rights reserved. |
5 | * |
5 | * |
6 | * Redistribution and use in source and binary forms, with or without |
6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions |
7 | * modification, are permitted provided that the following conditions |
8 | * are met: |
8 | * are met: |
9 | * |
9 | * |
10 | * - Redistributions of source code must retain the above copyright |
10 | * - Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * - Redistributions in binary form must reproduce the above copyright |
12 | * - Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
14 | * documentation and/or other materials provided with the distribution. |
15 | * - The name of the author may not be used to endorse or promote products |
15 | * - The name of the author may not be used to endorse or promote products |
16 | * derived from this software without specific prior written permission. |
16 | * derived from this software without specific prior written permission. |
17 | * |
17 | * |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
28 | */ |
28 | */ |
29 | 29 | ||
30 | /** @addtogroup genericipc |
30 | /** @addtogroup genericipc |
31 | * @{ |
31 | * @{ |
32 | */ |
32 | */ |
33 | /** |
33 | /** |
34 | * @file |
34 | * @file |
35 | * @brief IRQ notification framework. |
35 | * @brief IRQ notification framework. |
36 | * |
36 | * |
37 | * This framework allows applications to register to receive a notification |
37 | * This framework allows applications to register to receive a notification |
38 | * when interrupt is detected. The application may provide a simple 'top-half' |
38 | * when interrupt is detected. The application may provide a simple 'top-half' |
39 | * handler as part of its registration, which can perform simple operations |
39 | * handler as part of its registration, which can perform simple operations |
40 | * (read/write port/memory, add information to notification ipc message). |
40 | * (read/write port/memory, add information to notification ipc message). |
41 | * |
41 | * |
42 | * The structure of a notification message is as follows: |
42 | * The structure of a notification message is as follows: |
43 | * - METHOD: method as registered by the SYS_IPC_REGISTER_IRQ syscall |
43 | * - METHOD: method as registered by the SYS_IPC_REGISTER_IRQ syscall |
44 | * - ARG1: payload modified by a 'top-half' handler |
44 | * - ARG1: payload modified by a 'top-half' handler |
45 | * - ARG2: payload modified by a 'top-half' handler |
45 | * - ARG2: payload modified by a 'top-half' handler |
46 | * - ARG3: payload modified by a 'top-half' handler |
46 | * - ARG3: payload modified by a 'top-half' handler |
47 | * - in_phone_hash: interrupt counter (may be needed to assure correct order |
47 | * - in_phone_hash: interrupt counter (may be needed to assure correct order |
48 | * in multithreaded drivers) |
48 | * in multithreaded drivers) |
49 | */ |
49 | */ |
50 | 50 | ||
51 | #include <arch.h> |
51 | #include <arch.h> |
52 | #include <arch/asm.h> |
52 | #include <arch/asm.h> |
53 | #include <mm/slab.h> |
53 | #include <mm/slab.h> |
54 | #include <errno.h> |
54 | #include <errno.h> |
55 | #include <ddi/irq.h> |
55 | #include <ddi/irq.h> |
56 | #include <ipc/ipc.h> |
56 | #include <ipc/ipc.h> |
57 | #include <ipc/irq.h> |
57 | #include <ipc/irq.h> |
58 | #include <syscall/copy.h> |
58 | #include <syscall/copy.h> |
59 | #include <console/console.h> |
59 | #include <console/console.h> |
60 | #include <print.h> |
60 | #include <print.h> |
61 | 61 | ||
- | 62 | #if defined(sparc64) && defined(SUN4V) |
|
- | 63 | #include <arch/drivers/niagara.h> |
|
- | 64 | #endif |
|
- | 65 | ||
62 | /** Execute code associated with IRQ notification. |
66 | /** Execute code associated with IRQ notification. |
63 | * |
67 | * |
64 | * @param call Notification call. |
68 | * @param call Notification call. |
65 | * @param code Top-half pseudocode. |
69 | * @param code Top-half pseudocode. |
66 | */ |
70 | */ |
67 | static void code_execute(call_t *call, irq_code_t *code) |
71 | static void code_execute(call_t *call, irq_code_t *code) |
68 | { |
72 | { |
69 | unsigned int i; |
73 | unsigned int i; |
70 | unative_t dstval = 0; |
74 | unative_t dstval = 0; |
71 | 75 | ||
72 | if (!code) |
76 | if (!code) |
73 | return; |
77 | return; |
74 | 78 | ||
75 | for (i = 0; i < code->cmdcount; i++) { |
79 | for (i = 0; i < code->cmdcount; i++) { |
76 | switch (code->cmds[i].cmd) { |
80 | switch (code->cmds[i].cmd) { |
77 | case CMD_MEM_READ_1: |
81 | case CMD_MEM_READ_1: |
78 | dstval = *((uint8_t *) code->cmds[i].addr); |
82 | dstval = *((uint8_t *) code->cmds[i].addr); |
79 | break; |
83 | break; |
80 | case CMD_MEM_READ_2: |
84 | case CMD_MEM_READ_2: |
81 | dstval = *((uint16_t *) code->cmds[i].addr); |
85 | dstval = *((uint16_t *) code->cmds[i].addr); |
82 | break; |
86 | break; |
83 | case CMD_MEM_READ_4: |
87 | case CMD_MEM_READ_4: |
84 | dstval = *((uint32_t *) code->cmds[i].addr); |
88 | dstval = *((uint32_t *) code->cmds[i].addr); |
85 | break; |
89 | break; |
86 | case CMD_MEM_READ_8: |
90 | case CMD_MEM_READ_8: |
87 | dstval = *((uint64_t *) code->cmds[i].addr); |
91 | dstval = *((uint64_t *) code->cmds[i].addr); |
88 | break; |
92 | break; |
89 | case CMD_MEM_WRITE_1: |
93 | case CMD_MEM_WRITE_1: |
90 | *((uint8_t *) code->cmds[i].addr) = code->cmds[i].value; |
94 | *((uint8_t *) code->cmds[i].addr) = code->cmds[i].value; |
91 | break; |
95 | break; |
92 | case CMD_MEM_WRITE_2: |
96 | case CMD_MEM_WRITE_2: |
93 | *((uint16_t *) code->cmds[i].addr) = |
97 | *((uint16_t *) code->cmds[i].addr) = |
94 | code->cmds[i].value; |
98 | code->cmds[i].value; |
95 | break; |
99 | break; |
96 | case CMD_MEM_WRITE_4: |
100 | case CMD_MEM_WRITE_4: |
97 | *((uint32_t *) code->cmds[i].addr) = |
101 | *((uint32_t *) code->cmds[i].addr) = |
98 | code->cmds[i].value; |
102 | code->cmds[i].value; |
99 | break; |
103 | break; |
100 | case CMD_MEM_WRITE_8: |
104 | case CMD_MEM_WRITE_8: |
101 | *((uint64_t *) code->cmds[i].addr) = |
105 | *((uint64_t *) code->cmds[i].addr) = |
102 | code->cmds[i].value; |
106 | code->cmds[i].value; |
103 | break; |
107 | break; |
104 | #if defined(ia32) || defined(amd64) || defined(ia64) |
108 | #if defined(ia32) || defined(amd64) || defined(ia64) |
105 | case CMD_PORT_READ_1: |
109 | case CMD_PORT_READ_1: |
106 | dstval = inb((long) code->cmds[i].addr); |
110 | dstval = inb((long) code->cmds[i].addr); |
107 | break; |
111 | break; |
108 | case CMD_PORT_WRITE_1: |
112 | case CMD_PORT_WRITE_1: |
109 | outb((long) code->cmds[i].addr, code->cmds[i].value); |
113 | outb((long) code->cmds[i].addr, code->cmds[i].value); |
110 | break; |
114 | break; |
111 | #endif |
115 | #endif |
112 | #if defined(ia64) && defined(SKI) |
116 | #if defined(ia64) && defined(SKI) |
113 | case CMD_IA64_GETCHAR: |
117 | case CMD_IA64_GETCHAR: |
114 | dstval = _getc(&ski_uconsole); |
118 | dstval = _getc(&ski_uconsole); |
115 | break; |
119 | break; |
- | 120 | #endif |
|
- | 121 | #if defined(sparc64) && defined(SUN4V) |
|
- | 122 | case CMD_NIAGARA_GETCHAR: |
|
- | 123 | dstval = niagara_getc(); |
|
- | 124 | break; |
|
116 | #endif |
125 | #endif |
117 | #if defined(ppc32) |
126 | #if defined(ppc32) |
118 | case CMD_PPC32_GETCHAR: |
127 | case CMD_PPC32_GETCHAR: |
119 | dstval = cuda_get_scancode(); |
128 | dstval = cuda_get_scancode(); |
120 | break; |
129 | break; |
121 | #endif |
130 | #endif |
122 | default: |
131 | default: |
123 | break; |
132 | break; |
124 | } |
133 | } |
125 | if (code->cmds[i].dstarg && code->cmds[i].dstarg < |
134 | if (code->cmds[i].dstarg && code->cmds[i].dstarg < |
126 | IPC_CALL_LEN) { |
135 | IPC_CALL_LEN) { |
127 | call->data.args[code->cmds[i].dstarg] = dstval; |
136 | call->data.args[code->cmds[i].dstarg] = dstval; |
128 | } |
137 | } |
129 | } |
138 | } |
130 | } |
139 | } |
131 | 140 | ||
132 | /** Free top-half pseudocode. |
141 | /** Free top-half pseudocode. |
133 | * |
142 | * |
134 | * @param code Pointer to the top-half pseudocode. |
143 | * @param code Pointer to the top-half pseudocode. |
135 | */ |
144 | */ |
136 | static void code_free(irq_code_t *code) |
145 | static void code_free(irq_code_t *code) |
137 | { |
146 | { |
138 | if (code) { |
147 | if (code) { |
139 | free(code->cmds); |
148 | free(code->cmds); |
140 | free(code); |
149 | free(code); |
141 | } |
150 | } |
142 | } |
151 | } |
143 | 152 | ||
144 | /** Copy top-half pseudocode from userspace into the kernel. |
153 | /** Copy top-half pseudocode from userspace into the kernel. |
145 | * |
154 | * |
146 | * @param ucode Userspace address of the top-half pseudocode. |
155 | * @param ucode Userspace address of the top-half pseudocode. |
147 | * |
156 | * |
148 | * @return Kernel address of the copied pseudocode. |
157 | * @return Kernel address of the copied pseudocode. |
149 | */ |
158 | */ |
150 | static irq_code_t *code_from_uspace(irq_code_t *ucode) |
159 | static irq_code_t *code_from_uspace(irq_code_t *ucode) |
151 | { |
160 | { |
152 | irq_code_t *code; |
161 | irq_code_t *code; |
153 | irq_cmd_t *ucmds; |
162 | irq_cmd_t *ucmds; |
154 | int rc; |
163 | int rc; |
155 | 164 | ||
156 | code = malloc(sizeof(*code), 0); |
165 | code = malloc(sizeof(*code), 0); |
157 | rc = copy_from_uspace(code, ucode, sizeof(*code)); |
166 | rc = copy_from_uspace(code, ucode, sizeof(*code)); |
158 | if (rc != 0) { |
167 | if (rc != 0) { |
159 | free(code); |
168 | free(code); |
160 | return NULL; |
169 | return NULL; |
161 | } |
170 | } |
162 | 171 | ||
163 | if (code->cmdcount > IRQ_MAX_PROG_SIZE) { |
172 | if (code->cmdcount > IRQ_MAX_PROG_SIZE) { |
164 | free(code); |
173 | free(code); |
165 | return NULL; |
174 | return NULL; |
166 | } |
175 | } |
167 | ucmds = code->cmds; |
176 | ucmds = code->cmds; |
168 | code->cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount, 0); |
177 | code->cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount, 0); |
169 | rc = copy_from_uspace(code->cmds, ucmds, |
178 | rc = copy_from_uspace(code->cmds, ucmds, |
170 | sizeof(code->cmds[0]) * code->cmdcount); |
179 | sizeof(code->cmds[0]) * code->cmdcount); |
171 | if (rc != 0) { |
180 | if (rc != 0) { |
172 | free(code->cmds); |
181 | free(code->cmds); |
173 | free(code); |
182 | free(code); |
174 | return NULL; |
183 | return NULL; |
175 | } |
184 | } |
176 | 185 | ||
177 | return code; |
186 | return code; |
178 | } |
187 | } |
179 | 188 | ||
180 | /** Unregister task from IRQ notification. |
189 | /** Unregister task from IRQ notification. |
181 | * |
190 | * |
182 | * @param box Answerbox associated with the notification. |
191 | * @param box Answerbox associated with the notification. |
183 | * @param inr IRQ number. |
192 | * @param inr IRQ number. |
184 | * @param devno Device number. |
193 | * @param devno Device number. |
185 | */ |
194 | */ |
186 | void ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno) |
195 | void ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno) |
187 | { |
196 | { |
188 | ipl_t ipl; |
197 | ipl_t ipl; |
189 | irq_t *irq; |
198 | irq_t *irq; |
190 | 199 | ||
191 | ipl = interrupts_disable(); |
200 | ipl = interrupts_disable(); |
192 | irq = irq_find_and_lock(inr, devno); |
201 | irq = irq_find_and_lock(inr, devno); |
193 | if (irq) { |
202 | if (irq) { |
194 | if (irq->notif_cfg.answerbox == box) { |
203 | if (irq->notif_cfg.answerbox == box) { |
195 | code_free(irq->notif_cfg.code); |
204 | code_free(irq->notif_cfg.code); |
196 | irq->notif_cfg.notify = false; |
205 | irq->notif_cfg.notify = false; |
197 | irq->notif_cfg.answerbox = NULL; |
206 | irq->notif_cfg.answerbox = NULL; |
198 | irq->notif_cfg.code = NULL; |
207 | irq->notif_cfg.code = NULL; |
199 | irq->notif_cfg.method = 0; |
208 | irq->notif_cfg.method = 0; |
200 | irq->notif_cfg.counter = 0; |
209 | irq->notif_cfg.counter = 0; |
201 | 210 | ||
202 | spinlock_lock(&box->irq_lock); |
211 | spinlock_lock(&box->irq_lock); |
203 | list_remove(&irq->notif_cfg.link); |
212 | list_remove(&irq->notif_cfg.link); |
204 | spinlock_unlock(&box->irq_lock); |
213 | spinlock_unlock(&box->irq_lock); |
205 | 214 | ||
206 | spinlock_unlock(&irq->lock); |
215 | spinlock_unlock(&irq->lock); |
207 | } |
216 | } |
208 | } |
217 | } |
209 | interrupts_restore(ipl); |
218 | interrupts_restore(ipl); |
210 | } |
219 | } |
211 | 220 | ||
212 | /** Register an answerbox as a receiving end for IRQ notifications. |
221 | /** Register an answerbox as a receiving end for IRQ notifications. |
213 | * |
222 | * |
214 | * @param box Receiving answerbox. |
223 | * @param box Receiving answerbox. |
215 | * @param inr IRQ number. |
224 | * @param inr IRQ number. |
216 | * @param devno Device number. |
225 | * @param devno Device number. |
217 | * @param method Method to be associated with the notification. |
226 | * @param method Method to be associated with the notification. |
218 | * @param ucode Uspace pointer to top-half pseudocode. |
227 | * @param ucode Uspace pointer to top-half pseudocode. |
219 | * |
228 | * |
220 | * @return EBADMEM, ENOENT or EEXISTS on failure or 0 on success. |
229 | * @return EBADMEM, ENOENT or EEXISTS on failure or 0 on success. |
221 | */ |
230 | */ |
222 | int ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno, |
231 | int ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno, |
223 | unative_t method, irq_code_t *ucode) |
232 | unative_t method, irq_code_t *ucode) |
224 | { |
233 | { |
225 | ipl_t ipl; |
234 | ipl_t ipl; |
226 | irq_code_t *code; |
235 | irq_code_t *code; |
227 | irq_t *irq; |
236 | irq_t *irq; |
228 | 237 | ||
229 | if (ucode) { |
238 | if (ucode) { |
230 | code = code_from_uspace(ucode); |
239 | code = code_from_uspace(ucode); |
231 | if (!code) |
240 | if (!code) |
232 | return EBADMEM; |
241 | return EBADMEM; |
233 | } else { |
242 | } else { |
234 | code = NULL; |
243 | code = NULL; |
235 | } |
244 | } |
236 | 245 | ||
237 | ipl = interrupts_disable(); |
246 | ipl = interrupts_disable(); |
238 | irq = irq_find_and_lock(inr, devno); |
247 | irq = irq_find_and_lock(inr, devno); |
239 | if (!irq) { |
248 | if (!irq) { |
240 | interrupts_restore(ipl); |
249 | interrupts_restore(ipl); |
241 | code_free(code); |
250 | code_free(code); |
242 | return ENOENT; |
251 | return ENOENT; |
243 | } |
252 | } |
244 | 253 | ||
245 | if (irq->notif_cfg.answerbox) { |
254 | if (irq->notif_cfg.answerbox) { |
246 | spinlock_unlock(&irq->lock); |
255 | spinlock_unlock(&irq->lock); |
247 | interrupts_restore(ipl); |
256 | interrupts_restore(ipl); |
248 | code_free(code); |
257 | code_free(code); |
249 | return EEXISTS; |
258 | return EEXISTS; |
250 | } |
259 | } |
251 | 260 | ||
252 | irq->notif_cfg.notify = true; |
261 | irq->notif_cfg.notify = true; |
253 | irq->notif_cfg.answerbox = box; |
262 | irq->notif_cfg.answerbox = box; |
254 | irq->notif_cfg.method = method; |
263 | irq->notif_cfg.method = method; |
255 | irq->notif_cfg.code = code; |
264 | irq->notif_cfg.code = code; |
256 | irq->notif_cfg.counter = 0; |
265 | irq->notif_cfg.counter = 0; |
257 | 266 | ||
258 | spinlock_lock(&box->irq_lock); |
267 | spinlock_lock(&box->irq_lock); |
259 | list_append(&irq->notif_cfg.link, &box->irq_head); |
268 | list_append(&irq->notif_cfg.link, &box->irq_head); |
260 | spinlock_unlock(&box->irq_lock); |
269 | spinlock_unlock(&box->irq_lock); |
261 | 270 | ||
262 | spinlock_unlock(&irq->lock); |
271 | spinlock_unlock(&irq->lock); |
263 | interrupts_restore(ipl); |
272 | interrupts_restore(ipl); |
264 | 273 | ||
265 | return 0; |
274 | return 0; |
266 | } |
275 | } |
267 | 276 | ||
268 | /** Add a call to the proper answerbox queue. |
277 | /** Add a call to the proper answerbox queue. |
269 | * |
278 | * |
270 | * Assume irq->lock is locked. |
279 | * Assume irq->lock is locked. |
271 | * |
280 | * |
272 | * @param irq IRQ structure referencing the target answerbox. |
281 | * @param irq IRQ structure referencing the target answerbox. |
273 | * @param call IRQ notification call. |
282 | * @param call IRQ notification call. |
274 | */ |
283 | */ |
275 | static void send_call(irq_t *irq, call_t *call) |
284 | static void send_call(irq_t *irq, call_t *call) |
276 | { |
285 | { |
277 | spinlock_lock(&irq->notif_cfg.answerbox->irq_lock); |
286 | spinlock_lock(&irq->notif_cfg.answerbox->irq_lock); |
278 | list_append(&call->link, &irq->notif_cfg.answerbox->irq_notifs); |
287 | list_append(&call->link, &irq->notif_cfg.answerbox->irq_notifs); |
279 | spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock); |
288 | spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock); |
280 | 289 | ||
281 | waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST); |
290 | waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST); |
282 | } |
291 | } |
283 | 292 | ||
284 | /** Send notification message. |
293 | /** Send notification message. |
285 | * |
294 | * |
286 | * @param irq IRQ structure. |
295 | * @param irq IRQ structure. |
287 | * @param a1 Driver-specific payload argument. |
296 | * @param a1 Driver-specific payload argument. |
288 | * @param a2 Driver-specific payload argument. |
297 | * @param a2 Driver-specific payload argument. |
289 | * @param a3 Driver-specific payload argument. |
298 | * @param a3 Driver-specific payload argument. |
290 | * @param a4 Driver-specific payload argument. |
299 | * @param a4 Driver-specific payload argument. |
291 | * @param a5 Driver-specific payload argument. |
300 | * @param a5 Driver-specific payload argument. |
292 | */ |
301 | */ |
293 | void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3, |
302 | void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3, |
294 | unative_t a4, unative_t a5) |
303 | unative_t a4, unative_t a5) |
295 | { |
304 | { |
296 | call_t *call; |
305 | call_t *call; |
297 | 306 | ||
298 | spinlock_lock(&irq->lock); |
307 | spinlock_lock(&irq->lock); |
299 | 308 | ||
300 | if (irq->notif_cfg.answerbox) { |
309 | if (irq->notif_cfg.answerbox) { |
301 | call = ipc_call_alloc(FRAME_ATOMIC); |
310 | call = ipc_call_alloc(FRAME_ATOMIC); |
302 | if (!call) { |
311 | if (!call) { |
303 | spinlock_unlock(&irq->lock); |
312 | spinlock_unlock(&irq->lock); |
304 | return; |
313 | return; |
305 | } |
314 | } |
306 | call->flags |= IPC_CALL_NOTIF; |
315 | call->flags |= IPC_CALL_NOTIF; |
307 | IPC_SET_METHOD(call->data, irq->notif_cfg.method); |
316 | IPC_SET_METHOD(call->data, irq->notif_cfg.method); |
308 | IPC_SET_ARG1(call->data, a1); |
317 | IPC_SET_ARG1(call->data, a1); |
309 | IPC_SET_ARG2(call->data, a2); |
318 | IPC_SET_ARG2(call->data, a2); |
310 | IPC_SET_ARG3(call->data, a3); |
319 | IPC_SET_ARG3(call->data, a3); |
311 | IPC_SET_ARG4(call->data, a4); |
320 | IPC_SET_ARG4(call->data, a4); |
312 | IPC_SET_ARG5(call->data, a5); |
321 | IPC_SET_ARG5(call->data, a5); |
313 | /* Put a counter to the message */ |
322 | /* Put a counter to the message */ |
314 | call->priv = ++irq->notif_cfg.counter; |
323 | call->priv = ++irq->notif_cfg.counter; |
315 | 324 | ||
316 | send_call(irq, call); |
325 | send_call(irq, call); |
317 | } |
326 | } |
318 | spinlock_unlock(&irq->lock); |
327 | spinlock_unlock(&irq->lock); |
319 | } |
328 | } |
320 | 329 | ||
321 | /** Notify a task that an IRQ had occurred. |
330 | /** Notify a task that an IRQ had occurred. |
322 | * |
331 | * |
323 | * We expect interrupts to be disabled and the irq->lock already held. |
332 | * We expect interrupts to be disabled and the irq->lock already held. |
324 | * |
333 | * |
325 | * @param irq IRQ structure. |
334 | * @param irq IRQ structure. |
326 | */ |
335 | */ |
327 | void ipc_irq_send_notif(irq_t *irq) |
336 | void ipc_irq_send_notif(irq_t *irq) |
328 | { |
337 | { |
329 | call_t *call; |
338 | call_t *call; |
330 | 339 | ||
331 | ASSERT(irq); |
340 | ASSERT(irq); |
332 | 341 | ||
333 | if (irq->notif_cfg.answerbox) { |
342 | if (irq->notif_cfg.answerbox) { |
334 | call = ipc_call_alloc(FRAME_ATOMIC); |
343 | call = ipc_call_alloc(FRAME_ATOMIC); |
335 | if (!call) { |
344 | if (!call) { |
336 | return; |
345 | return; |
337 | } |
346 | } |
338 | call->flags |= IPC_CALL_NOTIF; |
347 | call->flags |= IPC_CALL_NOTIF; |
339 | /* Put a counter to the message */ |
348 | /* Put a counter to the message */ |
340 | call->priv = ++irq->notif_cfg.counter; |
349 | call->priv = ++irq->notif_cfg.counter; |
341 | /* Set up args */ |
350 | /* Set up args */ |
342 | IPC_SET_METHOD(call->data, irq->notif_cfg.method); |
351 | IPC_SET_METHOD(call->data, irq->notif_cfg.method); |
343 | 352 | ||
344 | /* Execute code to handle irq */ |
353 | /* Execute code to handle irq */ |
345 | code_execute(call, irq->notif_cfg.code); |
354 | code_execute(call, irq->notif_cfg.code); |
346 | 355 | ||
347 | send_call(irq, call); |
356 | send_call(irq, call); |
348 | } |
357 | } |
349 | } |
358 | } |
350 | 359 | ||
351 | /** Disconnect all IRQ notifications from an answerbox. |
360 | /** Disconnect all IRQ notifications from an answerbox. |
352 | * |
361 | * |
353 | * This function is effective because the answerbox contains |
362 | * This function is effective because the answerbox contains |
354 | * list of all irq_t structures that are registered to |
363 | * list of all irq_t structures that are registered to |
355 | * send notifications to it. |
364 | * send notifications to it. |
356 | * |
365 | * |
357 | * @param box Answerbox for which we want to carry out the cleanup. |
366 | * @param box Answerbox for which we want to carry out the cleanup. |
358 | */ |
367 | */ |
359 | void ipc_irq_cleanup(answerbox_t *box) |
368 | void ipc_irq_cleanup(answerbox_t *box) |
360 | { |
369 | { |
361 | ipl_t ipl; |
370 | ipl_t ipl; |
362 | 371 | ||
363 | loop: |
372 | loop: |
364 | ipl = interrupts_disable(); |
373 | ipl = interrupts_disable(); |
365 | spinlock_lock(&box->irq_lock); |
374 | spinlock_lock(&box->irq_lock); |
366 | 375 | ||
367 | while (box->irq_head.next != &box->irq_head) { |
376 | while (box->irq_head.next != &box->irq_head) { |
368 | link_t *cur = box->irq_head.next; |
377 | link_t *cur = box->irq_head.next; |
369 | irq_t *irq; |
378 | irq_t *irq; |
370 | DEADLOCK_PROBE_INIT(p_irqlock); |
379 | DEADLOCK_PROBE_INIT(p_irqlock); |
371 | 380 | ||
372 | irq = list_get_instance(cur, irq_t, notif_cfg.link); |
381 | irq = list_get_instance(cur, irq_t, notif_cfg.link); |
373 | if (!spinlock_trylock(&irq->lock)) { |
382 | if (!spinlock_trylock(&irq->lock)) { |
374 | /* |
383 | /* |
375 | * Avoid deadlock by trying again. |
384 | * Avoid deadlock by trying again. |
376 | */ |
385 | */ |
377 | spinlock_unlock(&box->irq_lock); |
386 | spinlock_unlock(&box->irq_lock); |
378 | interrupts_restore(ipl); |
387 | interrupts_restore(ipl); |
379 | DEADLOCK_PROBE(p_irqlock, DEADLOCK_THRESHOLD); |
388 | DEADLOCK_PROBE(p_irqlock, DEADLOCK_THRESHOLD); |
380 | goto loop; |
389 | goto loop; |
381 | } |
390 | } |
382 | 391 | ||
383 | ASSERT(irq->notif_cfg.answerbox == box); |
392 | ASSERT(irq->notif_cfg.answerbox == box); |
384 | 393 | ||
385 | list_remove(&irq->notif_cfg.link); |
394 | list_remove(&irq->notif_cfg.link); |
386 | 395 | ||
387 | /* |
396 | /* |
388 | * Don't forget to free any top-half pseudocode. |
397 | * Don't forget to free any top-half pseudocode. |
389 | */ |
398 | */ |
390 | code_free(irq->notif_cfg.code); |
399 | code_free(irq->notif_cfg.code); |
391 | 400 | ||
392 | irq->notif_cfg.notify = false; |
401 | irq->notif_cfg.notify = false; |
393 | irq->notif_cfg.answerbox = NULL; |
402 | irq->notif_cfg.answerbox = NULL; |
394 | irq->notif_cfg.code = NULL; |
403 | irq->notif_cfg.code = NULL; |
395 | irq->notif_cfg.method = 0; |
404 | irq->notif_cfg.method = 0; |
396 | irq->notif_cfg.counter = 0; |
405 | irq->notif_cfg.counter = 0; |
397 | 406 | ||
398 | spinlock_unlock(&irq->lock); |
407 | spinlock_unlock(&irq->lock); |
399 | } |
408 | } |
400 | 409 | ||
401 | spinlock_unlock(&box->irq_lock); |
410 | spinlock_unlock(&box->irq_lock); |
402 | interrupts_restore(ipl); |
411 | interrupts_restore(ipl); |
403 | } |
412 | } |
404 | 413 | ||
405 | /** @} |
414 | /** @} |
406 | */ |
415 | */ |
407 | 416 |