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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup sparc64interrupt |
29 | /** @addtogroup sparc64interrupt |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** |
32 | /** |
33 | * @file |
33 | * @file |
34 | * @brief This file contains register window trap handlers. |
34 | * @brief This file contains register window trap handlers. |
35 | */ |
35 | */ |
36 | 36 | ||
37 | #ifndef KERN_sparc64_REGWIN_H_ |
37 | #ifndef KERN_sparc64_REGWIN_H_ |
38 | #define KERN_sparc64_REGWIN_H_ |
38 | #define KERN_sparc64_REGWIN_H_ |
39 | 39 | ||
40 | #include <arch/stack.h> |
40 | #include <arch/stack.h> |
41 | #include <arch/arch.h> |
41 | #include <arch/arch.h> |
42 | #include <align.h> |
42 | #include <align.h> |
43 | 43 | ||
44 | #define TT_CLEAN_WINDOW 0x24 |
44 | #define TT_CLEAN_WINDOW 0x24 |
45 | #define TT_SPILL_0_NORMAL 0x80 /* kernel spills */ |
45 | #define TT_SPILL_0_NORMAL 0x80 /* kernel spills */ |
46 | #define TT_SPILL_1_NORMAL 0x84 /* userspace spills */ |
46 | #define TT_SPILL_1_NORMAL 0x84 /* userspace spills */ |
47 | #define TT_SPILL_2_NORMAL 0x88 /* spills to userspace window buffer */ |
47 | #define TT_SPILL_2_NORMAL 0x88 /* spills to userspace window buffer */ |
48 | #define TT_SPILL_0_OTHER 0xa0 /* spills to userspace window buffer */ |
48 | #define TT_SPILL_0_OTHER 0xa0 /* spills to userspace window buffer */ |
49 | #define TT_FILL_0_NORMAL 0xc0 /* kernel fills */ |
49 | #define TT_FILL_0_NORMAL 0xc0 /* kernel fills */ |
50 | #define TT_FILL_1_NORMAL 0xc4 /* userspace fills */ |
50 | #define TT_FILL_1_NORMAL 0xc4 /* userspace fills */ |
51 | 51 | ||
52 | #define REGWIN_HANDLER_SIZE 128 |
52 | #define REGWIN_HANDLER_SIZE 128 |
53 | 53 | ||
54 | #define CLEAN_WINDOW_HANDLER_SIZE REGWIN_HANDLER_SIZE |
54 | #define CLEAN_WINDOW_HANDLER_SIZE REGWIN_HANDLER_SIZE |
55 | #define SPILL_HANDLER_SIZE REGWIN_HANDLER_SIZE |
55 | #define SPILL_HANDLER_SIZE REGWIN_HANDLER_SIZE |
56 | #define FILL_HANDLER_SIZE REGWIN_HANDLER_SIZE |
56 | #define FILL_HANDLER_SIZE REGWIN_HANDLER_SIZE |
57 | 57 | ||
58 | /* Window Save Area offsets. */ |
58 | /* Window Save Area offsets. */ |
59 | #define L0_OFFSET 0 |
59 | #define L0_OFFSET 0 |
60 | #define L1_OFFSET 8 |
60 | #define L1_OFFSET 8 |
61 | #define L2_OFFSET 16 |
61 | #define L2_OFFSET 16 |
62 | #define L3_OFFSET 24 |
62 | #define L3_OFFSET 24 |
63 | #define L4_OFFSET 32 |
63 | #define L4_OFFSET 32 |
64 | #define L5_OFFSET 40 |
64 | #define L5_OFFSET 40 |
65 | #define L6_OFFSET 48 |
65 | #define L6_OFFSET 48 |
66 | #define L7_OFFSET 56 |
66 | #define L7_OFFSET 56 |
67 | #define I0_OFFSET 64 |
67 | #define I0_OFFSET 64 |
68 | #define I1_OFFSET 72 |
68 | #define I1_OFFSET 72 |
69 | #define I2_OFFSET 80 |
69 | #define I2_OFFSET 80 |
70 | #define I3_OFFSET 88 |
70 | #define I3_OFFSET 88 |
71 | #define I4_OFFSET 96 |
71 | #define I4_OFFSET 96 |
72 | #define I5_OFFSET 104 |
72 | #define I5_OFFSET 104 |
73 | #define I6_OFFSET 112 |
73 | #define I6_OFFSET 112 |
74 | #define I7_OFFSET 120 |
74 | #define I7_OFFSET 120 |
75 | 75 | ||
76 | /* Uspace Window Buffer constants. */ |
76 | /* Uspace Window Buffer constants. */ |
77 | #define UWB_SIZE ((NWINDOWS - 1) * STACK_WINDOW_SAVE_AREA_SIZE) |
77 | #define UWB_SIZE ((NWINDOWS - 1) * STACK_WINDOW_SAVE_AREA_SIZE) |
78 | #define UWB_ALIGNMENT 1024 |
78 | #define UWB_ALIGNMENT 1024 |
79 | #define UWB_ASIZE ALIGN_UP(UWB_SIZE, UWB_ALIGNMENT) |
79 | #define UWB_ASIZE ALIGN_UP(UWB_SIZE, UWB_ALIGNMENT) |
80 | 80 | ||
81 | #ifdef __ASM__ |
81 | #ifdef __ASM__ |
82 | 82 | ||
83 | /* |
83 | /* |
84 | * Macro used by the nucleus and the primary context 0 during normal and other spills. |
84 | * Macro used by the nucleus and the primary context 0 during normal and other spills. |
85 | */ |
85 | */ |
86 | .macro SPILL_NORMAL_HANDLER_KERNEL |
86 | .macro SPILL_NORMAL_HANDLER_KERNEL |
87 | stx %l0, [%sp + STACK_BIAS + L0_OFFSET] |
87 | stx %l0, [%sp + STACK_BIAS + L0_OFFSET] |
88 | stx %l1, [%sp + STACK_BIAS + L1_OFFSET] |
88 | stx %l1, [%sp + STACK_BIAS + L1_OFFSET] |
89 | stx %l2, [%sp + STACK_BIAS + L2_OFFSET] |
89 | stx %l2, [%sp + STACK_BIAS + L2_OFFSET] |
90 | stx %l3, [%sp + STACK_BIAS + L3_OFFSET] |
90 | stx %l3, [%sp + STACK_BIAS + L3_OFFSET] |
91 | stx %l4, [%sp + STACK_BIAS + L4_OFFSET] |
91 | stx %l4, [%sp + STACK_BIAS + L4_OFFSET] |
92 | stx %l5, [%sp + STACK_BIAS + L5_OFFSET] |
92 | stx %l5, [%sp + STACK_BIAS + L5_OFFSET] |
93 | stx %l6, [%sp + STACK_BIAS + L6_OFFSET] |
93 | stx %l6, [%sp + STACK_BIAS + L6_OFFSET] |
94 | stx %l7, [%sp + STACK_BIAS + L7_OFFSET] |
94 | stx %l7, [%sp + STACK_BIAS + L7_OFFSET] |
95 | stx %i0, [%sp + STACK_BIAS + I0_OFFSET] |
95 | stx %i0, [%sp + STACK_BIAS + I0_OFFSET] |
96 | stx %i1, [%sp + STACK_BIAS + I1_OFFSET] |
96 | stx %i1, [%sp + STACK_BIAS + I1_OFFSET] |
97 | stx %i2, [%sp + STACK_BIAS + I2_OFFSET] |
97 | stx %i2, [%sp + STACK_BIAS + I2_OFFSET] |
98 | stx %i3, [%sp + STACK_BIAS + I3_OFFSET] |
98 | stx %i3, [%sp + STACK_BIAS + I3_OFFSET] |
99 | stx %i4, [%sp + STACK_BIAS + I4_OFFSET] |
99 | stx %i4, [%sp + STACK_BIAS + I4_OFFSET] |
100 | stx %i5, [%sp + STACK_BIAS + I5_OFFSET] |
100 | stx %i5, [%sp + STACK_BIAS + I5_OFFSET] |
101 | stx %i6, [%sp + STACK_BIAS + I6_OFFSET] |
101 | stx %i6, [%sp + STACK_BIAS + I6_OFFSET] |
102 | stx %i7, [%sp + STACK_BIAS + I7_OFFSET] |
102 | stx %i7, [%sp + STACK_BIAS + I7_OFFSET] |
103 | saved |
103 | saved |
104 | retry |
104 | retry |
105 | .endm |
105 | .endm |
106 | 106 | ||
107 | /* |
107 | /* |
108 | * Macro used by the userspace during normal spills. |
108 | * Macro used by the userspace during normal spills. |
109 | */ |
109 | */ |
110 | .macro SPILL_NORMAL_HANDLER_USERSPACE |
110 | .macro SPILL_NORMAL_HANDLER_USERSPACE |
111 | wr %g0, ASI_AIUP, %asi |
111 | wr %g0, ASI_AIUP, %asi |
112 | stxa %l0, [%sp + STACK_BIAS + L0_OFFSET] %asi |
112 | stxa %l0, [%sp + STACK_BIAS + L0_OFFSET] %asi |
113 | stxa %l1, [%sp + STACK_BIAS + L1_OFFSET] %asi |
113 | stxa %l1, [%sp + STACK_BIAS + L1_OFFSET] %asi |
114 | stxa %l2, [%sp + STACK_BIAS + L2_OFFSET] %asi |
114 | stxa %l2, [%sp + STACK_BIAS + L2_OFFSET] %asi |
115 | stxa %l3, [%sp + STACK_BIAS + L3_OFFSET] %asi |
115 | stxa %l3, [%sp + STACK_BIAS + L3_OFFSET] %asi |
116 | stxa %l4, [%sp + STACK_BIAS + L4_OFFSET] %asi |
116 | stxa %l4, [%sp + STACK_BIAS + L4_OFFSET] %asi |
117 | stxa %l5, [%sp + STACK_BIAS + L5_OFFSET] %asi |
117 | stxa %l5, [%sp + STACK_BIAS + L5_OFFSET] %asi |
118 | stxa %l6, [%sp + STACK_BIAS + L6_OFFSET] %asi |
118 | stxa %l6, [%sp + STACK_BIAS + L6_OFFSET] %asi |
119 | stxa %l7, [%sp + STACK_BIAS + L7_OFFSET] %asi |
119 | stxa %l7, [%sp + STACK_BIAS + L7_OFFSET] %asi |
120 | stxa %i0, [%sp + STACK_BIAS + I0_OFFSET] %asi |
120 | stxa %i0, [%sp + STACK_BIAS + I0_OFFSET] %asi |
121 | stxa %i1, [%sp + STACK_BIAS + I1_OFFSET] %asi |
121 | stxa %i1, [%sp + STACK_BIAS + I1_OFFSET] %asi |
122 | stxa %i2, [%sp + STACK_BIAS + I2_OFFSET] %asi |
122 | stxa %i2, [%sp + STACK_BIAS + I2_OFFSET] %asi |
123 | stxa %i3, [%sp + STACK_BIAS + I3_OFFSET] %asi |
123 | stxa %i3, [%sp + STACK_BIAS + I3_OFFSET] %asi |
124 | stxa %i4, [%sp + STACK_BIAS + I4_OFFSET] %asi |
124 | stxa %i4, [%sp + STACK_BIAS + I4_OFFSET] %asi |
125 | stxa %i5, [%sp + STACK_BIAS + I5_OFFSET] %asi |
125 | stxa %i5, [%sp + STACK_BIAS + I5_OFFSET] %asi |
126 | stxa %i6, [%sp + STACK_BIAS + I6_OFFSET] %asi |
126 | stxa %i6, [%sp + STACK_BIAS + I6_OFFSET] %asi |
127 | stxa %i7, [%sp + STACK_BIAS + I7_OFFSET] %asi |
127 | stxa %i7, [%sp + STACK_BIAS + I7_OFFSET] %asi |
128 | saved |
128 | saved |
129 | retry |
129 | retry |
130 | .endm |
130 | .endm |
131 | 131 | ||
132 | /* |
132 | /* |
133 | * Macro used to spill userspace window to userspace window buffer. |
- | |
134 | * It can be either triggered from preemptible_handler doing SAVE |
- | |
135 | * at (TL=1) or from normal kernel code doing SAVE when OTHERWIN>0 |
- | |
136 | * at (TL=0). |
- | |
137 | */ |
- | |
138 | .macro SPILL_TO_USPACE_WINDOW_BUFFER |
- | |
139 | stx %l0, [%g7 + L0_OFFSET] |
- | |
140 | stx %l1, [%g7 + L1_OFFSET] |
- | |
141 | stx %l2, [%g7 + L2_OFFSET] |
- | |
142 | stx %l3, [%g7 + L3_OFFSET] |
- | |
143 | stx %l4, [%g7 + L4_OFFSET] |
- | |
144 | stx %l5, [%g7 + L5_OFFSET] |
- | |
145 | stx %l6, [%g7 + L6_OFFSET] |
- | |
146 | stx %l7, [%g7 + L7_OFFSET] |
- | |
147 | stx %i0, [%g7 + I0_OFFSET] |
- | |
148 | stx %i1, [%g7 + I1_OFFSET] |
- | |
149 | stx %i2, [%g7 + I2_OFFSET] |
- | |
150 | stx %i3, [%g7 + I3_OFFSET] |
- | |
151 | stx %i4, [%g7 + I4_OFFSET] |
- | |
152 | stx %i5, [%g7 + I5_OFFSET] |
- | |
153 | stx %i6, [%g7 + I6_OFFSET] |
- | |
154 | stx %i7, [%g7 + I7_OFFSET] |
- | |
155 | add %g7, STACK_WINDOW_SAVE_AREA_SIZE, %g7 |
- | |
156 | saved |
- | |
157 | retry |
- | |
158 | .endm |
- | |
159 | - | ||
160 | - | ||
161 | /* |
- | |
162 | * Macro used by the nucleus and the primary context 0 during normal fills. |
133 | * Macro used by the nucleus and the primary context 0 during normal fills. |
163 | */ |
134 | */ |
164 | .macro FILL_NORMAL_HANDLER_KERNEL |
135 | .macro FILL_NORMAL_HANDLER_KERNEL |
165 | ldx [%sp + STACK_BIAS + L0_OFFSET], %l0 |
136 | ldx [%sp + STACK_BIAS + L0_OFFSET], %l0 |
166 | ldx [%sp + STACK_BIAS + L1_OFFSET], %l1 |
137 | ldx [%sp + STACK_BIAS + L1_OFFSET], %l1 |
167 | ldx [%sp + STACK_BIAS + L2_OFFSET], %l2 |
138 | ldx [%sp + STACK_BIAS + L2_OFFSET], %l2 |
168 | ldx [%sp + STACK_BIAS + L3_OFFSET], %l3 |
139 | ldx [%sp + STACK_BIAS + L3_OFFSET], %l3 |
169 | ldx [%sp + STACK_BIAS + L4_OFFSET], %l4 |
140 | ldx [%sp + STACK_BIAS + L4_OFFSET], %l4 |
170 | ldx [%sp + STACK_BIAS + L5_OFFSET], %l5 |
141 | ldx [%sp + STACK_BIAS + L5_OFFSET], %l5 |
171 | ldx [%sp + STACK_BIAS + L6_OFFSET], %l6 |
142 | ldx [%sp + STACK_BIAS + L6_OFFSET], %l6 |
172 | ldx [%sp + STACK_BIAS + L7_OFFSET], %l7 |
143 | ldx [%sp + STACK_BIAS + L7_OFFSET], %l7 |
173 | ldx [%sp + STACK_BIAS + I0_OFFSET], %i0 |
144 | ldx [%sp + STACK_BIAS + I0_OFFSET], %i0 |
174 | ldx [%sp + STACK_BIAS + I1_OFFSET], %i1 |
145 | ldx [%sp + STACK_BIAS + I1_OFFSET], %i1 |
175 | ldx [%sp + STACK_BIAS + I2_OFFSET], %i2 |
146 | ldx [%sp + STACK_BIAS + I2_OFFSET], %i2 |
176 | ldx [%sp + STACK_BIAS + I3_OFFSET], %i3 |
147 | ldx [%sp + STACK_BIAS + I3_OFFSET], %i3 |
177 | ldx [%sp + STACK_BIAS + I4_OFFSET], %i4 |
148 | ldx [%sp + STACK_BIAS + I4_OFFSET], %i4 |
178 | ldx [%sp + STACK_BIAS + I5_OFFSET], %i5 |
149 | ldx [%sp + STACK_BIAS + I5_OFFSET], %i5 |
179 | ldx [%sp + STACK_BIAS + I6_OFFSET], %i6 |
150 | ldx [%sp + STACK_BIAS + I6_OFFSET], %i6 |
180 | ldx [%sp + STACK_BIAS + I7_OFFSET], %i7 |
151 | ldx [%sp + STACK_BIAS + I7_OFFSET], %i7 |
181 | restored |
152 | restored |
182 | retry |
153 | retry |
183 | .endm |
154 | .endm |
184 | 155 | ||
185 | /* |
156 | /* |
186 | * Macro used by the userspace during normal fills. |
157 | * Macro used by the userspace during normal fills. |
187 | */ |
158 | */ |
188 | .macro FILL_NORMAL_HANDLER_USERSPACE |
159 | .macro FILL_NORMAL_HANDLER_USERSPACE |
189 | wr %g0, ASI_AIUP, %asi |
160 | wr %g0, ASI_AIUP, %asi |
190 | ldxa [%sp + STACK_BIAS + L0_OFFSET] %asi, %l0 |
161 | ldxa [%sp + STACK_BIAS + L0_OFFSET] %asi, %l0 |
191 | ldxa [%sp + STACK_BIAS + L1_OFFSET] %asi, %l1 |
162 | ldxa [%sp + STACK_BIAS + L1_OFFSET] %asi, %l1 |
192 | ldxa [%sp + STACK_BIAS + L2_OFFSET] %asi, %l2 |
163 | ldxa [%sp + STACK_BIAS + L2_OFFSET] %asi, %l2 |
193 | ldxa [%sp + STACK_BIAS + L3_OFFSET] %asi, %l3 |
164 | ldxa [%sp + STACK_BIAS + L3_OFFSET] %asi, %l3 |
194 | ldxa [%sp + STACK_BIAS + L4_OFFSET] %asi, %l4 |
165 | ldxa [%sp + STACK_BIAS + L4_OFFSET] %asi, %l4 |
195 | ldxa [%sp + STACK_BIAS + L5_OFFSET] %asi, %l5 |
166 | ldxa [%sp + STACK_BIAS + L5_OFFSET] %asi, %l5 |
196 | ldxa [%sp + STACK_BIAS + L6_OFFSET] %asi, %l6 |
167 | ldxa [%sp + STACK_BIAS + L6_OFFSET] %asi, %l6 |
197 | ldxa [%sp + STACK_BIAS + L7_OFFSET] %asi, %l7 |
168 | ldxa [%sp + STACK_BIAS + L7_OFFSET] %asi, %l7 |
198 | ldxa [%sp + STACK_BIAS + I0_OFFSET] %asi, %i0 |
169 | ldxa [%sp + STACK_BIAS + I0_OFFSET] %asi, %i0 |
199 | ldxa [%sp + STACK_BIAS + I1_OFFSET] %asi, %i1 |
170 | ldxa [%sp + STACK_BIAS + I1_OFFSET] %asi, %i1 |
200 | ldxa [%sp + STACK_BIAS + I2_OFFSET] %asi, %i2 |
171 | ldxa [%sp + STACK_BIAS + I2_OFFSET] %asi, %i2 |
201 | ldxa [%sp + STACK_BIAS + I3_OFFSET] %asi, %i3 |
172 | ldxa [%sp + STACK_BIAS + I3_OFFSET] %asi, %i3 |
202 | ldxa [%sp + STACK_BIAS + I4_OFFSET] %asi, %i4 |
173 | ldxa [%sp + STACK_BIAS + I4_OFFSET] %asi, %i4 |
203 | ldxa [%sp + STACK_BIAS + I5_OFFSET] %asi, %i5 |
174 | ldxa [%sp + STACK_BIAS + I5_OFFSET] %asi, %i5 |
204 | ldxa [%sp + STACK_BIAS + I6_OFFSET] %asi, %i6 |
175 | ldxa [%sp + STACK_BIAS + I6_OFFSET] %asi, %i6 |
205 | ldxa [%sp + STACK_BIAS + I7_OFFSET] %asi, %i7 |
176 | ldxa [%sp + STACK_BIAS + I7_OFFSET] %asi, %i7 |
206 | restored |
177 | restored |
207 | retry |
178 | retry |
208 | .endm |
179 | .endm |
209 | 180 | ||
210 | .macro CLEAN_WINDOW_HANDLER |
181 | .macro CLEAN_WINDOW_HANDLER |
211 | rdpr %cleanwin, %l0 |
182 | rdpr %cleanwin, %l0 |
212 | add %l0, 1, %l0 |
183 | add %l0, 1, %l0 |
213 | wrpr %l0, 0, %cleanwin |
184 | wrpr %l0, 0, %cleanwin |
214 | mov %r0, %l0 |
185 | mov %r0, %l0 |
215 | mov %r0, %l1 |
186 | mov %r0, %l1 |
216 | mov %r0, %l2 |
187 | mov %r0, %l2 |
217 | mov %r0, %l3 |
188 | mov %r0, %l3 |
218 | mov %r0, %l4 |
189 | mov %r0, %l4 |
219 | mov %r0, %l5 |
190 | mov %r0, %l5 |
220 | mov %r0, %l6 |
191 | mov %r0, %l6 |
221 | mov %r0, %l7 |
192 | mov %r0, %l7 |
222 | mov %r0, %o0 |
193 | mov %r0, %o0 |
223 | mov %r0, %o1 |
194 | mov %r0, %o1 |
224 | mov %r0, %o2 |
195 | mov %r0, %o2 |
225 | mov %r0, %o3 |
196 | mov %r0, %o3 |
226 | mov %r0, %o4 |
197 | mov %r0, %o4 |
227 | mov %r0, %o5 |
198 | mov %r0, %o5 |
228 | mov %r0, %o6 |
199 | mov %r0, %o6 |
229 | mov %r0, %o7 |
200 | mov %r0, %o7 |
230 | retry |
201 | retry |
231 | .endm |
202 | .endm |
232 | #endif /* __ASM__ */ |
203 | #endif /* __ASM__ */ |
233 | 204 | ||
- | 205 | #if defined (SUN4U) |
|
- | 206 | #include <arch/trap/sun4u/regwin.h> |
|
- | 207 | #elif defined (SUN4V) |
|
- | 208 | #include <arch/trap/sun4v/regwin.h> |
|
- | 209 | #endif |
|
- | 210 | ||
234 | #endif |
211 | #endif |
235 | 212 | ||
236 | /** @} |
213 | /** @} |
237 | */ |
214 | */ |
238 | 215 |