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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 - 2006 Jakub Jermar |
2 | * Copyright (c) 2005 - 2006 Jakub Jermar |
3 | * Copyright (c) 2006 Jakub Vana |
3 | * Copyright (c) 2006 Jakub Vana |
4 | * All rights reserved. |
4 | * All rights reserved. |
5 | * |
5 | * |
6 | * Redistribution and use in source and binary forms, with or without |
6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions |
7 | * modification, are permitted provided that the following conditions |
8 | * are met: |
8 | * are met: |
9 | * |
9 | * |
10 | * - Redistributions of source code must retain the above copyright |
10 | * - Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * - Redistributions in binary form must reproduce the above copyright |
12 | * - Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
14 | * documentation and/or other materials provided with the distribution. |
15 | * - The name of the author may not be used to endorse or promote products |
15 | * - The name of the author may not be used to endorse or promote products |
16 | * derived from this software without specific prior written permission. |
16 | * derived from this software without specific prior written permission. |
17 | * |
17 | * |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
28 | */ |
28 | */ |
29 | 29 | ||
30 | /** @addtogroup ia64mm |
30 | /** @addtogroup ia64mm |
31 | * @{ |
31 | * @{ |
32 | */ |
32 | */ |
33 | /** @file |
33 | /** @file |
34 | */ |
34 | */ |
35 | 35 | ||
36 | #ifndef KERN_ia64_PAGE_H_ |
36 | #ifndef KERN_ia64_PAGE_H_ |
37 | #define KERN_ia64_PAGE_H_ |
37 | #define KERN_ia64_PAGE_H_ |
38 | 38 | ||
39 | #include <arch/mm/frame.h> |
39 | #include <arch/mm/frame.h> |
40 | 40 | ||
41 | #define PAGE_SIZE FRAME_SIZE |
41 | #define PAGE_SIZE FRAME_SIZE |
42 | #define PAGE_WIDTH FRAME_WIDTH |
42 | #define PAGE_WIDTH FRAME_WIDTH |
43 | 43 | ||
44 | #ifdef KERNEL |
44 | #ifdef KERNEL |
45 | 45 | ||
46 | /** Bit width of the TLB-locked portion of kernel address space. */ |
46 | /** Bit width of the TLB-locked portion of kernel address space. */ |
47 | #define KERNEL_PAGE_WIDTH 28 /* 256M */ |
47 | #define KERNEL_PAGE_WIDTH 28 /* 256M */ |
48 | #define IO_PAGE_WIDTH 26 /* 64M */ |
48 | #define IO_PAGE_WIDTH 26 /* 64M */ |
- | 49 | #define FW_PAGE_WIDTH 28 /* 256M */ |
|
- | 50 | ||
- | 51 | /** Staticly mapped IO spaces */ |
|
- | 52 | ||
- | 53 | /* Firmware area (bellow 4GB in phys mem) */ |
|
- | 54 | #define FW_OFFSET 0x00000000F0000000 |
|
- | 55 | /* Legacy IO space */ |
|
- | 56 | #define IO_OFFSET 0x0001000000000000 |
|
- | 57 | /* Videoram - now mapped to 0 as VGA text mode vram on 0xb8000*/ |
|
- | 58 | #define VIO_OFFSET 0x0002000000000000 |
|
- | 59 | ||
- | 60 | ||
49 | 61 | ||
50 | 62 | ||
51 | #define PPN_SHIFT 12 |
63 | #define PPN_SHIFT 12 |
52 | 64 | ||
53 | #define VRN_SHIFT 61 |
65 | #define VRN_SHIFT 61 |
54 | #define VRN_MASK (7LL << VRN_SHIFT) |
66 | #define VRN_MASK (7LL << VRN_SHIFT) |
55 | #define VA2VRN(va) ((va)>>VRN_SHIFT) |
67 | #define VA2VRN(va) ((va)>>VRN_SHIFT) |
56 | 68 | ||
57 | #ifdef __ASM__ |
69 | #ifdef __ASM__ |
58 | #define VRN_KERNEL 7 |
70 | #define VRN_KERNEL 7 |
59 | #else |
71 | #else |
60 | #define VRN_KERNEL 7LL |
72 | #define VRN_KERNEL 7LL |
61 | #endif |
73 | #endif |
62 | 74 | ||
63 | #define REGION_REGISTERS 8 |
75 | #define REGION_REGISTERS 8 |
64 | 76 | ||
65 | #define KA2PA(x) ((uintptr_t) (x-(VRN_KERNEL<<VRN_SHIFT))) |
77 | #define KA2PA(x) ((uintptr_t) (x-(VRN_KERNEL<<VRN_SHIFT))) |
66 | #define PA2KA(x) ((uintptr_t) (x+(VRN_KERNEL<<VRN_SHIFT))) |
78 | #define PA2KA(x) ((uintptr_t) (x+(VRN_KERNEL<<VRN_SHIFT))) |
67 | 79 | ||
68 | #define VHPT_WIDTH 20 /* 1M */ |
80 | #define VHPT_WIDTH 20 /* 1M */ |
69 | #define VHPT_SIZE (1 << VHPT_WIDTH) |
81 | #define VHPT_SIZE (1 << VHPT_WIDTH) |
70 | 82 | ||
71 | #define PTA_BASE_SHIFT 15 |
83 | #define PTA_BASE_SHIFT 15 |
72 | 84 | ||
73 | /** Memory Attributes. */ |
85 | /** Memory Attributes. */ |
74 | #define MA_WRITEBACK 0x0 |
86 | #define MA_WRITEBACK 0x0 |
75 | #define MA_UNCACHEABLE 0x4 |
87 | #define MA_UNCACHEABLE 0x4 |
76 | 88 | ||
77 | /** Privilege Levels. Only the most and the least privileged ones are ever used. */ |
89 | /** Privilege Levels. Only the most and the least privileged ones are ever used. */ |
78 | #define PL_KERNEL 0x0 |
90 | #define PL_KERNEL 0x0 |
79 | #define PL_USER 0x3 |
91 | #define PL_USER 0x3 |
80 | 92 | ||
81 | /* Access Rigths. Only certain combinations are used by the kernel. */ |
93 | /* Access Rigths. Only certain combinations are used by the kernel. */ |
82 | #define AR_READ 0x0 |
94 | #define AR_READ 0x0 |
83 | #define AR_EXECUTE 0x1 |
95 | #define AR_EXECUTE 0x1 |
84 | #define AR_WRITE 0x2 |
96 | #define AR_WRITE 0x2 |
85 | 97 | ||
86 | #ifndef __ASM__ |
98 | #ifndef __ASM__ |
87 | 99 | ||
88 | #include <arch/mm/as.h> |
100 | #include <arch/mm/as.h> |
89 | #include <arch/mm/frame.h> |
101 | #include <arch/mm/frame.h> |
90 | #include <arch/interrupt.h> |
102 | #include <arch/interrupt.h> |
91 | #include <arch/barrier.h> |
103 | #include <arch/barrier.h> |
92 | #include <arch/mm/asid.h> |
104 | #include <arch/mm/asid.h> |
93 | #include <arch/types.h> |
105 | #include <arch/types.h> |
94 | #include <debug.h> |
106 | #include <debug.h> |
95 | 107 | ||
96 | struct vhpt_tag_info { |
108 | struct vhpt_tag_info { |
97 | unsigned long long tag : 63; |
109 | unsigned long long tag : 63; |
98 | unsigned ti : 1; |
110 | unsigned ti : 1; |
99 | } __attribute__ ((packed)); |
111 | } __attribute__ ((packed)); |
100 | 112 | ||
101 | union vhpt_tag { |
113 | union vhpt_tag { |
102 | struct vhpt_tag_info tag_info; |
114 | struct vhpt_tag_info tag_info; |
103 | unsigned tag_word; |
115 | unsigned tag_word; |
104 | }; |
116 | }; |
105 | 117 | ||
106 | struct vhpt_entry_present { |
118 | struct vhpt_entry_present { |
107 | /* Word 0 */ |
119 | /* Word 0 */ |
108 | unsigned p : 1; |
120 | unsigned p : 1; |
109 | unsigned : 1; |
121 | unsigned : 1; |
110 | unsigned ma : 3; |
122 | unsigned ma : 3; |
111 | unsigned a : 1; |
123 | unsigned a : 1; |
112 | unsigned d : 1; |
124 | unsigned d : 1; |
113 | unsigned pl : 2; |
125 | unsigned pl : 2; |
114 | unsigned ar : 3; |
126 | unsigned ar : 3; |
115 | unsigned long long ppn : 38; |
127 | unsigned long long ppn : 38; |
116 | unsigned : 2; |
128 | unsigned : 2; |
117 | unsigned ed : 1; |
129 | unsigned ed : 1; |
118 | unsigned ig1 : 11; |
130 | unsigned ig1 : 11; |
119 | 131 | ||
120 | /* Word 1 */ |
132 | /* Word 1 */ |
121 | unsigned : 2; |
133 | unsigned : 2; |
122 | unsigned ps : 6; |
134 | unsigned ps : 6; |
123 | unsigned key : 24; |
135 | unsigned key : 24; |
124 | unsigned : 32; |
136 | unsigned : 32; |
125 | 137 | ||
126 | /* Word 2 */ |
138 | /* Word 2 */ |
127 | union vhpt_tag tag; |
139 | union vhpt_tag tag; |
128 | 140 | ||
129 | /* Word 3 */ |
141 | /* Word 3 */ |
130 | uint64_t ig3 : 64; |
142 | uint64_t ig3 : 64; |
131 | } __attribute__ ((packed)); |
143 | } __attribute__ ((packed)); |
132 | 144 | ||
133 | struct vhpt_entry_not_present { |
145 | struct vhpt_entry_not_present { |
134 | /* Word 0 */ |
146 | /* Word 0 */ |
135 | unsigned p : 1; |
147 | unsigned p : 1; |
136 | unsigned long long ig0 : 52; |
148 | unsigned long long ig0 : 52; |
137 | unsigned ig1 : 11; |
149 | unsigned ig1 : 11; |
138 | 150 | ||
139 | /* Word 1 */ |
151 | /* Word 1 */ |
140 | unsigned : 2; |
152 | unsigned : 2; |
141 | unsigned ps : 6; |
153 | unsigned ps : 6; |
142 | unsigned long long ig2 : 56; |
154 | unsigned long long ig2 : 56; |
143 | 155 | ||
144 | /* Word 2 */ |
156 | /* Word 2 */ |
145 | union vhpt_tag tag; |
157 | union vhpt_tag tag; |
146 | 158 | ||
147 | /* Word 3 */ |
159 | /* Word 3 */ |
148 | uint64_t ig3 : 64; |
160 | uint64_t ig3 : 64; |
149 | } __attribute__ ((packed)); |
161 | } __attribute__ ((packed)); |
150 | 162 | ||
151 | typedef union vhpt_entry { |
163 | typedef union vhpt_entry { |
152 | struct vhpt_entry_present present; |
164 | struct vhpt_entry_present present; |
153 | struct vhpt_entry_not_present not_present; |
165 | struct vhpt_entry_not_present not_present; |
154 | uint64_t word[4]; |
166 | uint64_t word[4]; |
155 | } vhpt_entry_t; |
167 | } vhpt_entry_t; |
156 | 168 | ||
157 | struct region_register_map { |
169 | struct region_register_map { |
158 | unsigned ve : 1; |
170 | unsigned ve : 1; |
159 | unsigned : 1; |
171 | unsigned : 1; |
160 | unsigned ps : 6; |
172 | unsigned ps : 6; |
161 | unsigned rid : 24; |
173 | unsigned rid : 24; |
162 | unsigned : 32; |
174 | unsigned : 32; |
163 | } __attribute__ ((packed)); |
175 | } __attribute__ ((packed)); |
164 | 176 | ||
165 | typedef union region_register { |
177 | typedef union region_register { |
166 | struct region_register_map map; |
178 | struct region_register_map map; |
167 | unsigned long long word; |
179 | unsigned long long word; |
168 | } region_register; |
180 | } region_register; |
169 | 181 | ||
170 | struct pta_register_map { |
182 | struct pta_register_map { |
171 | unsigned ve : 1; |
183 | unsigned ve : 1; |
172 | unsigned : 1; |
184 | unsigned : 1; |
173 | unsigned size : 6; |
185 | unsigned size : 6; |
174 | unsigned vf : 1; |
186 | unsigned vf : 1; |
175 | unsigned : 6; |
187 | unsigned : 6; |
176 | unsigned long long base : 49; |
188 | unsigned long long base : 49; |
177 | } __attribute__ ((packed)); |
189 | } __attribute__ ((packed)); |
178 | 190 | ||
179 | typedef union pta_register { |
191 | typedef union pta_register { |
180 | struct pta_register_map map; |
192 | struct pta_register_map map; |
181 | uint64_t word; |
193 | uint64_t word; |
182 | } pta_register; |
194 | } pta_register; |
183 | 195 | ||
184 | /** Return Translation Hashed Entry Address. |
196 | /** Return Translation Hashed Entry Address. |
185 | * |
197 | * |
186 | * VRN bits are used to read RID (ASID) from one |
198 | * VRN bits are used to read RID (ASID) from one |
187 | * of the eight region registers registers. |
199 | * of the eight region registers registers. |
188 | * |
200 | * |
189 | * @param va Virtual address including VRN bits. |
201 | * @param va Virtual address including VRN bits. |
190 | * |
202 | * |
191 | * @return Address of the head of VHPT collision chain. |
203 | * @return Address of the head of VHPT collision chain. |
192 | */ |
204 | */ |
193 | static inline uint64_t thash(uint64_t va) |
205 | static inline uint64_t thash(uint64_t va) |
194 | { |
206 | { |
195 | uint64_t ret; |
207 | uint64_t ret; |
196 | 208 | ||
197 | asm volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va)); |
209 | asm volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va)); |
198 | 210 | ||
199 | return ret; |
211 | return ret; |
200 | } |
212 | } |
201 | 213 | ||
202 | /** Return Translation Hashed Entry Tag. |
214 | /** Return Translation Hashed Entry Tag. |
203 | * |
215 | * |
204 | * VRN bits are used to read RID (ASID) from one |
216 | * VRN bits are used to read RID (ASID) from one |
205 | * of the eight region registers. |
217 | * of the eight region registers. |
206 | * |
218 | * |
207 | * @param va Virtual address including VRN bits. |
219 | * @param va Virtual address including VRN bits. |
208 | * |
220 | * |
209 | * @return The unique tag for VPN and RID in the collision chain returned by thash(). |
221 | * @return The unique tag for VPN and RID in the collision chain returned by thash(). |
210 | */ |
222 | */ |
211 | static inline uint64_t ttag(uint64_t va) |
223 | static inline uint64_t ttag(uint64_t va) |
212 | { |
224 | { |
213 | uint64_t ret; |
225 | uint64_t ret; |
214 | 226 | ||
215 | asm volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va)); |
227 | asm volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va)); |
216 | 228 | ||
217 | return ret; |
229 | return ret; |
218 | } |
230 | } |
219 | 231 | ||
220 | /** Read Region Register. |
232 | /** Read Region Register. |
221 | * |
233 | * |
222 | * @param i Region register index. |
234 | * @param i Region register index. |
223 | * |
235 | * |
224 | * @return Current contents of rr[i]. |
236 | * @return Current contents of rr[i]. |
225 | */ |
237 | */ |
226 | static inline uint64_t rr_read(index_t i) |
238 | static inline uint64_t rr_read(index_t i) |
227 | { |
239 | { |
228 | uint64_t ret; |
240 | uint64_t ret; |
229 | ASSERT(i < REGION_REGISTERS); |
241 | ASSERT(i < REGION_REGISTERS); |
230 | asm volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT)); |
242 | asm volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT)); |
231 | return ret; |
243 | return ret; |
232 | } |
244 | } |
233 | 245 | ||
234 | /** Write Region Register. |
246 | /** Write Region Register. |
235 | * |
247 | * |
236 | * @param i Region register index. |
248 | * @param i Region register index. |
237 | * @param v Value to be written to rr[i]. |
249 | * @param v Value to be written to rr[i]. |
238 | */ |
250 | */ |
239 | static inline void rr_write(index_t i, uint64_t v) |
251 | static inline void rr_write(index_t i, uint64_t v) |
240 | { |
252 | { |
241 | ASSERT(i < REGION_REGISTERS); |
253 | ASSERT(i < REGION_REGISTERS); |
242 | asm volatile ( |
254 | asm volatile ( |
243 | "mov rr[%0] = %1\n" |
255 | "mov rr[%0] = %1\n" |
244 | : |
256 | : |
245 | : "r" (i << VRN_SHIFT), "r" (v) |
257 | : "r" (i << VRN_SHIFT), "r" (v) |
246 | ); |
258 | ); |
247 | } |
259 | } |
248 | 260 | ||
249 | /** Read Page Table Register. |
261 | /** Read Page Table Register. |
250 | * |
262 | * |
251 | * @return Current value stored in PTA. |
263 | * @return Current value stored in PTA. |
252 | */ |
264 | */ |
253 | static inline uint64_t pta_read(void) |
265 | static inline uint64_t pta_read(void) |
254 | { |
266 | { |
255 | uint64_t ret; |
267 | uint64_t ret; |
256 | 268 | ||
257 | asm volatile ("mov %0 = cr.pta\n" : "=r" (ret)); |
269 | asm volatile ("mov %0 = cr.pta\n" : "=r" (ret)); |
258 | 270 | ||
259 | return ret; |
271 | return ret; |
260 | } |
272 | } |
261 | 273 | ||
262 | /** Write Page Table Register. |
274 | /** Write Page Table Register. |
263 | * |
275 | * |
264 | * @param v New value to be stored in PTA. |
276 | * @param v New value to be stored in PTA. |
265 | */ |
277 | */ |
266 | static inline void pta_write(uint64_t v) |
278 | static inline void pta_write(uint64_t v) |
267 | { |
279 | { |
268 | asm volatile ("mov cr.pta = %0\n" : : "r" (v)); |
280 | asm volatile ("mov cr.pta = %0\n" : : "r" (v)); |
269 | } |
281 | } |
270 | 282 | ||
271 | extern void page_arch_init(void); |
283 | extern void page_arch_init(void); |
272 | 284 | ||
273 | extern vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid); |
285 | extern vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid); |
274 | extern bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v); |
286 | extern bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v); |
275 | extern void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags); |
287 | extern void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags); |
276 | 288 | ||
277 | #endif /* __ASM__ */ |
289 | #endif /* __ASM__ */ |
278 | 290 | ||
279 | #endif /* KERNEL */ |
291 | #endif /* KERNEL */ |
280 | 292 | ||
281 | #endif |
293 | #endif |
282 | 294 | ||
283 | /** @} |
295 | /** @} |
284 | */ |
296 | */ |
285 | 297 |