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1 | /* |
1 | /* |
2 | * Copyright (c) 2007 Michal Kebrt, Petr Stepan |
2 | * Copyright (c) 2007 Michal Kebrt, Petr Stepan |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup arm32 |
29 | /** @addtogroup arm32 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
- | 33 | * @brief GXemul drivers. |
|
33 | */ |
34 | */ |
34 | 35 | ||
35 | #include <interrupt.h> |
36 | #include <interrupt.h> |
36 | #include <ipc/irq.h> |
37 | #include <ipc/irq.h> |
37 | #include <console/chardev.h> |
38 | #include <console/chardev.h> |
38 | #include <arch/drivers/gxemul.h> |
39 | #include <arch/drivers/gxemul.h> |
39 | #include <console/console.h> |
40 | #include <console/console.h> |
40 | #include <sysinfo/sysinfo.h> |
41 | #include <sysinfo/sysinfo.h> |
41 | #include <print.h> |
42 | #include <print.h> |
42 | #include <ddi/device.h> |
43 | #include <ddi/device.h> |
43 | #include <mm/page.h> |
44 | #include <mm/page.h> |
44 | #include <arch/machine.h> |
45 | #include <arch/machine.h> |
45 | #include <arch/debug/print.h> |
46 | #include <arch/debug/print.h> |
46 | 47 | ||
47 | 48 | ||
48 | /** Addresses of devices. */ |
49 | /** Addresses of devices. */ |
49 | #define GXEMUL_VIDEORAM 0x10000000 |
50 | #define GXEMUL_VIDEORAM 0x10000000 |
50 | #define GXEMUL_KBD 0x10000000 |
51 | #define GXEMUL_KBD 0x10000000 |
51 | #define GXEMUL_HALT_OFFSET 0x10 |
52 | #define GXEMUL_HALT_OFFSET 0x10 |
52 | #define GXEMUL_RTC 0x15000000 |
53 | #define GXEMUL_RTC 0x15000000 |
53 | #define GXEMUL_RTC_FREQ_OFFSET 0x100 |
54 | #define GXEMUL_RTC_FREQ_OFFSET 0x100 |
54 | #define GXEMUL_RTC_ACK_OFFSET 0x110 |
55 | #define GXEMUL_RTC_ACK_OFFSET 0x110 |
55 | #define GXEMUL_IRQC 0x16000000 |
56 | #define GXEMUL_IRQC 0x16000000 |
56 | #define GXEMUL_IRQC_MASK_OFFSET 0x4 |
57 | #define GXEMUL_IRQC_MASK_OFFSET 0x4 |
57 | #define GXEMUL_IRQC_UNMASK_OFFSET 0x8 |
58 | #define GXEMUL_IRQC_UNMASK_OFFSET 0x8 |
58 | #define GXEMUL_MP 0x11000000 |
59 | #define GXEMUL_MP 0x11000000 |
59 | #define GXEMUL_MP_MEMSIZE_OFFSET 0x0090 |
60 | #define GXEMUL_MP_MEMSIZE_OFFSET 0x0090 |
60 | #define GXEMUL_FB 0x12000000 |
61 | #define GXEMUL_FB 0x12000000 |
61 | 62 | ||
62 | 63 | ||
63 | /** IRQs */ |
64 | /** IRQs */ |
64 | #define GXEMUL_KBD_IRQ 2 |
65 | #define GXEMUL_KBD_IRQ 2 |
65 | #define GXEMUL_TIMER_IRQ 4 |
66 | #define GXEMUL_TIMER_IRQ 4 |
66 | 67 | ||
67 | static gxemul_hw_map_t gxemul_hw_map; |
68 | static gxemul_hw_map_t gxemul_hw_map; |
68 | static chardev_t console; |
69 | static chardev_t console; |
69 | static irq_t gxemul_irq; |
70 | static irq_t gxemul_irq; |
70 | static irq_t gxemul_timer_irq; |
71 | static irq_t gxemul_timer_irq; |
71 | 72 | ||
72 | static bool hw_map_init_called = false; |
73 | static bool hw_map_init_called = false; |
73 | 74 | ||
74 | static void gxemul_write(chardev_t *dev, const char ch); |
75 | static void gxemul_write(chardev_t *dev, const char ch); |
75 | static void gxemul_enable(chardev_t *dev); |
76 | static void gxemul_enable(chardev_t *dev); |
76 | static void gxemul_disable(chardev_t *dev); |
77 | static void gxemul_disable(chardev_t *dev); |
77 | static char gxemul_do_read(chardev_t *dev); |
78 | static char gxemul_do_read(chardev_t *dev); |
78 | 79 | ||
79 | static chardev_operations_t gxemul_ops = { |
80 | static chardev_operations_t gxemul_ops = { |
80 | .resume = gxemul_enable, |
81 | .resume = gxemul_enable, |
81 | .suspend = gxemul_disable, |
82 | .suspend = gxemul_disable, |
82 | .write = gxemul_write, |
83 | .write = gxemul_write, |
83 | .read = gxemul_do_read, |
84 | .read = gxemul_do_read, |
84 | }; |
85 | }; |
85 | 86 | ||
86 | 87 | ||
87 | /** Returns the mask of active interrupts. */ |
88 | /** Returns the mask of active interrupts. */ |
88 | static inline uint32_t gxemul_irqc_get_sources(void) |
89 | static inline uint32_t gxemul_irqc_get_sources(void) |
89 | { |
90 | { |
90 | return *(uint32_t*) gxemul_hw_map.irqc; |
91 | return *(uint32_t*) gxemul_hw_map.irqc; |
91 | } |
92 | } |
92 | 93 | ||
93 | 94 | ||
94 | /** Masks interrupt. |
95 | /** Masks interrupt. |
95 | * |
96 | * |
96 | * @param irq interrupt number |
97 | * @param irq interrupt number |
97 | */ |
98 | */ |
98 | static inline void gxemul_irqc_mask(uint32_t irq) |
99 | static inline void gxemul_irqc_mask(uint32_t irq) |
99 | { |
100 | { |
100 | *(uint32_t*) gxemul_hw_map.irqc_mask = irq; |
101 | *(uint32_t*) gxemul_hw_map.irqc_mask = irq; |
101 | } |
102 | } |
102 | 103 | ||
103 | 104 | ||
104 | /** Unmasks interrupt. |
105 | /** Unmasks interrupt. |
105 | * |
106 | * |
106 | * @param irq interrupt number |
107 | * @param irq interrupt number |
107 | */ |
108 | */ |
108 | static inline void gxemul_irqc_unmask(uint32_t irq) |
109 | static inline void gxemul_irqc_unmask(uint32_t irq) |
109 | { |
110 | { |
110 | *(uint32_t*) gxemul_hw_map.irqc_unmask = irq; |
111 | *(uint32_t*) gxemul_hw_map.irqc_unmask = irq; |
111 | } |
112 | } |
112 | 113 | ||
113 | 114 | ||
114 | /** Initializes #gxemul_hw_map. */ |
115 | /** Initializes #gxemul_hw_map. */ |
115 | void gxemul_hw_map_init(void) |
116 | void gxemul_hw_map_init(void) |
116 | { |
117 | { |
117 | gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE); |
118 | gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE); |
118 | gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE); |
119 | gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE); |
119 | gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE); |
120 | gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE); |
120 | gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE); |
121 | gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE); |
121 | 122 | ||
122 | gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET; |
123 | gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET; |
123 | gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET; |
124 | gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET; |
124 | gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET; |
125 | gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET; |
125 | gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + GXEMUL_IRQC_UNMASK_OFFSET; |
126 | gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + GXEMUL_IRQC_UNMASK_OFFSET; |
126 | 127 | ||
127 | hw_map_init_called = true; |
128 | hw_map_init_called = true; |
128 | } |
129 | } |
129 | 130 | ||
130 | 131 | ||
131 | /** Putchar that works with gxemul */ |
132 | /** Putchar that works with gxemul */ |
132 | static void gxemul_write(chardev_t *dev, const char ch) |
133 | static void gxemul_write(chardev_t *dev, const char ch) |
133 | { |
134 | { |
134 | *((char *) gxemul_hw_map.videoram) = ch; |
135 | *((char *) gxemul_hw_map.videoram) = ch; |
135 | } |
136 | } |
136 | 137 | ||
137 | 138 | ||
138 | /* Called from getc(). */ |
139 | /* Called from getc(). */ |
139 | static void gxemul_enable(chardev_t *dev) |
140 | static void gxemul_enable(chardev_t *dev) |
140 | { |
141 | { |
141 | gxemul_irqc_unmask(GXEMUL_KBD_IRQ); |
142 | gxemul_irqc_unmask(GXEMUL_KBD_IRQ); |
142 | } |
143 | } |
143 | 144 | ||
144 | 145 | ||
145 | /* Called from getc(). */ |
146 | /* Called from getc(). */ |
146 | static void gxemul_disable(chardev_t *dev) |
147 | static void gxemul_disable(chardev_t *dev) |
147 | { |
148 | { |
148 | gxemul_irqc_mask(GXEMUL_KBD_IRQ); |
149 | gxemul_irqc_mask(GXEMUL_KBD_IRQ); |
149 | } |
150 | } |
150 | 151 | ||
151 | 152 | ||
152 | /** Read character using polling, assume interrupts disabled. |
153 | /** Read character using polling, assume interrupts disabled. |
153 | * |
154 | * |
154 | * @param dev Not used. |
155 | * @param dev Not used. |
155 | */ |
156 | */ |
156 | static char gxemul_do_read(chardev_t *dev) |
157 | static char gxemul_do_read(chardev_t *dev) |
157 | { |
158 | { |
158 | char ch; |
159 | char ch; |
159 | 160 | ||
160 | while (1) { |
161 | while (1) { |
161 | ch = *((volatile char *) gxemul_hw_map.kbd); |
162 | ch = *((volatile char *) gxemul_hw_map.kbd); |
162 | if (ch) { |
163 | if (ch) { |
163 | if (ch == '\r') |
164 | if (ch == '\r') |
164 | return '\n'; |
165 | return '\n'; |
165 | if (ch == 0x7f) |
166 | if (ch == 0x7f) |
166 | return '\b'; |
167 | return '\b'; |
167 | return ch; |
168 | return ch; |
168 | } |
169 | } |
169 | } |
170 | } |
170 | } |
171 | } |
171 | 172 | ||
172 | 173 | ||
173 | /** Process keyboard interrupt. */ |
174 | /** Process keyboard interrupt. */ |
174 | static void gxemul_irq_handler(irq_t *irq, void *arg, ...) |
175 | static void gxemul_irq_handler(irq_t *irq, void *arg, ...) |
175 | { |
176 | { |
176 | if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox)) { |
177 | if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox)) { |
177 | ipc_irq_send_notif(irq); |
178 | ipc_irq_send_notif(irq); |
178 | } else { |
179 | } else { |
179 | char ch = 0; |
180 | char ch = 0; |
180 | 181 | ||
181 | ch = *((char *) gxemul_hw_map.kbd); |
182 | ch = *((char *) gxemul_hw_map.kbd); |
182 | if (ch == '\r') { |
183 | if (ch == '\r') { |
183 | ch = '\n'; |
184 | ch = '\n'; |
184 | } |
185 | } |
185 | if (ch == 0x7f) { |
186 | if (ch == 0x7f) { |
186 | ch = '\b'; |
187 | ch = '\b'; |
187 | } |
188 | } |
188 | chardev_push_character(&console, ch); |
189 | chardev_push_character(&console, ch); |
189 | } |
190 | } |
190 | } |
191 | } |
191 | 192 | ||
192 | 193 | ||
193 | static irq_ownership_t gxemul_claim(void) |
194 | static irq_ownership_t gxemul_claim(void) |
194 | { |
195 | { |
195 | return IRQ_ACCEPT; |
196 | return IRQ_ACCEPT; |
196 | } |
197 | } |
197 | 198 | ||
198 | 199 | ||
199 | void gxemul_grab_console(void) |
200 | void gxemul_grab_console(void) |
200 | { |
201 | { |
201 | ipl_t ipl = interrupts_disable(); |
202 | ipl_t ipl = interrupts_disable(); |
202 | spinlock_lock(&gxemul_irq.lock); |
203 | spinlock_lock(&gxemul_irq.lock); |
203 | gxemul_irq.notif_cfg.notify = false; |
204 | gxemul_irq.notif_cfg.notify = false; |
204 | spinlock_unlock(&gxemul_irq.lock); |
205 | spinlock_unlock(&gxemul_irq.lock); |
205 | interrupts_restore(ipl); |
206 | interrupts_restore(ipl); |
206 | } |
207 | } |
207 | 208 | ||
208 | 209 | ||
209 | void gxemul_release_console(void) |
210 | void gxemul_release_console(void) |
210 | { |
211 | { |
211 | ipl_t ipl = interrupts_disable(); |
212 | ipl_t ipl = interrupts_disable(); |
212 | spinlock_lock(&gxemul_irq.lock); |
213 | spinlock_lock(&gxemul_irq.lock); |
213 | if (gxemul_irq.notif_cfg.answerbox) { |
214 | if (gxemul_irq.notif_cfg.answerbox) { |
214 | gxemul_irq.notif_cfg.notify = true; |
215 | gxemul_irq.notif_cfg.notify = true; |
215 | } |
216 | } |
216 | spinlock_unlock(&gxemul_irq.lock); |
217 | spinlock_unlock(&gxemul_irq.lock); |
217 | interrupts_restore(ipl); |
218 | interrupts_restore(ipl); |
218 | } |
219 | } |
219 | 220 | ||
220 | 221 | ||
221 | /** Initializes console object representing gxemul console. |
222 | /** Initializes console object representing gxemul console. |
222 | * |
223 | * |
223 | * @param Console device number. |
224 | * @param Console device number. |
224 | */ |
225 | */ |
225 | void gxemul_console_init(devno_t devno) |
226 | void gxemul_console_init(devno_t devno) |
226 | { |
227 | { |
227 | chardev_initialize("gxemul_console", &console, &gxemul_ops); |
228 | chardev_initialize("gxemul_console", &console, &gxemul_ops); |
228 | stdin = &console; |
229 | stdin = &console; |
229 | stdout = &console; |
230 | stdout = &console; |
230 | 231 | ||
231 | irq_initialize(&gxemul_irq); |
232 | irq_initialize(&gxemul_irq); |
232 | gxemul_irq.devno = devno; |
233 | gxemul_irq.devno = devno; |
233 | gxemul_irq.inr = GXEMUL_KBD_IRQ; |
234 | gxemul_irq.inr = GXEMUL_KBD_IRQ; |
234 | gxemul_irq.claim = gxemul_claim; |
235 | gxemul_irq.claim = gxemul_claim; |
235 | gxemul_irq.handler = gxemul_irq_handler; |
236 | gxemul_irq.handler = gxemul_irq_handler; |
236 | irq_register(&gxemul_irq); |
237 | irq_register(&gxemul_irq); |
237 | 238 | ||
238 | gxemul_irqc_unmask(GXEMUL_KBD_IRQ); |
239 | gxemul_irqc_unmask(GXEMUL_KBD_IRQ); |
239 | 240 | ||
240 | sysinfo_set_item_val("kbd", NULL, true); |
241 | sysinfo_set_item_val("kbd", NULL, true); |
241 | sysinfo_set_item_val("kbd.devno", NULL, devno); |
242 | sysinfo_set_item_val("kbd.devno", NULL, devno); |
242 | sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ); |
243 | sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ); |
243 | sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd); |
244 | sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd); |
244 | } |
245 | } |
245 | 246 | ||
246 | 247 | ||
247 | 248 | ||
248 | /** Starts gxemul Real Time Clock device, which asserts regular interrupts. |
249 | /** Starts gxemul Real Time Clock device, which asserts regular interrupts. |
249 | * |
250 | * |
250 | * @param frequency Interrupts frequency (0 disables RTC). |
251 | * @param frequency Interrupts frequency (0 disables RTC). |
251 | */ |
252 | */ |
252 | static void gxemul_timer_start(uint32_t frequency) |
253 | static void gxemul_timer_start(uint32_t frequency) |
253 | { |
254 | { |
254 | *(uint32_t*) gxemul_hw_map.rtc_freq = frequency; |
255 | *(uint32_t*) gxemul_hw_map.rtc_freq = frequency; |
255 | } |
256 | } |
256 | 257 | ||
257 | 258 | ||
258 | static irq_ownership_t gxemul_timer_claim(void) |
259 | static irq_ownership_t gxemul_timer_claim(void) |
259 | { |
260 | { |
260 | return IRQ_ACCEPT; |
261 | return IRQ_ACCEPT; |
261 | } |
262 | } |
262 | 263 | ||
263 | 264 | ||
264 | /** Timer interrupt handler. |
265 | /** Timer interrupt handler. |
265 | * |
266 | * |
266 | * @param irq Interrupt information. |
267 | * @param irq Interrupt information. |
267 | * @param arg Not used. |
268 | * @param arg Not used. |
268 | */ |
269 | */ |
269 | static void gxemul_timer_irq_handler(irq_t *irq, void *arg, ...) |
270 | static void gxemul_timer_irq_handler(irq_t *irq, void *arg, ...) |
270 | { |
271 | { |
271 | /* TODO time drifts ?? |
272 | /* TODO time drifts ?? |
272 | unsigned long drift; |
273 | unsigned long drift; |
273 | 274 | ||
274 | drift = cp0_count_read() - nextcount; |
275 | drift = cp0_count_read() - nextcount; |
275 | while (drift > cp0_compare_value) { |
276 | while (drift > cp0_compare_value) { |
276 | drift -= cp0_compare_value; |
277 | drift -= cp0_compare_value; |
277 | CPU->missed_clock_ticks++; |
278 | CPU->missed_clock_ticks++; |
278 | } |
279 | } |
279 | nextcount = cp0_count_read() + cp0_compare_value - drift; |
280 | nextcount = cp0_count_read() + cp0_compare_value - drift; |
280 | cp0_compare_write(nextcount); |
281 | cp0_compare_write(nextcount); |
281 | */ |
282 | */ |
282 | 283 | ||
283 | /* |
284 | /* |
284 | * We are holding a lock which prevents preemption. |
285 | * We are holding a lock which prevents preemption. |
285 | * Release the lock, call clock() and reacquire the lock again. |
286 | * Release the lock, call clock() and reacquire the lock again. |
286 | */ |
287 | */ |
287 | spinlock_unlock(&irq->lock); |
288 | spinlock_unlock(&irq->lock); |
288 | clock(); |
289 | clock(); |
289 | spinlock_lock(&irq->lock); |
290 | spinlock_lock(&irq->lock); |
290 | 291 | ||
291 | /* acknowledge tick */ |
292 | /* acknowledge tick */ |
292 | *(uint32_t*) gxemul_hw_map.rtc_ack = 0; |
293 | *(uint32_t*) gxemul_hw_map.rtc_ack = 0; |
293 | 294 | ||
294 | /* TODO what's that? * |
295 | /* TODO what's that? * |
295 | if (virtual_timer_fnc != NULL) |
296 | if (virtual_timer_fnc != NULL) |
296 | virtual_timer_fnc(); |
297 | virtual_timer_fnc(); |
297 | */ |
298 | */ |
298 | } |
299 | } |
299 | 300 | ||
300 | 301 | ||
301 | /** Initializes and registers timer interrupt handler. */ |
302 | /** Initializes and registers timer interrupt handler. */ |
302 | static void gxemul_timer_irq_init() |
303 | static void gxemul_timer_irq_init() |
303 | { |
304 | { |
304 | irq_initialize(&gxemul_timer_irq); |
305 | irq_initialize(&gxemul_timer_irq); |
305 | gxemul_timer_irq.devno = device_assign_devno(); |
306 | gxemul_timer_irq.devno = device_assign_devno(); |
306 | gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ; |
307 | gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ; |
307 | gxemul_timer_irq.claim = gxemul_timer_claim; |
308 | gxemul_timer_irq.claim = gxemul_timer_claim; |
308 | gxemul_timer_irq.handler = gxemul_timer_irq_handler; |
309 | gxemul_timer_irq.handler = gxemul_timer_irq_handler; |
309 | 310 | ||
310 | irq_register(&gxemul_timer_irq); |
311 | irq_register(&gxemul_timer_irq); |
311 | } |
312 | } |
312 | 313 | ||
313 | 314 | ||
314 | /** Starts timer. |
315 | /** Starts timer. |
315 | * |
316 | * |
316 | * Initiates regular timer interrupts after initializing |
317 | * Initiates regular timer interrupts after initializing |
317 | * corresponding interrupt handler. |
318 | * corresponding interrupt handler. |
318 | */ |
319 | */ |
319 | void gxemul_timer_irq_start() |
320 | void gxemul_timer_irq_start() |
320 | { |
321 | { |
321 | gxemul_timer_irq_init(); |
322 | gxemul_timer_irq_init(); |
322 | gxemul_timer_start(GXEMUL_TIMER_FREQ); |
323 | gxemul_timer_start(GXEMUL_TIMER_FREQ); |
323 | } |
324 | } |
324 | 325 | ||
325 | 326 | ||
326 | /** Returns the size of emulated memory. |
327 | /** Returns the size of emulated memory. |
327 | * |
328 | * |
328 | * @return Size in bytes. |
329 | * @return Size in bytes. |
329 | */ |
330 | */ |
330 | size_t gxemul_get_memory_size(void) |
331 | size_t gxemul_get_memory_size(void) |
331 | { |
332 | { |
332 | return *((int*)(GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET)); |
333 | return *((int*)(GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET)); |
333 | } |
334 | } |
334 | 335 | ||
335 | 336 | ||
336 | void gxemul_debug_putc(char ch) |
337 | void gxemul_debug_putc(char ch) |
337 | { |
338 | { |
338 | char * addr = 0; |
339 | char * addr = 0; |
339 | if (!hw_map_init_called) { |
340 | if (!hw_map_init_called) { |
340 | addr = (char *) GXEMUL_KBD; |
341 | addr = (char *) GXEMUL_KBD; |
341 | } else { |
342 | } else { |
342 | addr = (char *) gxemul_hw_map.videoram; |
343 | addr = (char *) gxemul_hw_map.videoram; |
343 | } |
344 | } |
344 | 345 | ||
345 | *(addr) = ch; |
346 | *(addr) = ch; |
346 | } |
347 | } |
347 | 348 | ||
348 | 349 | ||
349 | /** Stops gxemul. */ |
350 | /** Stops gxemul. */ |
350 | void gxemul_cpu_halt(void) |
351 | void gxemul_cpu_halt(void) |
351 | { |
352 | { |
352 | char * addr = 0; |
353 | char * addr = 0; |
353 | if (!hw_map_init_called) { |
354 | if (!hw_map_init_called) { |
354 | addr = (char *) GXEMUL_KBD; |
355 | addr = (char *) GXEMUL_KBD; |
355 | } else { |
356 | } else { |
356 | addr = (char *) gxemul_hw_map.videoram; |
357 | addr = (char *) gxemul_hw_map.videoram; |
357 | } |
358 | } |
358 | 359 | ||
359 | *(addr + GXEMUL_HALT_OFFSET) = '\0'; |
360 | *(addr + GXEMUL_HALT_OFFSET) = '\0'; |
360 | } |
361 | } |
361 | 362 | ||
362 | 363 | ||
363 | /** Gxemul specific interrupt exception handler. |
364 | /** Gxemul specific interrupt exception handler. |
364 | * |
365 | * |
365 | * Determines sources of the interrupt from interrupt controller and |
366 | * Determines sources of the interrupt from interrupt controller and |
366 | * calls high-level handlers for them. |
367 | * calls high-level handlers for them. |
367 | * |
368 | * |
368 | * @param exc_no Interrupt exception number. |
369 | * @param exc_no Interrupt exception number. |
369 | * @param istate Saved processor state. |
370 | * @param istate Saved processor state. |
370 | */ |
371 | */ |
371 | void gxemul_irq_exception(int exc_no, istate_t *istate) |
372 | void gxemul_irq_exception(int exc_no, istate_t *istate) |
372 | { |
373 | { |
373 | uint32_t sources = gxemul_irqc_get_sources(); |
374 | uint32_t sources = gxemul_irqc_get_sources(); |
374 | int i = 0; |
375 | int i = 0; |
375 | for (; i < GXEMUL_IRQC_MAX_IRQ; i++) { |
376 | for (; i < GXEMUL_IRQC_MAX_IRQ; i++) { |
376 | if (sources & (1 << i)) { |
377 | if (sources & (1 << i)) { |
377 | irq_t *irq = irq_dispatch_and_lock(i); |
378 | irq_t *irq = irq_dispatch_and_lock(i); |
378 | if (irq) { |
379 | if (irq) { |
379 | /* The IRQ handler was found. */ |
380 | /* The IRQ handler was found. */ |
380 | irq->handler(irq, irq->arg); |
381 | irq->handler(irq, irq->arg); |
381 | spinlock_unlock(&irq->lock); |
382 | spinlock_unlock(&irq->lock); |
382 | } else { |
383 | } else { |
383 | /* Spurious interrupt.*/ |
384 | /* Spurious interrupt.*/ |
384 | dprintf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, i); |
385 | dprintf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, i); |
385 | } |
386 | } |
386 | } |
387 | } |
387 | } |
388 | } |
388 | } |
389 | } |
389 | 390 | ||
390 | 391 | ||
391 | uintptr_t gxemul_get_fb_address(void) |
392 | uintptr_t gxemul_get_fb_address(void) |
392 | { |
393 | { |
393 | return (uintptr_t) GXEMUL_FB; |
394 | return (uintptr_t) GXEMUL_FB; |
394 | } |
395 | } |
395 | 396 | ||
396 | /** @} |
397 | /** @} |
397 | */ |
398 | */ |
398 | 399 |