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1 | # |
1 | # |
2 | # Copyright (c) 2005 Jakub Jermar |
2 | # Copyright (c) 2005 Jakub Jermar |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | /** |
29 | /** |
30 | * @file |
30 | * @file |
31 | * @brief This file contains kernel trap table. |
31 | * @brief This file contains kernel trap table. |
32 | */ |
32 | */ |
33 | 33 | ||
34 | .register %g2, #scratch |
34 | .register %g2, #scratch |
35 | .register %g3, #scratch |
35 | .register %g3, #scratch |
36 | 36 | ||
37 | .text |
37 | .text |
38 | 38 | ||
39 | #include <arch/trap/trap_table.h> |
39 | #include <arch/trap/trap_table.h> |
40 | #include <arch/trap/regwin.h> |
40 | #include <arch/trap/regwin.h> |
41 | #include <arch/trap/interrupt.h> |
41 | #include <arch/trap/interrupt.h> |
42 | #include <arch/trap/exception.h> |
42 | #include <arch/trap/exception.h> |
43 | #include <arch/trap/syscall.h> |
43 | #include <arch/trap/syscall.h> |
44 | #include <arch/trap/mmu.h> |
44 | #include <arch/trap/mmu.h> |
45 | #include <arch/mm/mmu.h> |
45 | #include <arch/mm/mmu.h> |
46 | #include <arch/mm/page.h> |
46 | #include <arch/mm/page.h> |
47 | #include <arch/stack.h> |
47 | #include <arch/stack.h> |
48 | #include <arch/regdef.h> |
48 | #include <arch/regdef.h> |
49 | 49 | ||
50 | #define TABLE_SIZE TRAP_TABLE_SIZE |
50 | #define TABLE_SIZE TRAP_TABLE_SIZE |
51 | #define ENTRY_SIZE TRAP_TABLE_ENTRY_SIZE |
51 | #define ENTRY_SIZE TRAP_TABLE_ENTRY_SIZE |
52 | 52 | ||
53 | /* |
53 | /* |
54 | * Kernel trap table. |
54 | * Kernel trap table. |
55 | */ |
55 | */ |
56 | .align TABLE_SIZE |
56 | .align TABLE_SIZE |
57 | .global trap_table |
57 | .global trap_table |
58 | trap_table: |
58 | trap_table: |
59 | 59 | ||
60 | /* TT = 0x08, TL = 0, instruction_access_exception */ |
60 | /* TT = 0x08, TL = 0, instruction_access_exception */ |
61 | .org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE |
61 | .org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE |
62 | .global instruction_access_exception_tl0 |
62 | .global instruction_access_exception_tl0 |
63 | instruction_access_exception_tl0: |
63 | instruction_access_exception_tl0: |
64 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
64 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
65 | PREEMPTIBLE_HANDLER instruction_access_exception |
65 | PREEMPTIBLE_HANDLER instruction_access_exception |
66 | 66 | ||
67 | /* TT = 0x0a, TL = 0, instruction_access_error */ |
67 | /* TT = 0x0a, TL = 0, instruction_access_error */ |
68 | .org trap_table + TT_INSTRUCTION_ACCESS_ERROR*ENTRY_SIZE |
68 | .org trap_table + TT_INSTRUCTION_ACCESS_ERROR*ENTRY_SIZE |
69 | .global instruction_access_error_tl0 |
69 | .global instruction_access_error_tl0 |
70 | instruction_access_error_tl0: |
70 | instruction_access_error_tl0: |
71 | PREEMPTIBLE_HANDLER instruction_access_error |
71 | PREEMPTIBLE_HANDLER instruction_access_error |
72 | 72 | ||
73 | /* TT = 0x10, TL = 0, illegal_instruction */ |
73 | /* TT = 0x10, TL = 0, illegal_instruction */ |
74 | .org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE |
74 | .org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE |
75 | .global illegal_instruction_tl0 |
75 | .global illegal_instruction_tl0 |
76 | illegal_instruction_tl0: |
76 | illegal_instruction_tl0: |
77 | PREEMPTIBLE_HANDLER illegal_instruction |
77 | PREEMPTIBLE_HANDLER illegal_instruction |
78 | 78 | ||
79 | /* TT = 0x11, TL = 0, privileged_opcode */ |
79 | /* TT = 0x11, TL = 0, privileged_opcode */ |
80 | .org trap_table + TT_PRIVILEGED_OPCODE*ENTRY_SIZE |
80 | .org trap_table + TT_PRIVILEGED_OPCODE*ENTRY_SIZE |
81 | .global privileged_opcode_tl0 |
81 | .global privileged_opcode_tl0 |
82 | privileged_opcode_tl0: |
82 | privileged_opcode_tl0: |
83 | PREEMPTIBLE_HANDLER privileged_opcode |
83 | PREEMPTIBLE_HANDLER privileged_opcode |
84 | 84 | ||
85 | /* TT = 0x12, TL = 0, unimplemented_LDD */ |
85 | /* TT = 0x12, TL = 0, unimplemented_LDD */ |
86 | .org trap_table + TT_UNIMPLEMENTED_LDD*ENTRY_SIZE |
86 | .org trap_table + TT_UNIMPLEMENTED_LDD*ENTRY_SIZE |
87 | .global unimplemented_LDD_tl0 |
87 | .global unimplemented_LDD_tl0 |
88 | unimplemented_LDD_tl0: |
88 | unimplemented_LDD_tl0: |
89 | PREEMPTIBLE_HANDLER unimplemented_LDD |
89 | PREEMPTIBLE_HANDLER unimplemented_LDD |
90 | 90 | ||
91 | /* TT = 0x13, TL = 0, unimplemented_STD */ |
91 | /* TT = 0x13, TL = 0, unimplemented_STD */ |
92 | .org trap_table + TT_UNIMPLEMENTED_STD*ENTRY_SIZE |
92 | .org trap_table + TT_UNIMPLEMENTED_STD*ENTRY_SIZE |
93 | .global unimplemented_STD_tl0 |
93 | .global unimplemented_STD_tl0 |
94 | unimplemented_STD_tl0: |
94 | unimplemented_STD_tl0: |
95 | PREEMPTIBLE_HANDLER unimplemented_STD |
95 | PREEMPTIBLE_HANDLER unimplemented_STD |
96 | 96 | ||
97 | /* TT = 0x20, TL = 0, fb_disabled handler */ |
97 | /* TT = 0x20, TL = 0, fb_disabled handler */ |
98 | .org trap_table + TT_FP_DISABLED*ENTRY_SIZE |
98 | .org trap_table + TT_FP_DISABLED*ENTRY_SIZE |
99 | .global fb_disabled_tl0 |
99 | .global fb_disabled_tl0 |
100 | fp_disabled_tl0: |
100 | fp_disabled_tl0: |
101 | PREEMPTIBLE_HANDLER fp_disabled |
101 | PREEMPTIBLE_HANDLER fp_disabled |
102 | 102 | ||
103 | /* TT = 0x21, TL = 0, fb_exception_ieee_754 handler */ |
103 | /* TT = 0x21, TL = 0, fb_exception_ieee_754 handler */ |
104 | .org trap_table + TT_FP_EXCEPTION_IEEE_754*ENTRY_SIZE |
104 | .org trap_table + TT_FP_EXCEPTION_IEEE_754*ENTRY_SIZE |
105 | .global fb_exception_ieee_754_tl0 |
105 | .global fb_exception_ieee_754_tl0 |
106 | fp_exception_ieee_754_tl0: |
106 | fp_exception_ieee_754_tl0: |
107 | PREEMPTIBLE_HANDLER fp_exception_ieee_754 |
107 | PREEMPTIBLE_HANDLER fp_exception_ieee_754 |
108 | 108 | ||
109 | /* TT = 0x22, TL = 0, fb_exception_other handler */ |
109 | /* TT = 0x22, TL = 0, fb_exception_other handler */ |
110 | .org trap_table + TT_FP_EXCEPTION_OTHER*ENTRY_SIZE |
110 | .org trap_table + TT_FP_EXCEPTION_OTHER*ENTRY_SIZE |
111 | .global fb_exception_other_tl0 |
111 | .global fb_exception_other_tl0 |
112 | fp_exception_other_tl0: |
112 | fp_exception_other_tl0: |
113 | PREEMPTIBLE_HANDLER fp_exception_other |
113 | PREEMPTIBLE_HANDLER fp_exception_other |
114 | 114 | ||
115 | /* TT = 0x23, TL = 0, tag_overflow */ |
115 | /* TT = 0x23, TL = 0, tag_overflow */ |
116 | .org trap_table + TT_TAG_OVERFLOW*ENTRY_SIZE |
116 | .org trap_table + TT_TAG_OVERFLOW*ENTRY_SIZE |
117 | .global tag_overflow_tl0 |
117 | .global tag_overflow_tl0 |
118 | tag_overflow_tl0: |
118 | tag_overflow_tl0: |
119 | PREEMPTIBLE_HANDLER tag_overflow |
119 | PREEMPTIBLE_HANDLER tag_overflow |
120 | 120 | ||
121 | /* TT = 0x24, TL = 0, clean_window handler */ |
121 | /* TT = 0x24, TL = 0, clean_window handler */ |
122 | .org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE |
122 | .org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE |
123 | .global clean_window_tl0 |
123 | .global clean_window_tl0 |
124 | clean_window_tl0: |
124 | clean_window_tl0: |
125 | CLEAN_WINDOW_HANDLER |
125 | CLEAN_WINDOW_HANDLER |
126 | 126 | ||
127 | /* TT = 0x28, TL = 0, division_by_zero */ |
127 | /* TT = 0x28, TL = 0, division_by_zero */ |
128 | .org trap_table + TT_DIVISION_BY_ZERO*ENTRY_SIZE |
128 | .org trap_table + TT_DIVISION_BY_ZERO*ENTRY_SIZE |
129 | .global division_by_zero_tl0 |
129 | .global division_by_zero_tl0 |
130 | division_by_zero_tl0: |
130 | division_by_zero_tl0: |
131 | PREEMPTIBLE_HANDLER division_by_zero |
131 | PREEMPTIBLE_HANDLER division_by_zero |
132 | 132 | ||
133 | /* TT = 0x30, TL = 0, data_access_exception */ |
133 | /* TT = 0x30, TL = 0, data_access_exception */ |
134 | .org trap_table + TT_DATA_ACCESS_EXCEPTION*ENTRY_SIZE |
134 | .org trap_table + TT_DATA_ACCESS_EXCEPTION*ENTRY_SIZE |
135 | .global data_access_exception_tl0 |
135 | .global data_access_exception_tl0 |
136 | data_access_exception_tl0: |
136 | data_access_exception_tl0: |
137 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
137 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
138 | PREEMPTIBLE_HANDLER data_access_exception |
138 | PREEMPTIBLE_HANDLER data_access_exception |
139 | 139 | ||
140 | /* TT = 0x32, TL = 0, data_access_error */ |
140 | /* TT = 0x32, TL = 0, data_access_error */ |
141 | .org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE |
141 | .org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE |
142 | .global data_access_error_tl0 |
142 | .global data_access_error_tl0 |
143 | data_access_error_tl0: |
143 | data_access_error_tl0: |
144 | PREEMPTIBLE_HANDLER data_access_error |
144 | PREEMPTIBLE_HANDLER data_access_error |
145 | 145 | ||
146 | /* TT = 0x34, TL = 0, mem_address_not_aligned */ |
146 | /* TT = 0x34, TL = 0, mem_address_not_aligned */ |
147 | .org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
147 | .org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
148 | .global mem_address_not_aligned_tl0 |
148 | .global mem_address_not_aligned_tl0 |
149 | mem_address_not_aligned_tl0: |
149 | mem_address_not_aligned_tl0: |
150 | PREEMPTIBLE_HANDLER mem_address_not_aligned |
150 | PREEMPTIBLE_HANDLER mem_address_not_aligned |
151 | 151 | ||
152 | /* TT = 0x35, TL = 0, LDDF_mem_address_not_aligned */ |
152 | /* TT = 0x35, TL = 0, LDDF_mem_address_not_aligned */ |
153 | .org trap_table + TT_LDDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
153 | .org trap_table + TT_LDDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
154 | .global LDDF_mem_address_not_aligned_tl0 |
154 | .global LDDF_mem_address_not_aligned_tl0 |
155 | LDDF_mem_address_not_aligned_tl0: |
155 | LDDF_mem_address_not_aligned_tl0: |
156 | PREEMPTIBLE_HANDLER LDDF_mem_address_not_aligned |
156 | PREEMPTIBLE_HANDLER LDDF_mem_address_not_aligned |
157 | 157 | ||
158 | /* TT = 0x36, TL = 0, STDF_mem_address_not_aligned */ |
158 | /* TT = 0x36, TL = 0, STDF_mem_address_not_aligned */ |
159 | .org trap_table + TT_STDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
159 | .org trap_table + TT_STDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
160 | .global STDF_mem_address_not_aligned_tl0 |
160 | .global STDF_mem_address_not_aligned_tl0 |
161 | STDF_mem_address_not_aligned_tl0: |
161 | STDF_mem_address_not_aligned_tl0: |
162 | PREEMPTIBLE_HANDLER STDF_mem_address_not_aligned |
162 | PREEMPTIBLE_HANDLER STDF_mem_address_not_aligned |
163 | 163 | ||
164 | /* TT = 0x37, TL = 0, privileged_action */ |
164 | /* TT = 0x37, TL = 0, privileged_action */ |
165 | .org trap_table + TT_PRIVILEGED_ACTION*ENTRY_SIZE |
165 | .org trap_table + TT_PRIVILEGED_ACTION*ENTRY_SIZE |
166 | .global privileged_action_tl0 |
166 | .global privileged_action_tl0 |
167 | privileged_action_tl0: |
167 | privileged_action_tl0: |
168 | PREEMPTIBLE_HANDLER privileged_action |
168 | PREEMPTIBLE_HANDLER privileged_action |
169 | 169 | ||
170 | /* TT = 0x38, TL = 0, LDQF_mem_address_not_aligned */ |
170 | /* TT = 0x38, TL = 0, LDQF_mem_address_not_aligned */ |
171 | .org trap_table + TT_LDQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
171 | .org trap_table + TT_LDQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
172 | .global LDQF_mem_address_not_aligned_tl0 |
172 | .global LDQF_mem_address_not_aligned_tl0 |
173 | LDQF_mem_address_not_aligned_tl0: |
173 | LDQF_mem_address_not_aligned_tl0: |
174 | PREEMPTIBLE_HANDLER LDQF_mem_address_not_aligned |
174 | PREEMPTIBLE_HANDLER LDQF_mem_address_not_aligned |
175 | 175 | ||
176 | /* TT = 0x39, TL = 0, STQF_mem_address_not_aligned */ |
176 | /* TT = 0x39, TL = 0, STQF_mem_address_not_aligned */ |
177 | .org trap_table + TT_STQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
177 | .org trap_table + TT_STQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
178 | .global STQF_mem_address_not_aligned_tl0 |
178 | .global STQF_mem_address_not_aligned_tl0 |
179 | STQF_mem_address_not_aligned_tl0: |
179 | STQF_mem_address_not_aligned_tl0: |
180 | PREEMPTIBLE_HANDLER STQF_mem_address_not_aligned |
180 | PREEMPTIBLE_HANDLER STQF_mem_address_not_aligned |
181 | 181 | ||
182 | /* TT = 0x41, TL = 0, interrupt_level_1 handler */ |
182 | /* TT = 0x41, TL = 0, interrupt_level_1 handler */ |
183 | .org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE |
183 | .org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE |
184 | .global interrupt_level_1_handler_tl0 |
184 | .global interrupt_level_1_handler_tl0 |
185 | interrupt_level_1_handler_tl0: |
185 | interrupt_level_1_handler_tl0: |
186 | INTERRUPT_LEVEL_N_HANDLER 1 |
186 | INTERRUPT_LEVEL_N_HANDLER 1 |
187 | 187 | ||
188 | /* TT = 0x42, TL = 0, interrupt_level_2 handler */ |
188 | /* TT = 0x42, TL = 0, interrupt_level_2 handler */ |
189 | .org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE |
189 | .org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE |
190 | .global interrupt_level_2_handler_tl0 |
190 | .global interrupt_level_2_handler_tl0 |
191 | interrupt_level_2_handler_tl0: |
191 | interrupt_level_2_handler_tl0: |
192 | INTERRUPT_LEVEL_N_HANDLER 2 |
192 | INTERRUPT_LEVEL_N_HANDLER 2 |
193 | 193 | ||
194 | /* TT = 0x43, TL = 0, interrupt_level_3 handler */ |
194 | /* TT = 0x43, TL = 0, interrupt_level_3 handler */ |
195 | .org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE |
195 | .org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE |
196 | .global interrupt_level_3_handler_tl0 |
196 | .global interrupt_level_3_handler_tl0 |
197 | interrupt_level_3_handler_tl0: |
197 | interrupt_level_3_handler_tl0: |
198 | INTERRUPT_LEVEL_N_HANDLER 3 |
198 | INTERRUPT_LEVEL_N_HANDLER 3 |
199 | 199 | ||
200 | /* TT = 0x44, TL = 0, interrupt_level_4 handler */ |
200 | /* TT = 0x44, TL = 0, interrupt_level_4 handler */ |
201 | .org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE |
201 | .org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE |
202 | .global interrupt_level_4_handler_tl0 |
202 | .global interrupt_level_4_handler_tl0 |
203 | interrupt_level_4_handler_tl0: |
203 | interrupt_level_4_handler_tl0: |
204 | INTERRUPT_LEVEL_N_HANDLER 4 |
204 | INTERRUPT_LEVEL_N_HANDLER 4 |
205 | 205 | ||
206 | /* TT = 0x45, TL = 0, interrupt_level_5 handler */ |
206 | /* TT = 0x45, TL = 0, interrupt_level_5 handler */ |
207 | .org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE |
207 | .org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE |
208 | .global interrupt_level_5_handler_tl0 |
208 | .global interrupt_level_5_handler_tl0 |
209 | interrupt_level_5_handler_tl0: |
209 | interrupt_level_5_handler_tl0: |
210 | INTERRUPT_LEVEL_N_HANDLER 5 |
210 | INTERRUPT_LEVEL_N_HANDLER 5 |
211 | 211 | ||
212 | /* TT = 0x46, TL = 0, interrupt_level_6 handler */ |
212 | /* TT = 0x46, TL = 0, interrupt_level_6 handler */ |
213 | .org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE |
213 | .org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE |
214 | .global interrupt_level_6_handler_tl0 |
214 | .global interrupt_level_6_handler_tl0 |
215 | interrupt_level_6_handler_tl0: |
215 | interrupt_level_6_handler_tl0: |
216 | INTERRUPT_LEVEL_N_HANDLER 6 |
216 | INTERRUPT_LEVEL_N_HANDLER 6 |
217 | 217 | ||
218 | /* TT = 0x47, TL = 0, interrupt_level_7 handler */ |
218 | /* TT = 0x47, TL = 0, interrupt_level_7 handler */ |
219 | .org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE |
219 | .org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE |
220 | .global interrupt_level_7_handler_tl0 |
220 | .global interrupt_level_7_handler_tl0 |
221 | interrupt_level_7_handler_tl0: |
221 | interrupt_level_7_handler_tl0: |
222 | INTERRUPT_LEVEL_N_HANDLER 7 |
222 | INTERRUPT_LEVEL_N_HANDLER 7 |
223 | 223 | ||
224 | /* TT = 0x48, TL = 0, interrupt_level_8 handler */ |
224 | /* TT = 0x48, TL = 0, interrupt_level_8 handler */ |
225 | .org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE |
225 | .org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE |
226 | .global interrupt_level_8_handler_tl0 |
226 | .global interrupt_level_8_handler_tl0 |
227 | interrupt_level_8_handler_tl0: |
227 | interrupt_level_8_handler_tl0: |
228 | INTERRUPT_LEVEL_N_HANDLER 8 |
228 | INTERRUPT_LEVEL_N_HANDLER 8 |
229 | 229 | ||
230 | /* TT = 0x49, TL = 0, interrupt_level_9 handler */ |
230 | /* TT = 0x49, TL = 0, interrupt_level_9 handler */ |
231 | .org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE |
231 | .org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE |
232 | .global interrupt_level_9_handler_tl0 |
232 | .global interrupt_level_9_handler_tl0 |
233 | interrupt_level_9_handler_tl0: |
233 | interrupt_level_9_handler_tl0: |
234 | INTERRUPT_LEVEL_N_HANDLER 9 |
234 | INTERRUPT_LEVEL_N_HANDLER 9 |
235 | 235 | ||
236 | /* TT = 0x4a, TL = 0, interrupt_level_10 handler */ |
236 | /* TT = 0x4a, TL = 0, interrupt_level_10 handler */ |
237 | .org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE |
237 | .org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE |
238 | .global interrupt_level_10_handler_tl0 |
238 | .global interrupt_level_10_handler_tl0 |
239 | interrupt_level_10_handler_tl0: |
239 | interrupt_level_10_handler_tl0: |
240 | INTERRUPT_LEVEL_N_HANDLER 10 |
240 | INTERRUPT_LEVEL_N_HANDLER 10 |
241 | 241 | ||
242 | /* TT = 0x4b, TL = 0, interrupt_level_11 handler */ |
242 | /* TT = 0x4b, TL = 0, interrupt_level_11 handler */ |
243 | .org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE |
243 | .org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE |
244 | .global interrupt_level_11_handler_tl0 |
244 | .global interrupt_level_11_handler_tl0 |
245 | interrupt_level_11_handler_tl0: |
245 | interrupt_level_11_handler_tl0: |
246 | INTERRUPT_LEVEL_N_HANDLER 11 |
246 | INTERRUPT_LEVEL_N_HANDLER 11 |
247 | 247 | ||
248 | /* TT = 0x4c, TL = 0, interrupt_level_12 handler */ |
248 | /* TT = 0x4c, TL = 0, interrupt_level_12 handler */ |
249 | .org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE |
249 | .org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE |
250 | .global interrupt_level_12_handler_tl0 |
250 | .global interrupt_level_12_handler_tl0 |
251 | interrupt_level_12_handler_tl0: |
251 | interrupt_level_12_handler_tl0: |
252 | INTERRUPT_LEVEL_N_HANDLER 12 |
252 | INTERRUPT_LEVEL_N_HANDLER 12 |
253 | 253 | ||
254 | /* TT = 0x4d, TL = 0, interrupt_level_13 handler */ |
254 | /* TT = 0x4d, TL = 0, interrupt_level_13 handler */ |
255 | .org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE |
255 | .org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE |
256 | .global interrupt_level_13_handler_tl0 |
256 | .global interrupt_level_13_handler_tl0 |
257 | interrupt_level_13_handler_tl0: |
257 | interrupt_level_13_handler_tl0: |
258 | INTERRUPT_LEVEL_N_HANDLER 13 |
258 | INTERRUPT_LEVEL_N_HANDLER 13 |
259 | 259 | ||
260 | /* TT = 0x4e, TL = 0, interrupt_level_14 handler */ |
260 | /* TT = 0x4e, TL = 0, interrupt_level_14 handler */ |
261 | .org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE |
261 | .org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE |
262 | .global interrupt_level_14_handler_tl0 |
262 | .global interrupt_level_14_handler_tl0 |
263 | interrupt_level_14_handler_tl0: |
263 | interrupt_level_14_handler_tl0: |
264 | INTERRUPT_LEVEL_N_HANDLER 14 |
264 | INTERRUPT_LEVEL_N_HANDLER 14 |
265 | 265 | ||
266 | /* TT = 0x4f, TL = 0, interrupt_level_15 handler */ |
266 | /* TT = 0x4f, TL = 0, interrupt_level_15 handler */ |
267 | .org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE |
267 | .org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE |
268 | .global interrupt_level_15_handler_tl0 |
268 | .global interrupt_level_15_handler_tl0 |
269 | interrupt_level_15_handler_tl0: |
269 | interrupt_level_15_handler_tl0: |
270 | INTERRUPT_LEVEL_N_HANDLER 15 |
270 | INTERRUPT_LEVEL_N_HANDLER 15 |
271 | 271 | ||
272 | /* TT = 0x60, TL = 0, interrupt_vector_trap handler */ |
272 | /* TT = 0x60, TL = 0, interrupt_vector_trap handler */ |
273 | .org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE |
273 | .org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE |
274 | .global interrupt_vector_trap_handler_tl0 |
274 | .global interrupt_vector_trap_handler_tl0 |
275 | interrupt_vector_trap_handler_tl0: |
275 | interrupt_vector_trap_handler_tl0: |
276 | INTERRUPT_VECTOR_TRAP_HANDLER |
276 | INTERRUPT_VECTOR_TRAP_HANDLER |
277 | 277 | ||
278 | /* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */ |
278 | /* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */ |
279 | .org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE |
279 | .org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE |
280 | .global fast_instruction_access_mmu_miss_handler_tl0 |
280 | .global fast_instruction_access_mmu_miss_handler_tl0 |
281 | fast_instruction_access_mmu_miss_handler_tl0: |
281 | fast_instruction_access_mmu_miss_handler_tl0: |
282 | FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
282 | FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
283 | 283 | ||
284 | /* TT = 0x68, TL = 0, fast_data_access_MMU_miss */ |
284 | /* TT = 0x68, TL = 0, fast_data_access_MMU_miss */ |
285 | .org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE |
285 | .org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE |
286 | .global fast_data_access_mmu_miss_handler_tl0 |
286 | .global fast_data_access_mmu_miss_handler_tl0 |
287 | fast_data_access_mmu_miss_handler_tl0: |
287 | fast_data_access_mmu_miss_handler_tl0: |
288 | FAST_DATA_ACCESS_MMU_MISS_HANDLER 0 |
288 | FAST_DATA_ACCESS_MMU_MISS_HANDLER 0 |
289 | 289 | ||
290 | /* TT = 0x6c, TL = 0, fast_data_access_protection */ |
290 | /* TT = 0x6c, TL = 0, fast_data_access_protection */ |
291 | .org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE |
291 | .org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE |
292 | .global fast_data_access_protection_handler_tl0 |
292 | .global fast_data_access_protection_handler_tl0 |
293 | fast_data_access_protection_handler_tl0: |
293 | fast_data_access_protection_handler_tl0: |
294 | FAST_DATA_ACCESS_PROTECTION_HANDLER 0 |
294 | FAST_DATA_ACCESS_PROTECTION_HANDLER 0 |
295 | 295 | ||
296 | /* TT = 0x80, TL = 0, spill_0_normal handler */ |
296 | /* TT = 0x80, TL = 0, spill_0_normal handler */ |
297 | .org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE |
297 | .org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE |
298 | .global spill_0_normal_tl0 |
298 | .global spill_0_normal_tl0 |
299 | spill_0_normal_tl0: |
299 | spill_0_normal_tl0: |
300 | SPILL_NORMAL_HANDLER_KERNEL |
300 | SPILL_NORMAL_HANDLER_KERNEL |
301 | 301 | ||
302 | /* TT = 0x84, TL = 0, spill_1_normal handler */ |
302 | /* TT = 0x84, TL = 0, spill_1_normal handler */ |
303 | .org trap_table + TT_SPILL_1_NORMAL*ENTRY_SIZE |
303 | .org trap_table + TT_SPILL_1_NORMAL*ENTRY_SIZE |
304 | .global spill_1_normal_tl0 |
304 | .global spill_1_normal_tl0 |
305 | spill_1_normal_tl0: |
305 | spill_1_normal_tl0: |
306 | SPILL_NORMAL_HANDLER_USERSPACE |
306 | SPILL_NORMAL_HANDLER_USERSPACE |
307 | 307 | ||
308 | /* TT = 0x88, TL = 0, spill_2_normal handler */ |
308 | /* TT = 0x88, TL = 0, spill_2_normal handler */ |
309 | .org trap_table + TT_SPILL_2_NORMAL*ENTRY_SIZE |
309 | .org trap_table + TT_SPILL_2_NORMAL*ENTRY_SIZE |
310 | .global spill_2_normal_tl0 |
310 | .global spill_2_normal_tl0 |
311 | spill_2_normal_tl0: |
311 | spill_2_normal_tl0: |
312 | SPILL_TO_USPACE_WINDOW_BUFFER |
312 | SPILL_TO_USPACE_WINDOW_BUFFER |
313 | 313 | ||
314 | /* TT = 0xa0, TL = 0, spill_0_other handler */ |
314 | /* TT = 0xa0, TL = 0, spill_0_other handler */ |
315 | .org trap_table + TT_SPILL_0_OTHER*ENTRY_SIZE |
315 | .org trap_table + TT_SPILL_0_OTHER*ENTRY_SIZE |
316 | .global spill_0_other_tl0 |
316 | .global spill_0_other_tl0 |
317 | spill_0_other_tl0: |
317 | spill_0_other_tl0: |
318 | SPILL_TO_USPACE_WINDOW_BUFFER |
318 | SPILL_TO_USPACE_WINDOW_BUFFER |
319 | 319 | ||
320 | /* TT = 0xc0, TL = 0, fill_0_normal handler */ |
320 | /* TT = 0xc0, TL = 0, fill_0_normal handler */ |
321 | .org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE |
321 | .org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE |
322 | .global fill_0_normal_tl0 |
322 | .global fill_0_normal_tl0 |
323 | fill_0_normal_tl0: |
323 | fill_0_normal_tl0: |
324 | FILL_NORMAL_HANDLER_KERNEL |
324 | FILL_NORMAL_HANDLER_KERNEL |
325 | 325 | ||
326 | /* TT = 0xc4, TL = 0, fill_1_normal handler */ |
326 | /* TT = 0xc4, TL = 0, fill_1_normal handler */ |
327 | .org trap_table + TT_FILL_1_NORMAL*ENTRY_SIZE |
327 | .org trap_table + TT_FILL_1_NORMAL*ENTRY_SIZE |
328 | .global fill_1_normal_tl0 |
328 | .global fill_1_normal_tl0 |
329 | fill_1_normal_tl0: |
329 | fill_1_normal_tl0: |
330 | FILL_NORMAL_HANDLER_USERSPACE |
330 | FILL_NORMAL_HANDLER_USERSPACE |
331 | 331 | ||
332 | /* TT = 0x100, TL = 0, trap_instruction_0 */ |
332 | /* TT = 0x100, TL = 0, trap_instruction_0 */ |
333 | .org trap_table + TT_TRAP_INSTRUCTION(0)*ENTRY_SIZE |
333 | .org trap_table + TT_TRAP_INSTRUCTION(0)*ENTRY_SIZE |
334 | .global trap_instruction_0_tl0 |
334 | .global trap_instruction_0_tl0 |
335 | trap_instruction_0_tl0: |
335 | trap_instruction_0_tl0: |
336 | TRAP_INSTRUCTION 0 |
336 | TRAP_INSTRUCTION 0 |
337 | 337 | ||
338 | /* TT = 0x101, TL = 0, trap_instruction_1 */ |
338 | /* TT = 0x101, TL = 0, trap_instruction_1 */ |
339 | .org trap_table + TT_TRAP_INSTRUCTION(1)*ENTRY_SIZE |
339 | .org trap_table + TT_TRAP_INSTRUCTION(1)*ENTRY_SIZE |
340 | .global trap_instruction_1_tl0 |
340 | .global trap_instruction_1_tl0 |
341 | trap_instruction_1_tl0: |
341 | trap_instruction_1_tl0: |
342 | TRAP_INSTRUCTION 1 |
342 | TRAP_INSTRUCTION 1 |
343 | 343 | ||
344 | /* TT = 0x102, TL = 0, trap_instruction_2 */ |
344 | /* TT = 0x102, TL = 0, trap_instruction_2 */ |
345 | .org trap_table + TT_TRAP_INSTRUCTION(2)*ENTRY_SIZE |
345 | .org trap_table + TT_TRAP_INSTRUCTION(2)*ENTRY_SIZE |
346 | .global trap_instruction_2_tl0 |
346 | .global trap_instruction_2_tl0 |
347 | trap_instruction_2_tl0: |
347 | trap_instruction_2_tl0: |
348 | TRAP_INSTRUCTION 2 |
348 | TRAP_INSTRUCTION 2 |
349 | 349 | ||
350 | /* TT = 0x103, TL = 0, trap_instruction_3 */ |
350 | /* TT = 0x103, TL = 0, trap_instruction_3 */ |
351 | .org trap_table + TT_TRAP_INSTRUCTION(3)*ENTRY_SIZE |
351 | .org trap_table + TT_TRAP_INSTRUCTION(3)*ENTRY_SIZE |
352 | .global trap_instruction_3_tl0 |
352 | .global trap_instruction_3_tl0 |
353 | trap_instruction_3_tl0: |
353 | trap_instruction_3_tl0: |
354 | TRAP_INSTRUCTION 3 |
354 | TRAP_INSTRUCTION 3 |
355 | 355 | ||
356 | /* TT = 0x104, TL = 0, trap_instruction_4 */ |
356 | /* TT = 0x104, TL = 0, trap_instruction_4 */ |
357 | .org trap_table + TT_TRAP_INSTRUCTION(4)*ENTRY_SIZE |
357 | .org trap_table + TT_TRAP_INSTRUCTION(4)*ENTRY_SIZE |
358 | .global trap_instruction_4_tl0 |
358 | .global trap_instruction_4_tl0 |
359 | trap_instruction_4_tl0: |
359 | trap_instruction_4_tl0: |
360 | TRAP_INSTRUCTION 4 |
360 | TRAP_INSTRUCTION 4 |
361 | 361 | ||
362 | /* TT = 0x105, TL = 0, trap_instruction_5 */ |
362 | /* TT = 0x105, TL = 0, trap_instruction_5 */ |
363 | .org trap_table + TT_TRAP_INSTRUCTION(5)*ENTRY_SIZE |
363 | .org trap_table + TT_TRAP_INSTRUCTION(5)*ENTRY_SIZE |
364 | .global trap_instruction_5_tl0 |
364 | .global trap_instruction_5_tl0 |
365 | trap_instruction_5_tl0: |
365 | trap_instruction_5_tl0: |
366 | TRAP_INSTRUCTION 5 |
366 | TRAP_INSTRUCTION 5 |
367 | 367 | ||
368 | /* TT = 0x106, TL = 0, trap_instruction_6 */ |
368 | /* TT = 0x106, TL = 0, trap_instruction_6 */ |
369 | .org trap_table + TT_TRAP_INSTRUCTION(6)*ENTRY_SIZE |
369 | .org trap_table + TT_TRAP_INSTRUCTION(6)*ENTRY_SIZE |
370 | .global trap_instruction_6_tl0 |
370 | .global trap_instruction_6_tl0 |
371 | trap_instruction_6_tl0: |
371 | trap_instruction_6_tl0: |
372 | TRAP_INSTRUCTION 6 |
372 | TRAP_INSTRUCTION 6 |
373 | 373 | ||
374 | /* TT = 0x107, TL = 0, trap_instruction_7 */ |
374 | /* TT = 0x107, TL = 0, trap_instruction_7 */ |
375 | .org trap_table + TT_TRAP_INSTRUCTION(7)*ENTRY_SIZE |
375 | .org trap_table + TT_TRAP_INSTRUCTION(7)*ENTRY_SIZE |
376 | .global trap_instruction_7_tl0 |
376 | .global trap_instruction_7_tl0 |
377 | trap_instruction_7_tl0: |
377 | trap_instruction_7_tl0: |
378 | TRAP_INSTRUCTION 7 |
378 | TRAP_INSTRUCTION 7 |
379 | 379 | ||
380 | /* TT = 0x108, TL = 0, trap_instruction_8 */ |
380 | /* TT = 0x108, TL = 0, trap_instruction_8 */ |
381 | .org trap_table + TT_TRAP_INSTRUCTION(8)*ENTRY_SIZE |
381 | .org trap_table + TT_TRAP_INSTRUCTION(8)*ENTRY_SIZE |
382 | .global trap_instruction_8_tl0 |
382 | .global trap_instruction_8_tl0 |
383 | trap_instruction_8_tl0: |
383 | trap_instruction_8_tl0: |
384 | TRAP_INSTRUCTION 8 |
384 | TRAP_INSTRUCTION 8 |
385 | 385 | ||
386 | /* TT = 0x109, TL = 0, trap_instruction_9 */ |
386 | /* TT = 0x109, TL = 0, trap_instruction_9 */ |
387 | .org trap_table + TT_TRAP_INSTRUCTION(9)*ENTRY_SIZE |
387 | .org trap_table + TT_TRAP_INSTRUCTION(9)*ENTRY_SIZE |
388 | .global trap_instruction_9_tl0 |
388 | .global trap_instruction_9_tl0 |
389 | trap_instruction_9_tl0: |
389 | trap_instruction_9_tl0: |
390 | TRAP_INSTRUCTION 9 |
390 | TRAP_INSTRUCTION 9 |
391 | 391 | ||
392 | /* TT = 0x10a, TL = 0, trap_instruction_10 */ |
392 | /* TT = 0x10a, TL = 0, trap_instruction_10 */ |
393 | .org trap_table + TT_TRAP_INSTRUCTION(10)*ENTRY_SIZE |
393 | .org trap_table + TT_TRAP_INSTRUCTION(10)*ENTRY_SIZE |
394 | .global trap_instruction_10_tl0 |
394 | .global trap_instruction_10_tl0 |
395 | trap_instruction_10_tl0: |
395 | trap_instruction_10_tl0: |
396 | TRAP_INSTRUCTION 10 |
396 | TRAP_INSTRUCTION 10 |
397 | 397 | ||
398 | /* TT = 0x10b, TL = 0, trap_instruction_11 */ |
398 | /* TT = 0x10b, TL = 0, trap_instruction_11 */ |
399 | .org trap_table + TT_TRAP_INSTRUCTION(11)*ENTRY_SIZE |
399 | .org trap_table + TT_TRAP_INSTRUCTION(11)*ENTRY_SIZE |
400 | .global trap_instruction_11_tl0 |
400 | .global trap_instruction_11_tl0 |
401 | trap_instruction_11_tl0: |
401 | trap_instruction_11_tl0: |
402 | TRAP_INSTRUCTION 11 |
402 | TRAP_INSTRUCTION 11 |
403 | 403 | ||
404 | /* TT = 0x10c, TL = 0, trap_instruction_12 */ |
404 | /* TT = 0x10c, TL = 0, trap_instruction_12 */ |
405 | .org trap_table + TT_TRAP_INSTRUCTION(12)*ENTRY_SIZE |
405 | .org trap_table + TT_TRAP_INSTRUCTION(12)*ENTRY_SIZE |
406 | .global trap_instruction_12_tl0 |
406 | .global trap_instruction_12_tl0 |
407 | trap_instruction_12_tl0: |
407 | trap_instruction_12_tl0: |
408 | TRAP_INSTRUCTION 12 |
408 | TRAP_INSTRUCTION 12 |
409 | 409 | ||
410 | /* TT = 0x10d, TL = 0, trap_instruction_13 */ |
410 | /* TT = 0x10d, TL = 0, trap_instruction_13 */ |
411 | .org trap_table + TT_TRAP_INSTRUCTION(13)*ENTRY_SIZE |
411 | .org trap_table + TT_TRAP_INSTRUCTION(13)*ENTRY_SIZE |
412 | .global trap_instruction_13_tl0 |
412 | .global trap_instruction_13_tl0 |
413 | trap_instruction_13_tl0: |
413 | trap_instruction_13_tl0: |
414 | TRAP_INSTRUCTION 13 |
414 | TRAP_INSTRUCTION 13 |
415 | 415 | ||
416 | /* TT = 0x10e, TL = 0, trap_instruction_14 */ |
416 | /* TT = 0x10e, TL = 0, trap_instruction_14 */ |
417 | .org trap_table + TT_TRAP_INSTRUCTION(14)*ENTRY_SIZE |
417 | .org trap_table + TT_TRAP_INSTRUCTION(14)*ENTRY_SIZE |
418 | .global trap_instruction_14_tl0 |
418 | .global trap_instruction_14_tl0 |
419 | trap_instruction_14_tl0: |
419 | trap_instruction_14_tl0: |
420 | TRAP_INSTRUCTION 14 |
420 | TRAP_INSTRUCTION 14 |
421 | 421 | ||
422 | /* TT = 0x10f, TL = 0, trap_instruction_15 */ |
422 | /* TT = 0x10f, TL = 0, trap_instruction_15 */ |
423 | .org trap_table + TT_TRAP_INSTRUCTION(15)*ENTRY_SIZE |
423 | .org trap_table + TT_TRAP_INSTRUCTION(15)*ENTRY_SIZE |
424 | .global trap_instruction_15_tl0 |
424 | .global trap_instruction_15_tl0 |
425 | trap_instruction_15_tl0: |
425 | trap_instruction_15_tl0: |
426 | TRAP_INSTRUCTION 15 |
426 | TRAP_INSTRUCTION 15 |
427 | 427 | ||
428 | /* TT = 0x110, TL = 0, trap_instruction_16 */ |
428 | /* TT = 0x110, TL = 0, trap_instruction_16 */ |
429 | .org trap_table + TT_TRAP_INSTRUCTION(16)*ENTRY_SIZE |
429 | .org trap_table + TT_TRAP_INSTRUCTION(16)*ENTRY_SIZE |
430 | .global trap_instruction_16_tl0 |
430 | .global trap_instruction_16_tl0 |
431 | trap_instruction_16_tl0: |
431 | trap_instruction_16_tl0: |
432 | TRAP_INSTRUCTION 16 |
432 | TRAP_INSTRUCTION 16 |
433 | 433 | ||
434 | /* TT = 0x111, TL = 0, trap_instruction_17 */ |
434 | /* TT = 0x111, TL = 0, trap_instruction_17 */ |
435 | .org trap_table + TT_TRAP_INSTRUCTION(17)*ENTRY_SIZE |
435 | .org trap_table + TT_TRAP_INSTRUCTION(17)*ENTRY_SIZE |
436 | .global trap_instruction_17_tl0 |
436 | .global trap_instruction_17_tl0 |
437 | trap_instruction_17_tl0: |
437 | trap_instruction_17_tl0: |
438 | TRAP_INSTRUCTION 17 |
438 | TRAP_INSTRUCTION 17 |
439 | 439 | ||
440 | /* TT = 0x112, TL = 0, trap_instruction_18 */ |
440 | /* TT = 0x112, TL = 0, trap_instruction_18 */ |
441 | .org trap_table + TT_TRAP_INSTRUCTION(18)*ENTRY_SIZE |
441 | .org trap_table + TT_TRAP_INSTRUCTION(18)*ENTRY_SIZE |
442 | .global trap_instruction_18_tl0 |
442 | .global trap_instruction_18_tl0 |
443 | trap_instruction_18_tl0: |
443 | trap_instruction_18_tl0: |
444 | TRAP_INSTRUCTION 18 |
444 | TRAP_INSTRUCTION 18 |
445 | 445 | ||
446 | /* TT = 0x113, TL = 0, trap_instruction_19 */ |
446 | /* TT = 0x113, TL = 0, trap_instruction_19 */ |
447 | .org trap_table + TT_TRAP_INSTRUCTION(19)*ENTRY_SIZE |
447 | .org trap_table + TT_TRAP_INSTRUCTION(19)*ENTRY_SIZE |
448 | .global trap_instruction_19_tl0 |
448 | .global trap_instruction_19_tl0 |
449 | trap_instruction_19_tl0: |
449 | trap_instruction_19_tl0: |
450 | TRAP_INSTRUCTION 19 |
450 | TRAP_INSTRUCTION 19 |
451 | 451 | ||
452 | /* TT = 0x114, TL = 0, trap_instruction_20 */ |
452 | /* TT = 0x114, TL = 0, trap_instruction_20 */ |
453 | .org trap_table + TT_TRAP_INSTRUCTION(20)*ENTRY_SIZE |
453 | .org trap_table + TT_TRAP_INSTRUCTION(20)*ENTRY_SIZE |
454 | .global trap_instruction_20_tl0 |
454 | .global trap_instruction_20_tl0 |
455 | trap_instruction_20_tl0: |
455 | trap_instruction_20_tl0: |
456 | TRAP_INSTRUCTION 20 |
456 | TRAP_INSTRUCTION 20 |
457 | 457 | ||
458 | /* TT = 0x115, TL = 0, trap_instruction_21 */ |
458 | /* TT = 0x115, TL = 0, trap_instruction_21 */ |
459 | .org trap_table + TT_TRAP_INSTRUCTION(21)*ENTRY_SIZE |
459 | .org trap_table + TT_TRAP_INSTRUCTION(21)*ENTRY_SIZE |
460 | .global trap_instruction_21_tl0 |
460 | .global trap_instruction_21_tl0 |
461 | trap_instruction_21_tl0: |
461 | trap_instruction_21_tl0: |
462 | TRAP_INSTRUCTION 21 |
462 | TRAP_INSTRUCTION 21 |
463 | 463 | ||
464 | /* TT = 0x116, TL = 0, trap_instruction_22 */ |
464 | /* TT = 0x116, TL = 0, trap_instruction_22 */ |
465 | .org trap_table + TT_TRAP_INSTRUCTION(22)*ENTRY_SIZE |
465 | .org trap_table + TT_TRAP_INSTRUCTION(22)*ENTRY_SIZE |
466 | .global trap_instruction_22_tl0 |
466 | .global trap_instruction_22_tl0 |
467 | trap_instruction_22_tl0: |
467 | trap_instruction_22_tl0: |
468 | TRAP_INSTRUCTION 22 |
468 | TRAP_INSTRUCTION 22 |
469 | 469 | ||
470 | /* TT = 0x117, TL = 0, trap_instruction_23 */ |
470 | /* TT = 0x117, TL = 0, trap_instruction_23 */ |
471 | .org trap_table + TT_TRAP_INSTRUCTION(23)*ENTRY_SIZE |
471 | .org trap_table + TT_TRAP_INSTRUCTION(23)*ENTRY_SIZE |
472 | .global trap_instruction_23_tl0 |
472 | .global trap_instruction_23_tl0 |
473 | trap_instruction_23_tl0: |
473 | trap_instruction_23_tl0: |
474 | TRAP_INSTRUCTION 23 |
474 | TRAP_INSTRUCTION 23 |
475 | 475 | ||
476 | /* TT = 0x118, TL = 0, trap_instruction_24 */ |
476 | /* TT = 0x118, TL = 0, trap_instruction_24 */ |
477 | .org trap_table + TT_TRAP_INSTRUCTION(24)*ENTRY_SIZE |
477 | .org trap_table + TT_TRAP_INSTRUCTION(24)*ENTRY_SIZE |
478 | .global trap_instruction_24_tl0 |
478 | .global trap_instruction_24_tl0 |
479 | trap_instruction_24_tl0: |
479 | trap_instruction_24_tl0: |
480 | TRAP_INSTRUCTION 24 |
480 | TRAP_INSTRUCTION 24 |
481 | 481 | ||
482 | /* TT = 0x119, TL = 0, trap_instruction_25 */ |
482 | /* TT = 0x119, TL = 0, trap_instruction_25 */ |
483 | .org trap_table + TT_TRAP_INSTRUCTION(25)*ENTRY_SIZE |
483 | .org trap_table + TT_TRAP_INSTRUCTION(25)*ENTRY_SIZE |
484 | .global trap_instruction_25_tl0 |
484 | .global trap_instruction_25_tl0 |
485 | trap_instruction_25_tl0: |
485 | trap_instruction_25_tl0: |
486 | TRAP_INSTRUCTION 25 |
486 | TRAP_INSTRUCTION 25 |
487 | 487 | ||
488 | /* TT = 0x11a, TL = 0, trap_instruction_26 */ |
488 | /* TT = 0x11a, TL = 0, trap_instruction_26 */ |
489 | .org trap_table + TT_TRAP_INSTRUCTION(26)*ENTRY_SIZE |
489 | .org trap_table + TT_TRAP_INSTRUCTION(26)*ENTRY_SIZE |
490 | .global trap_instruction_26_tl0 |
490 | .global trap_instruction_26_tl0 |
491 | trap_instruction_26_tl0: |
491 | trap_instruction_26_tl0: |
492 | TRAP_INSTRUCTION 26 |
492 | TRAP_INSTRUCTION 26 |
493 | 493 | ||
494 | /* TT = 0x11b, TL = 0, trap_instruction_27 */ |
494 | /* TT = 0x11b, TL = 0, trap_instruction_27 */ |
495 | .org trap_table + TT_TRAP_INSTRUCTION(27)*ENTRY_SIZE |
495 | .org trap_table + TT_TRAP_INSTRUCTION(27)*ENTRY_SIZE |
496 | .global trap_instruction_27_tl0 |
496 | .global trap_instruction_27_tl0 |
497 | trap_instruction_27_tl0: |
497 | trap_instruction_27_tl0: |
498 | TRAP_INSTRUCTION 27 |
498 | TRAP_INSTRUCTION 27 |
499 | 499 | ||
500 | /* TT = 0x11c, TL = 0, trap_instruction_28 */ |
500 | /* TT = 0x11c, TL = 0, trap_instruction_28 */ |
501 | .org trap_table + TT_TRAP_INSTRUCTION(28)*ENTRY_SIZE |
501 | .org trap_table + TT_TRAP_INSTRUCTION(28)*ENTRY_SIZE |
502 | .global trap_instruction_28_tl0 |
502 | .global trap_instruction_28_tl0 |
503 | trap_instruction_28_tl0: |
503 | trap_instruction_28_tl0: |
504 | TRAP_INSTRUCTION 28 |
504 | TRAP_INSTRUCTION 28 |
505 | 505 | ||
506 | /* TT = 0x11d, TL = 0, trap_instruction_29 */ |
506 | /* TT = 0x11d, TL = 0, trap_instruction_29 */ |
507 | .org trap_table + TT_TRAP_INSTRUCTION(29)*ENTRY_SIZE |
507 | .org trap_table + TT_TRAP_INSTRUCTION(29)*ENTRY_SIZE |
508 | .global trap_instruction_29_tl0 |
508 | .global trap_instruction_29_tl0 |
509 | trap_instruction_29_tl0: |
509 | trap_instruction_29_tl0: |
510 | TRAP_INSTRUCTION 29 |
510 | TRAP_INSTRUCTION 29 |
511 | 511 | ||
512 | /* TT = 0x11e, TL = 0, trap_instruction_30 */ |
512 | /* TT = 0x11e, TL = 0, trap_instruction_30 */ |
513 | .org trap_table + TT_TRAP_INSTRUCTION(30)*ENTRY_SIZE |
513 | .org trap_table + TT_TRAP_INSTRUCTION(30)*ENTRY_SIZE |
514 | .global trap_instruction_30_tl0 |
514 | .global trap_instruction_30_tl0 |
515 | trap_instruction_30_tl0: |
515 | trap_instruction_30_tl0: |
516 | TRAP_INSTRUCTION 30 |
516 | TRAP_INSTRUCTION 30 |
517 | 517 | ||
518 | /* TT = 0x11f, TL = 0, trap_instruction_31 */ |
518 | /* TT = 0x11f, TL = 0, trap_instruction_31 */ |
519 | .org trap_table + TT_TRAP_INSTRUCTION(31)*ENTRY_SIZE |
519 | .org trap_table + TT_TRAP_INSTRUCTION(31)*ENTRY_SIZE |
520 | .global trap_instruction_31_tl0 |
520 | .global trap_instruction_31_tl0 |
521 | trap_instruction_31_tl0: |
521 | trap_instruction_31_tl0: |
522 | TRAP_INSTRUCTION 31 |
522 | TRAP_INSTRUCTION 31 |
523 | 523 | ||
524 | /* |
524 | /* |
525 | * Handlers for TL>0. |
525 | * Handlers for TL>0. |
526 | */ |
526 | */ |
527 | 527 | ||
528 | /* TT = 0x08, TL > 0, instruction_access_exception */ |
528 | /* TT = 0x08, TL > 0, instruction_access_exception */ |
529 | .org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE |
529 | .org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE |
530 | .global instruction_access_exception_tl1 |
530 | .global instruction_access_exception_tl1 |
531 | instruction_access_exception_tl1: |
531 | instruction_access_exception_tl1: |
532 | wrpr %g0, 1, %tl |
532 | wrpr %g0, 1, %tl |
533 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
533 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
534 | PREEMPTIBLE_HANDLER instruction_access_exception |
534 | PREEMPTIBLE_HANDLER instruction_access_exception |
535 | 535 | ||
536 | /* TT = 0x0a, TL > 0, instruction_access_error */ |
536 | /* TT = 0x0a, TL > 0, instruction_access_error */ |
537 | .org trap_table + (TT_INSTRUCTION_ACCESS_ERROR+512)*ENTRY_SIZE |
537 | .org trap_table + (TT_INSTRUCTION_ACCESS_ERROR+512)*ENTRY_SIZE |
538 | .global instruction_access_error_tl1 |
538 | .global instruction_access_error_tl1 |
539 | instruction_access_error_tl1: |
539 | instruction_access_error_tl1: |
540 | wrpr %g0, 1, %tl |
540 | wrpr %g0, 1, %tl |
541 | PREEMPTIBLE_HANDLER instruction_access_error |
541 | PREEMPTIBLE_HANDLER instruction_access_error |
542 | 542 | ||
543 | /* TT = 0x10, TL > 0, illegal_instruction */ |
543 | /* TT = 0x10, TL > 0, illegal_instruction */ |
544 | .org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE |
544 | .org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE |
545 | .global illegal_instruction_tl1 |
545 | .global illegal_instruction_tl1 |
546 | illegal_instruction_tl1: |
546 | illegal_instruction_tl1: |
547 | wrpr %g0, 1, %tl |
547 | wrpr %g0, 1, %tl |
548 | PREEMPTIBLE_HANDLER illegal_instruction |
548 | PREEMPTIBLE_HANDLER illegal_instruction |
549 | 549 | ||
550 | /* TT = 0x24, TL > 0, clean_window handler */ |
550 | /* TT = 0x24, TL > 0, clean_window handler */ |
551 | .org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE |
551 | .org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE |
552 | .global clean_window_tl1 |
552 | .global clean_window_tl1 |
553 | clean_window_tl1: |
553 | clean_window_tl1: |
554 | CLEAN_WINDOW_HANDLER |
554 | CLEAN_WINDOW_HANDLER |
555 | 555 | ||
556 | /* TT = 0x28, TL > 0, division_by_zero */ |
556 | /* TT = 0x28, TL > 0, division_by_zero */ |
557 | .org trap_table + (TT_DIVISION_BY_ZERO+512)*ENTRY_SIZE |
557 | .org trap_table + (TT_DIVISION_BY_ZERO+512)*ENTRY_SIZE |
558 | .global division_by_zero_tl1 |
558 | .global division_by_zero_tl1 |
559 | division_by_zero_tl1: |
559 | division_by_zero_tl1: |
560 | wrpr %g0, 1, %tl |
560 | wrpr %g0, 1, %tl |
561 | PREEMPTIBLE_HANDLER division_by_zero |
561 | PREEMPTIBLE_HANDLER division_by_zero |
562 | 562 | ||
563 | /* TT = 0x30, TL > 0, data_access_exception */ |
563 | /* TT = 0x30, TL > 0, data_access_exception */ |
564 | .org trap_table + (TT_DATA_ACCESS_EXCEPTION+512)*ENTRY_SIZE |
564 | .org trap_table + (TT_DATA_ACCESS_EXCEPTION+512)*ENTRY_SIZE |
565 | .global data_access_exception_tl1 |
565 | .global data_access_exception_tl1 |
566 | data_access_exception_tl1: |
566 | data_access_exception_tl1: |
567 | wrpr %g0, 1, %tl |
567 | wrpr %g0, 1, %tl |
568 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
568 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
569 | PREEMPTIBLE_HANDLER data_access_exception |
569 | PREEMPTIBLE_HANDLER data_access_exception |
570 | 570 | ||
571 | /* TT = 0x32, TL > 0, data_access_error */ |
571 | /* TT = 0x32, TL > 0, data_access_error */ |
572 | .org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE |
572 | .org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE |
573 | .global data_access_error_tl1 |
573 | .global data_access_error_tl1 |
574 | data_access_error_tl1: |
574 | data_access_error_tl1: |
575 | wrpr %g0, 1, %tl |
575 | wrpr %g0, 1, %tl |
576 | PREEMPTIBLE_HANDLER data_access_error |
576 | PREEMPTIBLE_HANDLER data_access_error |
577 | 577 | ||
578 | /* TT = 0x34, TL > 0, mem_address_not_aligned */ |
578 | /* TT = 0x34, TL > 0, mem_address_not_aligned */ |
579 | .org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE |
579 | .org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE |
580 | .global mem_address_not_aligned_tl1 |
580 | .global mem_address_not_aligned_tl1 |
581 | mem_address_not_aligned_tl1: |
581 | mem_address_not_aligned_tl1: |
582 | wrpr %g0, 1, %tl |
582 | wrpr %g0, 1, %tl |
583 | PREEMPTIBLE_HANDLER mem_address_not_aligned |
583 | PREEMPTIBLE_HANDLER mem_address_not_aligned |
584 | 584 | ||
585 | /* TT = 0x68, TL > 0, fast_data_access_MMU_miss */ |
585 | /* TT = 0x68, TL > 0, fast_data_access_MMU_miss */ |
586 | .org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE |
586 | .org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE |
587 | .global fast_data_access_mmu_miss_handler_tl1 |
587 | .global fast_data_access_mmu_miss_handler_tl1 |
588 | fast_data_access_mmu_miss_handler_tl1: |
588 | fast_data_access_mmu_miss_handler_tl1: |
589 | FAST_DATA_ACCESS_MMU_MISS_HANDLER 1 |
589 | FAST_DATA_ACCESS_MMU_MISS_HANDLER 1 |
590 | 590 | ||
591 | /* TT = 0x6c, TL > 0, fast_data_access_protection */ |
591 | /* TT = 0x6c, TL > 0, fast_data_access_protection */ |
592 | .org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE |
592 | .org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE |
593 | .global fast_data_access_protection_handler_tl1 |
593 | .global fast_data_access_protection_handler_tl1 |
594 | fast_data_access_protection_handler_tl1: |
594 | fast_data_access_protection_handler_tl1: |
595 | FAST_DATA_ACCESS_PROTECTION_HANDLER 1 |
595 | FAST_DATA_ACCESS_PROTECTION_HANDLER 1 |
596 | 596 | ||
597 | /* TT = 0x80, TL > 0, spill_0_normal handler */ |
597 | /* TT = 0x80, TL > 0, spill_0_normal handler */ |
598 | .org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE |
598 | .org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE |
599 | .global spill_0_normal_tl1 |
599 | .global spill_0_normal_tl1 |
600 | spill_0_normal_tl1: |
600 | spill_0_normal_tl1: |
601 | SPILL_NORMAL_HANDLER_KERNEL |
601 | SPILL_NORMAL_HANDLER_KERNEL |
602 | 602 | ||
603 | /* TT = 0x88, TL > 0, spill_2_normal handler */ |
603 | /* TT = 0x88, TL > 0, spill_2_normal handler */ |
604 | .org trap_table + (TT_SPILL_2_NORMAL+512)*ENTRY_SIZE |
604 | .org trap_table + (TT_SPILL_2_NORMAL+512)*ENTRY_SIZE |
605 | .global spill_2_normal_tl1 |
605 | .global spill_2_normal_tl1 |
606 | spill_2_normal_tl1: |
606 | spill_2_normal_tl1: |
607 | SPILL_TO_USPACE_WINDOW_BUFFER |
607 | SPILL_TO_USPACE_WINDOW_BUFFER |
608 | 608 | ||
609 | /* TT = 0xa0, TL > 0, spill_0_other handler */ |
609 | /* TT = 0xa0, TL > 0, spill_0_other handler */ |
610 | .org trap_table + (TT_SPILL_0_OTHER+512)*ENTRY_SIZE |
610 | .org trap_table + (TT_SPILL_0_OTHER+512)*ENTRY_SIZE |
611 | .global spill_0_other_tl1 |
611 | .global spill_0_other_tl1 |
612 | spill_0_other_tl1: |
612 | spill_0_other_tl1: |
613 | SPILL_TO_USPACE_WINDOW_BUFFER |
613 | SPILL_TO_USPACE_WINDOW_BUFFER |
614 | 614 | ||
615 | /* TT = 0xc0, TL > 0, fill_0_normal handler */ |
615 | /* TT = 0xc0, TL > 0, fill_0_normal handler */ |
616 | .org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE |
616 | .org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE |
617 | .global fill_0_normal_tl1 |
617 | .global fill_0_normal_tl1 |
618 | fill_0_normal_tl1: |
618 | fill_0_normal_tl1: |
619 | FILL_NORMAL_HANDLER_KERNEL |
619 | FILL_NORMAL_HANDLER_KERNEL |
620 | 620 | ||
621 | .align TABLE_SIZE |
621 | .align TABLE_SIZE |
622 | 622 | ||
623 | 623 | ||
624 | #define NOT(x) ((x) == 0) |
624 | #define NOT(x) ((x) == 0) |
625 | 625 | ||
626 | /* Preemptible trap handler for TL=1. |
626 | /* Preemptible trap handler for TL=1. |
627 | * |
627 | * |
628 | * This trap handler makes arrangements to make calling of scheduler() from |
628 | * This trap handler makes arrangements to make calling of scheduler() from |
629 | * within a trap context possible. It is called from several other trap |
629 | * within a trap context possible. It is called from several other trap |
630 | * handlers. |
630 | * handlers. |
631 | * |
631 | * |
632 | * This function can be entered either with interrupt globals or alternate |
632 | * This function can be entered either with interrupt globals or alternate |
633 | * globals. Memory management trap handlers are obliged to switch to one of |
633 | * globals. Memory management trap handlers are obliged to switch to one of |
634 | * those global sets prior to calling this function. Register window management |
634 | * those global sets prior to calling this function. Register window management |
635 | * functions are not allowed to modify the alternate global registers. |
635 | * functions are not allowed to modify the alternate global registers. |
636 | * |
636 | * |
637 | * The kernel is designed to work on trap levels 0 - 4. For instance, the |
637 | * The kernel is designed to work on trap levels 0 - 4. For instance, the |
638 | * following can happen: |
638 | * following can happen: |
639 | * TL0: kernel thread runs (CANSAVE=0, kernel stack not in DTLB) |
639 | * TL0: kernel thread runs (CANSAVE=0, kernel stack not in DTLB) |
640 | * TL1: preemptible trap handler started after a tick interrupt |
640 | * TL1: preemptible trap handler started after a tick interrupt |
641 | * TL2: preemptible trap handler did SAVE |
641 | * TL2: preemptible trap handler did SAVE |
642 | * TL3: spill handler touched the kernel stack |
642 | * TL3: spill handler touched the kernel stack |
643 | * TL4: hardware or software failure |
643 | * TL4: hardware or software failure |
644 | * |
644 | * |
645 | * Input registers: |
645 | * Input registers: |
646 | * %g1 Address of function to call. |
646 | * %g1 Address of function to call if this is not a syscall. |
647 | * %g2 First argument for the function. |
647 | * %g2 First argument for the function. |
648 | * %g6 Pre-set as kernel stack base if trap from userspace. |
648 | * %g6 Pre-set as kernel stack base if trap from userspace. |
649 | * %g7 Pre-set as address of the userspace window buffer. |
649 | * %g7 Pre-set as address of the userspace window buffer. |
650 | */ |
650 | */ |
651 | .macro PREEMPTIBLE_HANDLER_TEMPLATE is_syscall |
651 | .macro PREEMPTIBLE_HANDLER_TEMPLATE is_syscall |
652 | /* |
652 | /* |
653 | * ASSERT(%tl == 1) |
653 | * ASSERT(%tl == 1) |
654 | */ |
654 | */ |
655 | rdpr %tl, %g3 |
655 | rdpr %tl, %g3 |
656 | cmp %g3, 1 |
656 | cmp %g3, 1 |
657 | be 1f |
657 | be 1f |
658 | nop |
658 | nop |
659 | 0: ba 0b ! this is for debugging, if we ever get here |
659 | 0: ba 0b ! this is for debugging, if we ever get here |
660 | nop ! it will be easy to find |
660 | nop ! it will be easy to find |
661 | 661 | ||
662 | 1: |
662 | 1: |
663 | .if NOT(\is_syscall) |
663 | .if NOT(\is_syscall) |
664 | rdpr %tstate, %g3 |
664 | rdpr %tstate, %g3 |
665 | 665 | ||
666 | /* |
666 | /* |
667 | * One of the ways this handler can be invoked is after a nested MMU trap from |
667 | * One of the ways this handler can be invoked is after a nested MMU trap from |
668 | * either spill_1_normal or fill_1_normal traps. Both of these traps manipulate |
668 | * either spill_1_normal or fill_1_normal traps. Both of these traps manipulate |
669 | * the CWP register. We deal with the situation by simulating the MMU trap |
669 | * the CWP register. We deal with the situation by simulating the MMU trap |
670 | * on TL=1 and restart the respective SAVE or RESTORE instruction once the MMU |
670 | * on TL=1 and restart the respective SAVE or RESTORE instruction once the MMU |
671 | * trap is resolved. However, because we are in the wrong window from the |
671 | * trap is resolved. However, because we are in the wrong window from the |
672 | * perspective of the MMU trap, we need to synchronize CWP with CWP from TL=0. |
672 | * perspective of the MMU trap, we need to synchronize CWP with CWP from TL=0. |
673 | */ |
673 | */ |
674 | and %g3, TSTATE_CWP_MASK, %g4 |
674 | and %g3, TSTATE_CWP_MASK, %g4 |
675 | wrpr %g4, 0, %cwp ! resynchronize CWP |
675 | wrpr %g4, 0, %cwp ! resynchronize CWP |
676 | 676 | ||
677 | andcc %g3, TSTATE_PRIV_BIT, %g0 ! if this trap came from the privileged mode... |
677 | andcc %g3, TSTATE_PRIV_BIT, %g0 ! if this trap came from the privileged mode... |
678 | bnz 0f ! ...skip setting of kernel stack and primary context |
678 | bnz 0f ! ...skip setting of kernel stack and primary context |
679 | nop |
679 | nop |
680 | 680 | ||
681 | .endif |
681 | .endif |
682 | /* |
682 | /* |
683 | * Normal window spills will go to the userspace window buffer. |
683 | * Normal window spills will go to the userspace window buffer. |
684 | */ |
684 | */ |
685 | wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(2), %wstate |
685 | wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(2), %wstate |
686 | 686 | ||
687 | wrpr %g0, NWINDOWS - 1, %cleanwin ! prevent unnecessary clean_window exceptions |
687 | wrpr %g0, NWINDOWS - 1, %cleanwin ! prevent unnecessary clean_window exceptions |
688 | 688 | ||
689 | /* |
689 | /* |
690 | * Switch to kernel stack. The old stack is |
690 | * Switch to kernel stack. The old stack is |
691 | * automatically saved in the old window's %sp |
691 | * automatically saved in the old window's %sp |
692 | * and the new window's %fp. |
692 | * and the new window's %fp. |
693 | */ |
693 | */ |
694 | save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp |
694 | save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp |
695 | 695 | ||
696 | .if \is_syscall |
696 | .if \is_syscall |
697 | /* |
697 | /* |
698 | * Copy arguments for the syscall to the new window. |
698 | * Copy arguments for the syscall to the new window. |
699 | */ |
699 | */ |
- | 700 | mov %i0, %o0 |
|
- | 701 | mov %i1, %o1 |
|
700 | mov %i0, %o2 |
702 | mov %i2, %o2 |
701 | mov %i1, %o3 |
703 | mov %i3, %o3 |
702 | mov %i2, %o4 |
704 | mov %i4, %o4 |
703 | mov %i3, %o5 |
705 | mov %i5, %o5 |
704 | .endif |
706 | .endif |
705 | 707 | ||
706 | /* |
708 | /* |
707 | * Mark the CANRESTORE windows as OTHER windows. |
709 | * Mark the CANRESTORE windows as OTHER windows. |
708 | */ |
710 | */ |
709 | rdpr %canrestore, %l0 |
711 | rdpr %canrestore, %l0 |
710 | wrpr %l0, %otherwin |
712 | wrpr %l0, %otherwin |
711 | wrpr %g0, %canrestore |
713 | wrpr %g0, %canrestore |
712 | 714 | ||
713 | /* |
715 | /* |
714 | * Switch to primary context 0. |
716 | * Switch to primary context 0. |
715 | */ |
717 | */ |
716 | mov VA_PRIMARY_CONTEXT_REG, %l0 |
718 | mov VA_PRIMARY_CONTEXT_REG, %l0 |
717 | stxa %g0, [%l0] ASI_DMMU |
719 | stxa %g0, [%l0] ASI_DMMU |
718 | rd %pc, %l0 |
720 | rd %pc, %l0 |
719 | flush %l0 |
721 | flush %l0 |
720 | 722 | ||
721 | .if NOT(\is_syscall) |
723 | .if NOT(\is_syscall) |
722 | ba 1f |
724 | ba 1f |
723 | nop |
725 | nop |
724 | 0: |
726 | 0: |
725 | save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp |
727 | save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp |
726 | 728 | ||
727 | /* |
729 | /* |
728 | * At this moment, we are using the kernel stack |
730 | * At this moment, we are using the kernel stack |
729 | * and have successfully allocated a register window. |
731 | * and have successfully allocated a register window. |
730 | */ |
732 | */ |
731 | 1: |
733 | 1: |
732 | .endif |
734 | .endif |
733 | /* |
735 | /* |
734 | * Other window spills will go to the userspace window buffer |
736 | * Other window spills will go to the userspace window buffer |
735 | * and normal spills will go to the kernel stack. |
737 | * and normal spills will go to the kernel stack. |
736 | */ |
738 | */ |
737 | wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(0), %wstate |
739 | wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(0), %wstate |
738 | 740 | ||
739 | /* |
741 | /* |
740 | * Copy arguments. |
742 | * Copy arguments. |
741 | */ |
743 | */ |
742 | mov %g1, %l0 |
744 | mov %g1, %l0 |
- | 745 | .if NOT(\is_syscall) |
|
743 | mov %g2, %o0 |
746 | mov %g2, %o0 |
- | 747 | .else |
|
- | 748 | ! store the syscall number on the stack as 7th argument |
|
- | 749 | stx %g2, [%sp + STACK_WINDOW_SAVE_AREA_SIZE + STACK_BIAS + STACK_ARG6] |
|
- | 750 | .endif |
|
744 | 751 | ||
745 | /* |
752 | /* |
746 | * Save TSTATE, TPC and TNPC aside. |
753 | * Save TSTATE, TPC and TNPC aside. |
747 | */ |
754 | */ |
748 | rdpr %tstate, %g1 |
755 | rdpr %tstate, %g1 |
749 | rdpr %tpc, %g2 |
756 | rdpr %tpc, %g2 |
750 | rdpr %tnpc, %g3 |
757 | rdpr %tnpc, %g3 |
751 | rd %y, %g4 |
758 | rd %y, %g4 |
752 | 759 | ||
753 | stx %g1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE] |
760 | stx %g1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE] |
754 | stx %g2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC] |
761 | stx %g2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC] |
755 | stx %g3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC] |
762 | stx %g3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC] |
756 | 763 | ||
757 | /* |
764 | /* |
758 | * Save the Y register. |
765 | * Save the Y register. |
759 | * This register is deprecated according to SPARC V9 specification |
766 | * This register is deprecated according to SPARC V9 specification |
760 | * and is only present for backward compatibility with previous |
767 | * and is only present for backward compatibility with previous |
761 | * versions of the SPARC architecture. |
768 | * versions of the SPARC architecture. |
762 | * Surprisingly, gcc makes use of this register without a notice. |
769 | * Surprisingly, gcc makes use of this register without a notice. |
763 | */ |
770 | */ |
764 | stx %g4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y] |
771 | stx %g4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y] |
765 | 772 | ||
766 | wrpr %g0, 0, %tl |
773 | wrpr %g0, 0, %tl |
767 | wrpr %g0, PSTATE_PRIV_BIT | PSTATE_PEF_BIT, %pstate |
774 | wrpr %g0, PSTATE_PRIV_BIT | PSTATE_PEF_BIT, %pstate |
768 | SAVE_GLOBALS |
775 | SAVE_GLOBALS |
769 | 776 | ||
- | 777 | .if NOT(\is_syscall) |
|
770 | /* |
778 | /* |
771 | * Call the higher-level handler and pass istate as second parameter. |
779 | * Call the higher-level handler and pass istate as second parameter. |
772 | */ |
780 | */ |
773 | call %l0 |
781 | call %l0 |
774 | add %sp, PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC, %o1 |
782 | add %sp, PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC, %o1 |
775 | - | ||
776 | .if \is_syscall |
783 | .else |
777 | /* |
784 | /* |
778 | * Copy the value returned by the syscall. |
785 | * Call the higher-level syscall handler. |
779 | */ |
786 | */ |
780 | mov %o0, %i0 |
787 | call syscall_handler |
- | 788 | nop |
|
- | 789 | mov %o0, %i0 ! copy the value returned by the syscall |
|
781 | .endif |
790 | .endif |
782 | 791 | ||
783 | RESTORE_GLOBALS |
792 | RESTORE_GLOBALS |
784 | rdpr %pstate, %l1 ! we must preserve the PEF bit |
793 | rdpr %pstate, %l1 ! we must preserve the PEF bit |
785 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
794 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
786 | wrpr %g0, 1, %tl |
795 | wrpr %g0, 1, %tl |
787 | 796 | ||
788 | /* |
797 | /* |
789 | * Read TSTATE, TPC and TNPC from saved copy. |
798 | * Read TSTATE, TPC and TNPC from saved copy. |
790 | */ |
799 | */ |
791 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1 |
800 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1 |
792 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2 |
801 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2 |
793 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3 |
802 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3 |
794 | 803 | ||
795 | /* |
804 | /* |
796 | * Copy PSTATE.PEF to the in-register copy of TSTATE. |
805 | * Copy PSTATE.PEF to the in-register copy of TSTATE. |
797 | */ |
806 | */ |
798 | and %l1, PSTATE_PEF_BIT, %l1 |
807 | and %l1, PSTATE_PEF_BIT, %l1 |
799 | sllx %l1, TSTATE_PSTATE_SHIFT, %l1 |
808 | sllx %l1, TSTATE_PSTATE_SHIFT, %l1 |
800 | sethi %hi(TSTATE_PEF_BIT), %g4 |
809 | sethi %hi(TSTATE_PEF_BIT), %g4 |
801 | andn %g1, %g4, %g1 |
810 | andn %g1, %g4, %g1 |
802 | or %g1, %l1, %g1 |
811 | or %g1, %l1, %g1 |
803 | 812 | ||
804 | /* |
813 | /* |
805 | * Restore TSTATE, TPC and TNPC from saved copies. |
814 | * Restore TSTATE, TPC and TNPC from saved copies. |
806 | */ |
815 | */ |
807 | wrpr %g1, 0, %tstate |
816 | wrpr %g1, 0, %tstate |
808 | wrpr %g2, 0, %tpc |
817 | wrpr %g2, 0, %tpc |
809 | wrpr %g3, 0, %tnpc |
818 | wrpr %g3, 0, %tnpc |
810 | 819 | ||
811 | /* |
820 | /* |
812 | * Restore Y. |
821 | * Restore Y. |
813 | */ |
822 | */ |
814 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y], %g4 |
823 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y], %g4 |
815 | wr %g4, %y |
824 | wr %g4, %y |
816 | 825 | ||
817 | /* |
826 | /* |
818 | * If OTHERWIN is zero, then all the userspace windows have been |
827 | * If OTHERWIN is zero, then all the userspace windows have been |
819 | * spilled to kernel memory (i.e. register window buffer). Moreover, |
828 | * spilled to kernel memory (i.e. register window buffer). Moreover, |
820 | * if the scheduler was called in the meantime, all valid windows |
829 | * if the scheduler was called in the meantime, all valid windows |
821 | * belonging to other threads were spilled by context_restore(). |
830 | * belonging to other threads were spilled by context_restore(). |
822 | * If OTHERWIN is non-zero, then some userspace windows are still |
831 | * If OTHERWIN is non-zero, then some userspace windows are still |
823 | * valid. Others might have been spilled. However, the CWP pointer |
832 | * valid. Others might have been spilled. However, the CWP pointer |
824 | * needs no fixing because the scheduler had not been called. |
833 | * needs no fixing because the scheduler had not been called. |
825 | */ |
834 | */ |
826 | rdpr %otherwin, %l0 |
835 | rdpr %otherwin, %l0 |
827 | brnz %l0, 0f |
836 | brnz %l0, 0f |
828 | nop |
837 | nop |
829 | 838 | ||
830 | /* |
839 | /* |
831 | * OTHERWIN == 0 |
840 | * OTHERWIN == 0 |
832 | */ |
841 | */ |
833 | 842 | ||
834 | /* |
843 | /* |
835 | * If TSTATE.CWP + 1 == CWP, then we still do not have to fix CWP. |
844 | * If TSTATE.CWP + 1 == CWP, then we still do not have to fix CWP. |
836 | */ |
845 | */ |
837 | and %g1, TSTATE_CWP_MASK, %l0 |
846 | and %g1, TSTATE_CWP_MASK, %l0 |
838 | inc %l0 |
847 | inc %l0 |
839 | and %l0, NWINDOWS - 1, %l0 ! %l0 mod NWINDOWS |
848 | and %l0, NWINDOWS - 1, %l0 ! %l0 mod NWINDOWS |
840 | rdpr %cwp, %l1 |
849 | rdpr %cwp, %l1 |
841 | cmp %l0, %l1 |
850 | cmp %l0, %l1 |
842 | bz 0f ! CWP is ok |
851 | bz 0f ! CWP is ok |
843 | nop |
852 | nop |
844 | 853 | ||
845 | /* |
854 | /* |
846 | * Fix CWP. |
855 | * Fix CWP. |
847 | * In order to recapitulate, the input registers in the current |
856 | * In order to recapitulate, the input registers in the current |
848 | * window are the output registers of the window to which we want |
857 | * window are the output registers of the window to which we want |
849 | * to restore. Because the fill trap fills only input and local |
858 | * to restore. Because the fill trap fills only input and local |
850 | * registers of a window, we need to preserve those output |
859 | * registers of a window, we need to preserve those output |
851 | * registers manually. |
860 | * registers manually. |
852 | */ |
861 | */ |
853 | mov %sp, %g2 |
862 | mov %sp, %g2 |
854 | stx %i0, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0] |
863 | stx %i0, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0] |
855 | stx %i1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1] |
864 | stx %i1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1] |
856 | stx %i2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2] |
865 | stx %i2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2] |
857 | stx %i3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3] |
866 | stx %i3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3] |
858 | stx %i4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4] |
867 | stx %i4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4] |
859 | stx %i5, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5] |
868 | stx %i5, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5] |
860 | stx %i6, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6] |
869 | stx %i6, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6] |
861 | stx %i7, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7] |
870 | stx %i7, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7] |
862 | wrpr %l0, 0, %cwp |
871 | wrpr %l0, 0, %cwp |
863 | mov %g2, %sp |
872 | mov %g2, %sp |
864 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0], %i0 |
873 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0], %i0 |
865 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1], %i1 |
874 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1], %i1 |
866 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2], %i2 |
875 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2], %i2 |
867 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3], %i3 |
876 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3], %i3 |
868 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4], %i4 |
877 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4], %i4 |
869 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5], %i5 |
878 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5], %i5 |
870 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6], %i6 |
879 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6], %i6 |
871 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7], %i7 |
880 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7], %i7 |
872 | 881 | ||
873 | /* |
882 | /* |
874 | * OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case. |
883 | * OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case. |
875 | * The CWP has already been restored to the value it had after the SAVE |
884 | * The CWP has already been restored to the value it had after the SAVE |
876 | * at the beginning of this function. |
885 | * at the beginning of this function. |
877 | */ |
886 | */ |
878 | 0: |
887 | 0: |
879 | .if NOT(\is_syscall) |
888 | .if NOT(\is_syscall) |
880 | rdpr %tstate, %g1 |
889 | rdpr %tstate, %g1 |
881 | andcc %g1, TSTATE_PRIV_BIT, %g0 ! if we are not returning to userspace..., |
890 | andcc %g1, TSTATE_PRIV_BIT, %g0 ! if we are not returning to userspace..., |
882 | bnz 1f ! ...skip restoring userspace windows |
891 | bnz 1f ! ...skip restoring userspace windows |
883 | nop |
892 | nop |
884 | .endif |
893 | .endif |
885 | 894 | ||
886 | /* |
895 | /* |
887 | * Spills and fills will be processed by the {spill,fill}_1_normal |
896 | * Spills and fills will be processed by the {spill,fill}_1_normal |
888 | * handlers. |
897 | * handlers. |
889 | */ |
898 | */ |
890 | wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(1), %wstate |
899 | wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(1), %wstate |
891 | 900 | ||
892 | /* |
901 | /* |
893 | * Set primary context according to secondary context. |
902 | * Set primary context according to secondary context. |
894 | */ |
903 | */ |
895 | wr %g0, ASI_DMMU, %asi |
904 | wr %g0, ASI_DMMU, %asi |
896 | ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1 |
905 | ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1 |
897 | stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi |
906 | stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi |
898 | rd %pc, %g1 |
907 | rd %pc, %g1 |
899 | flush %g1 |
908 | flush %g1 |
900 | 909 | ||
901 | rdpr %cwp, %g1 |
910 | rdpr %cwp, %g1 |
902 | rdpr %otherwin, %g2 |
911 | rdpr %otherwin, %g2 |
903 | 912 | ||
904 | /* |
913 | /* |
905 | * Skip all OTHERWIN windows and descend to the first window |
914 | * Skip all OTHERWIN windows and descend to the first window |
906 | * in the userspace window buffer. |
915 | * in the userspace window buffer. |
907 | */ |
916 | */ |
908 | sub %g1, %g2, %g3 |
917 | sub %g1, %g2, %g3 |
909 | dec %g3 |
918 | dec %g3 |
910 | and %g3, NWINDOWS - 1, %g3 |
919 | and %g3, NWINDOWS - 1, %g3 |
911 | wrpr %g3, 0, %cwp |
920 | wrpr %g3, 0, %cwp |
912 | 921 | ||
913 | /* |
922 | /* |
914 | * CWP is now in the window last saved in the userspace window buffer. |
923 | * CWP is now in the window last saved in the userspace window buffer. |
915 | * Fill all windows stored in the buffer. |
924 | * Fill all windows stored in the buffer. |
916 | */ |
925 | */ |
917 | clr %g4 |
926 | clr %g4 |
918 | set PAGE_SIZE - 1, %g5 |
927 | set PAGE_SIZE - 1, %g5 |
919 | 0: andcc %g7, %g5, %g0 ! PAGE_SIZE alignment check |
928 | 0: andcc %g7, %g5, %g0 ! PAGE_SIZE alignment check |
920 | bz 0f ! %g7 is page-aligned, no more windows to refill |
929 | bz 0f ! %g7 is page-aligned, no more windows to refill |
921 | nop |
930 | nop |
922 | 931 | ||
923 | add %g7, -STACK_WINDOW_SAVE_AREA_SIZE, %g7 |
932 | add %g7, -STACK_WINDOW_SAVE_AREA_SIZE, %g7 |
924 | ldx [%g7 + L0_OFFSET], %l0 |
933 | ldx [%g7 + L0_OFFSET], %l0 |
925 | ldx [%g7 + L1_OFFSET], %l1 |
934 | ldx [%g7 + L1_OFFSET], %l1 |
926 | ldx [%g7 + L2_OFFSET], %l2 |
935 | ldx [%g7 + L2_OFFSET], %l2 |
927 | ldx [%g7 + L3_OFFSET], %l3 |
936 | ldx [%g7 + L3_OFFSET], %l3 |
928 | ldx [%g7 + L4_OFFSET], %l4 |
937 | ldx [%g7 + L4_OFFSET], %l4 |
929 | ldx [%g7 + L5_OFFSET], %l5 |
938 | ldx [%g7 + L5_OFFSET], %l5 |
930 | ldx [%g7 + L6_OFFSET], %l6 |
939 | ldx [%g7 + L6_OFFSET], %l6 |
931 | ldx [%g7 + L7_OFFSET], %l7 |
940 | ldx [%g7 + L7_OFFSET], %l7 |
932 | ldx [%g7 + I0_OFFSET], %i0 |
941 | ldx [%g7 + I0_OFFSET], %i0 |
933 | ldx [%g7 + I1_OFFSET], %i1 |
942 | ldx [%g7 + I1_OFFSET], %i1 |
934 | ldx [%g7 + I2_OFFSET], %i2 |
943 | ldx [%g7 + I2_OFFSET], %i2 |
935 | ldx [%g7 + I3_OFFSET], %i3 |
944 | ldx [%g7 + I3_OFFSET], %i3 |
936 | ldx [%g7 + I4_OFFSET], %i4 |
945 | ldx [%g7 + I4_OFFSET], %i4 |
937 | ldx [%g7 + I5_OFFSET], %i5 |
946 | ldx [%g7 + I5_OFFSET], %i5 |
938 | ldx [%g7 + I6_OFFSET], %i6 |
947 | ldx [%g7 + I6_OFFSET], %i6 |
939 | ldx [%g7 + I7_OFFSET], %i7 |
948 | ldx [%g7 + I7_OFFSET], %i7 |
940 | 949 | ||
941 | dec %g3 |
950 | dec %g3 |
942 | and %g3, NWINDOWS - 1, %g3 |
951 | and %g3, NWINDOWS - 1, %g3 |
943 | wrpr %g3, 0, %cwp ! switch to the preceeding window |
952 | wrpr %g3, 0, %cwp ! switch to the preceeding window |
944 | 953 | ||
945 | ba 0b |
954 | ba 0b |
946 | inc %g4 |
955 | inc %g4 |
947 | 956 | ||
948 | 0: |
957 | 0: |
949 | /* |
958 | /* |
950 | * Switch back to the proper current window and adjust |
959 | * Switch back to the proper current window and adjust |
951 | * OTHERWIN, CANRESTORE, CANSAVE and CLEANWIN. |
960 | * OTHERWIN, CANRESTORE, CANSAVE and CLEANWIN. |
952 | */ |
961 | */ |
953 | wrpr %g1, 0, %cwp |
962 | wrpr %g1, 0, %cwp |
954 | add %g4, %g2, %g2 |
963 | add %g4, %g2, %g2 |
955 | cmp %g2, NWINDOWS - 2 |
964 | cmp %g2, NWINDOWS - 2 |
956 | bg 2f ! fix the CANRESTORE=NWINDOWS-1 anomaly |
965 | bg 2f ! fix the CANRESTORE=NWINDOWS-1 anomaly |
957 | mov NWINDOWS - 2, %g1 ! use dealy slot for both cases |
966 | mov NWINDOWS - 2, %g1 ! use dealy slot for both cases |
958 | sub %g1, %g2, %g1 |
967 | sub %g1, %g2, %g1 |
959 | 968 | ||
960 | wrpr %g0, 0, %otherwin |
969 | wrpr %g0, 0, %otherwin |
961 | wrpr %g1, 0, %cansave ! NWINDOWS - 2 - CANRESTORE |
970 | wrpr %g1, 0, %cansave ! NWINDOWS - 2 - CANRESTORE |
962 | wrpr %g2, 0, %canrestore ! OTHERWIN + windows in the buffer |
971 | wrpr %g2, 0, %canrestore ! OTHERWIN + windows in the buffer |
963 | wrpr %g2, 0, %cleanwin ! avoid information leak |
972 | wrpr %g2, 0, %cleanwin ! avoid information leak |
964 | 973 | ||
965 | 1: |
974 | 1: |
966 | restore |
975 | restore |
967 | 976 | ||
968 | .if \is_syscall |
977 | .if \is_syscall |
969 | done |
978 | done |
970 | .else |
979 | .else |
971 | retry |
980 | retry |
972 | .endif |
981 | .endif |
973 | 982 | ||
974 | /* |
983 | /* |
975 | * We got here in order to avoid inconsistency of the window state registers. |
984 | * We got here in order to avoid inconsistency of the window state registers. |
976 | * If the: |
985 | * If the: |
977 | * |
986 | * |
978 | * save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp |
987 | * save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp |
979 | * |
988 | * |
980 | * instruction trapped and spilled a register window into the userspace |
989 | * instruction trapped and spilled a register window into the userspace |
981 | * window buffer, we have just restored NWINDOWS - 1 register windows. |
990 | * window buffer, we have just restored NWINDOWS - 1 register windows. |
982 | * However, CANRESTORE can be only NWINDOW - 2 at most. |
991 | * However, CANRESTORE can be only NWINDOW - 2 at most. |
983 | * |
992 | * |
984 | * The solution is to manually switch to (CWP - 1) mod NWINDOWS |
993 | * The solution is to manually switch to (CWP - 1) mod NWINDOWS |
985 | * and set the window state registers so that: |
994 | * and set the window state registers so that: |
986 | * |
995 | * |
987 | * CANRESTORE = NWINDOWS - 2 |
996 | * CANRESTORE = NWINDOWS - 2 |
988 | * CLEANWIN = NWINDOWS - 2 |
997 | * CLEANWIN = NWINDOWS - 2 |
989 | * CANSAVE = 0 |
998 | * CANSAVE = 0 |
990 | * OTHERWIN = 0 |
999 | * OTHERWIN = 0 |
991 | * |
1000 | * |
992 | * The RESTORE instruction is therfore to be skipped. |
1001 | * The RESTORE instruction is therfore to be skipped. |
993 | */ |
1002 | */ |
994 | 2: |
1003 | 2: |
995 | wrpr %g0, 0, %otherwin |
1004 | wrpr %g0, 0, %otherwin |
996 | wrpr %g0, 0, %cansave |
1005 | wrpr %g0, 0, %cansave |
997 | wrpr %g1, 0, %canrestore |
1006 | wrpr %g1, 0, %canrestore |
998 | wrpr %g1, 0, %cleanwin |
1007 | wrpr %g1, 0, %cleanwin |
999 | 1008 | ||
1000 | rdpr %cwp, %g1 |
1009 | rdpr %cwp, %g1 |
1001 | dec %g1 |
1010 | dec %g1 |
1002 | and %g1, NWINDOWS - 1, %g1 |
1011 | and %g1, NWINDOWS - 1, %g1 |
1003 | wrpr %g1, 0, %cwp ! CWP-- |
1012 | wrpr %g1, 0, %cwp ! CWP-- |
1004 | 1013 | ||
1005 | .if \is_syscall |
1014 | .if \is_syscall |
1006 | done |
1015 | done |
1007 | .else |
1016 | .else |
1008 | retry |
1017 | retry |
1009 | .endif |
1018 | .endif |
1010 | 1019 | ||
1011 | .endm |
1020 | .endm |
1012 | 1021 | ||
1013 | .global preemptible_handler |
1022 | .global preemptible_handler |
1014 | preemptible_handler: |
1023 | preemptible_handler: |
1015 | PREEMPTIBLE_HANDLER_TEMPLATE 0 |
1024 | PREEMPTIBLE_HANDLER_TEMPLATE 0 |
1016 | 1025 | ||
1017 | .global trap_instruction_handler |
1026 | .global trap_instruction_handler |
1018 | trap_instruction_handler: |
1027 | trap_instruction_handler: |
1019 | PREEMPTIBLE_HANDLER_TEMPLATE 1 |
1028 | PREEMPTIBLE_HANDLER_TEMPLATE 1 |
1020 | 1029 |