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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup sparc64mm |
29 | /** @addtogroup sparc64mm |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch/mm/tlb.h> |
35 | #include <arch/mm/tlb.h> |
36 | #include <mm/tlb.h> |
36 | #include <mm/tlb.h> |
37 | #include <mm/as.h> |
37 | #include <mm/as.h> |
38 | #include <mm/asid.h> |
38 | #include <mm/asid.h> |
39 | #include <arch/mm/frame.h> |
39 | #include <arch/mm/frame.h> |
40 | #include <arch/mm/page.h> |
40 | #include <arch/mm/page.h> |
41 | #include <arch/mm/mmu.h> |
41 | #include <arch/mm/mmu.h> |
42 | #include <arch/interrupt.h> |
42 | #include <arch/interrupt.h> |
43 | #include <interrupt.h> |
43 | #include <interrupt.h> |
44 | #include <arch.h> |
44 | #include <arch.h> |
45 | #include <print.h> |
45 | #include <print.h> |
46 | #include <arch/types.h> |
46 | #include <arch/types.h> |
47 | #include <typedefs.h> |
47 | #include <typedefs.h> |
48 | #include <config.h> |
48 | #include <config.h> |
49 | #include <arch/trap/trap.h> |
49 | #include <arch/trap/trap.h> |
50 | #include <arch/trap/exception.h> |
50 | #include <arch/trap/exception.h> |
51 | #include <panic.h> |
51 | #include <panic.h> |
52 | #include <arch/asm.h> |
52 | #include <arch/asm.h> |
53 | 53 | ||
54 | #ifdef CONFIG_TSB |
54 | #ifdef CONFIG_TSB |
55 | #include <arch/mm/tsb.h> |
55 | #include <arch/mm/tsb.h> |
56 | #endif |
56 | #endif |
57 | 57 | ||
58 | static void dtlb_pte_copy(pte_t *t, bool ro); |
58 | static void dtlb_pte_copy(pte_t *t, bool ro); |
59 | static void itlb_pte_copy(pte_t *t); |
59 | static void itlb_pte_copy(pte_t *t); |
60 | static void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char *str); |
60 | static void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char *str); |
61 | static void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str); |
61 | static void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str); |
62 | static void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str); |
62 | static void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str); |
63 | 63 | ||
64 | char *context_encoding[] = { |
64 | char *context_encoding[] = { |
65 | "Primary", |
65 | "Primary", |
66 | "Secondary", |
66 | "Secondary", |
67 | "Nucleus", |
67 | "Nucleus", |
68 | "Reserved" |
68 | "Reserved" |
69 | }; |
69 | }; |
70 | 70 | ||
71 | void tlb_arch_init(void) |
71 | void tlb_arch_init(void) |
72 | { |
72 | { |
73 | /* |
73 | /* |
74 | * Invalidate all non-locked DTLB and ITLB entries. |
74 | * Invalidate all non-locked DTLB and ITLB entries. |
75 | */ |
75 | */ |
76 | tlb_invalidate_all(); |
76 | tlb_invalidate_all(); |
- | 77 | ||
- | 78 | /* |
|
- | 79 | * Clear both SFSRs. |
|
- | 80 | */ |
|
- | 81 | dtlb_sfsr_write(0); |
|
- | 82 | itlb_sfsr_write(0); |
|
77 | } |
83 | } |
78 | 84 | ||
79 | /** Insert privileged mapping into DMMU TLB. |
85 | /** Insert privileged mapping into DMMU TLB. |
80 | * |
86 | * |
81 | * @param page Virtual page address. |
87 | * @param page Virtual page address. |
82 | * @param frame Physical frame address. |
88 | * @param frame Physical frame address. |
83 | * @param pagesize Page size. |
89 | * @param pagesize Page size. |
84 | * @param locked True for permanent mappings, false otherwise. |
90 | * @param locked True for permanent mappings, false otherwise. |
85 | * @param cacheable True if the mapping is cacheable, false otherwise. |
91 | * @param cacheable True if the mapping is cacheable, false otherwise. |
86 | */ |
92 | */ |
87 | void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable) |
93 | void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable) |
88 | { |
94 | { |
89 | tlb_tag_access_reg_t tag; |
95 | tlb_tag_access_reg_t tag; |
90 | tlb_data_t data; |
96 | tlb_data_t data; |
91 | page_address_t pg; |
97 | page_address_t pg; |
92 | frame_address_t fr; |
98 | frame_address_t fr; |
93 | 99 | ||
94 | pg.address = page; |
100 | pg.address = page; |
95 | fr.address = frame; |
101 | fr.address = frame; |
96 | 102 | ||
97 | tag.value = ASID_KERNEL; |
103 | tag.value = ASID_KERNEL; |
98 | tag.vpn = pg.vpn; |
104 | tag.vpn = pg.vpn; |
99 | 105 | ||
100 | dtlb_tag_access_write(tag.value); |
106 | dtlb_tag_access_write(tag.value); |
101 | 107 | ||
102 | data.value = 0; |
108 | data.value = 0; |
103 | data.v = true; |
109 | data.v = true; |
104 | data.size = pagesize; |
110 | data.size = pagesize; |
105 | data.pfn = fr.pfn; |
111 | data.pfn = fr.pfn; |
106 | data.l = locked; |
112 | data.l = locked; |
107 | data.cp = cacheable; |
113 | data.cp = cacheable; |
108 | data.cv = cacheable; |
114 | data.cv = cacheable; |
109 | data.p = true; |
115 | data.p = true; |
110 | data.w = true; |
116 | data.w = true; |
111 | data.g = false; |
117 | data.g = false; |
112 | 118 | ||
113 | dtlb_data_in_write(data.value); |
119 | dtlb_data_in_write(data.value); |
114 | } |
120 | } |
115 | 121 | ||
116 | /** Copy PTE to TLB. |
122 | /** Copy PTE to TLB. |
117 | * |
123 | * |
118 | * @param t Page Table Entry to be copied. |
124 | * @param t Page Table Entry to be copied. |
119 | * @param ro If true, the entry will be created read-only, regardless of its w field. |
125 | * @param ro If true, the entry will be created read-only, regardless of its w field. |
120 | */ |
126 | */ |
121 | void dtlb_pte_copy(pte_t *t, bool ro) |
127 | void dtlb_pte_copy(pte_t *t, bool ro) |
122 | { |
128 | { |
123 | tlb_tag_access_reg_t tag; |
129 | tlb_tag_access_reg_t tag; |
124 | tlb_data_t data; |
130 | tlb_data_t data; |
125 | page_address_t pg; |
131 | page_address_t pg; |
126 | frame_address_t fr; |
132 | frame_address_t fr; |
127 | 133 | ||
128 | pg.address = t->page; |
134 | pg.address = t->page; |
129 | fr.address = t->frame; |
135 | fr.address = t->frame; |
130 | 136 | ||
131 | tag.value = 0; |
137 | tag.value = 0; |
132 | tag.context = t->as->asid; |
138 | tag.context = t->as->asid; |
133 | tag.vpn = pg.vpn; |
139 | tag.vpn = pg.vpn; |
134 | 140 | ||
135 | dtlb_tag_access_write(tag.value); |
141 | dtlb_tag_access_write(tag.value); |
136 | 142 | ||
137 | data.value = 0; |
143 | data.value = 0; |
138 | data.v = true; |
144 | data.v = true; |
139 | data.size = PAGESIZE_8K; |
145 | data.size = PAGESIZE_8K; |
140 | data.pfn = fr.pfn; |
146 | data.pfn = fr.pfn; |
141 | data.l = false; |
147 | data.l = false; |
142 | data.cp = t->c; |
148 | data.cp = t->c; |
143 | data.cv = t->c; |
149 | data.cv = t->c; |
144 | data.p = t->k; /* p like privileged */ |
150 | data.p = t->k; /* p like privileged */ |
145 | data.w = ro ? false : t->w; |
151 | data.w = ro ? false : t->w; |
146 | data.g = t->g; |
152 | data.g = t->g; |
147 | 153 | ||
148 | dtlb_data_in_write(data.value); |
154 | dtlb_data_in_write(data.value); |
149 | } |
155 | } |
150 | 156 | ||
151 | /** Copy PTE to ITLB. |
157 | /** Copy PTE to ITLB. |
152 | * |
158 | * |
153 | * @param t Page Table Entry to be copied. |
159 | * @param t Page Table Entry to be copied. |
154 | */ |
160 | */ |
155 | void itlb_pte_copy(pte_t *t) |
161 | void itlb_pte_copy(pte_t *t) |
156 | { |
162 | { |
157 | tlb_tag_access_reg_t tag; |
163 | tlb_tag_access_reg_t tag; |
158 | tlb_data_t data; |
164 | tlb_data_t data; |
159 | page_address_t pg; |
165 | page_address_t pg; |
160 | frame_address_t fr; |
166 | frame_address_t fr; |
161 | 167 | ||
162 | pg.address = t->page; |
168 | pg.address = t->page; |
163 | fr.address = t->frame; |
169 | fr.address = t->frame; |
164 | 170 | ||
165 | tag.value = 0; |
171 | tag.value = 0; |
166 | tag.context = t->as->asid; |
172 | tag.context = t->as->asid; |
167 | tag.vpn = pg.vpn; |
173 | tag.vpn = pg.vpn; |
168 | 174 | ||
169 | itlb_tag_access_write(tag.value); |
175 | itlb_tag_access_write(tag.value); |
170 | 176 | ||
171 | data.value = 0; |
177 | data.value = 0; |
172 | data.v = true; |
178 | data.v = true; |
173 | data.size = PAGESIZE_8K; |
179 | data.size = PAGESIZE_8K; |
174 | data.pfn = fr.pfn; |
180 | data.pfn = fr.pfn; |
175 | data.l = false; |
181 | data.l = false; |
176 | data.cp = t->c; |
182 | data.cp = t->c; |
177 | data.cv = t->c; |
183 | data.cv = t->c; |
178 | data.p = t->k; /* p like privileged */ |
184 | data.p = t->k; /* p like privileged */ |
179 | data.w = false; |
185 | data.w = false; |
180 | data.g = t->g; |
186 | data.g = t->g; |
181 | 187 | ||
182 | itlb_data_in_write(data.value); |
188 | itlb_data_in_write(data.value); |
183 | } |
189 | } |
184 | 190 | ||
185 | /** ITLB miss handler. */ |
191 | /** ITLB miss handler. */ |
186 | void fast_instruction_access_mmu_miss(int n, istate_t *istate) |
192 | void fast_instruction_access_mmu_miss(int n, istate_t *istate) |
187 | { |
193 | { |
188 | uintptr_t va = ALIGN_DOWN(istate->tpc, PAGE_SIZE); |
194 | uintptr_t va = ALIGN_DOWN(istate->tpc, PAGE_SIZE); |
189 | pte_t *t; |
195 | pte_t *t; |
190 | 196 | ||
191 | page_table_lock(AS, true); |
197 | page_table_lock(AS, true); |
192 | t = page_mapping_find(AS, va); |
198 | t = page_mapping_find(AS, va); |
193 | if (t && PTE_EXECUTABLE(t)) { |
199 | if (t && PTE_EXECUTABLE(t)) { |
194 | /* |
200 | /* |
195 | * The mapping was found in the software page hash table. |
201 | * The mapping was found in the software page hash table. |
196 | * Insert it into ITLB. |
202 | * Insert it into ITLB. |
197 | */ |
203 | */ |
198 | t->a = true; |
204 | t->a = true; |
199 | itlb_pte_copy(t); |
205 | itlb_pte_copy(t); |
200 | #ifdef CONFIG_TSB |
206 | #ifdef CONFIG_TSB |
201 | itsb_pte_copy(t); |
207 | itsb_pte_copy(t); |
202 | #endif |
208 | #endif |
203 | page_table_unlock(AS, true); |
209 | page_table_unlock(AS, true); |
204 | } else { |
210 | } else { |
205 | /* |
211 | /* |
206 | * Forward the page fault to the address space page fault handler. |
212 | * Forward the page fault to the address space page fault handler. |
207 | */ |
213 | */ |
208 | page_table_unlock(AS, true); |
214 | page_table_unlock(AS, true); |
209 | if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) { |
215 | if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) { |
210 | do_fast_instruction_access_mmu_miss_fault(istate, __FUNCTION__); |
216 | do_fast_instruction_access_mmu_miss_fault(istate, __FUNCTION__); |
211 | } |
217 | } |
212 | } |
218 | } |
213 | } |
219 | } |
214 | 220 | ||
215 | /** DTLB miss handler. |
221 | /** DTLB miss handler. |
216 | * |
222 | * |
217 | * Note that some faults (e.g. kernel faults) were already resolved |
223 | * Note that some faults (e.g. kernel faults) were already resolved |
218 | * by the low-level, assembly language part of the fast_data_access_mmu_miss |
224 | * by the low-level, assembly language part of the fast_data_access_mmu_miss |
219 | * handler. |
225 | * handler. |
220 | */ |
226 | */ |
221 | void fast_data_access_mmu_miss(int n, istate_t *istate) |
227 | void fast_data_access_mmu_miss(int n, istate_t *istate) |
222 | { |
228 | { |
223 | tlb_tag_access_reg_t tag; |
229 | tlb_tag_access_reg_t tag; |
224 | uintptr_t va; |
230 | uintptr_t va; |
225 | pte_t *t; |
231 | pte_t *t; |
226 | 232 | ||
227 | tag.value = dtlb_tag_access_read(); |
233 | tag.value = dtlb_tag_access_read(); |
228 | va = tag.vpn << PAGE_WIDTH; |
234 | va = tag.vpn << PAGE_WIDTH; |
229 | 235 | ||
230 | if (tag.context == ASID_KERNEL) { |
236 | if (tag.context == ASID_KERNEL) { |
231 | if (!tag.vpn) { |
237 | if (!tag.vpn) { |
232 | /* NULL access in kernel */ |
238 | /* NULL access in kernel */ |
233 | do_fast_data_access_mmu_miss_fault(istate, tag, __FUNCTION__); |
239 | do_fast_data_access_mmu_miss_fault(istate, tag, __FUNCTION__); |
234 | } |
240 | } |
235 | do_fast_data_access_mmu_miss_fault(istate, tag, "Unexpected kernel page fault."); |
241 | do_fast_data_access_mmu_miss_fault(istate, tag, "Unexpected kernel page fault."); |
236 | } |
242 | } |
237 | 243 | ||
238 | page_table_lock(AS, true); |
244 | page_table_lock(AS, true); |
239 | t = page_mapping_find(AS, va); |
245 | t = page_mapping_find(AS, va); |
240 | if (t) { |
246 | if (t) { |
241 | /* |
247 | /* |
242 | * The mapping was found in the software page hash table. |
248 | * The mapping was found in the software page hash table. |
243 | * Insert it into DTLB. |
249 | * Insert it into DTLB. |
244 | */ |
250 | */ |
245 | t->a = true; |
251 | t->a = true; |
246 | dtlb_pte_copy(t, true); |
252 | dtlb_pte_copy(t, true); |
247 | #ifdef CONFIG_TSB |
253 | #ifdef CONFIG_TSB |
248 | dtsb_pte_copy(t, true); |
254 | dtsb_pte_copy(t, true); |
249 | #endif |
255 | #endif |
250 | page_table_unlock(AS, true); |
256 | page_table_unlock(AS, true); |
251 | } else { |
257 | } else { |
252 | /* |
258 | /* |
253 | * Forward the page fault to the address space page fault handler. |
259 | * Forward the page fault to the address space page fault handler. |
254 | */ |
260 | */ |
255 | page_table_unlock(AS, true); |
261 | page_table_unlock(AS, true); |
256 | if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) { |
262 | if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) { |
257 | do_fast_data_access_mmu_miss_fault(istate, tag, __FUNCTION__); |
263 | do_fast_data_access_mmu_miss_fault(istate, tag, __FUNCTION__); |
258 | } |
264 | } |
259 | } |
265 | } |
260 | } |
266 | } |
261 | 267 | ||
262 | /** DTLB protection fault handler. */ |
268 | /** DTLB protection fault handler. */ |
263 | void fast_data_access_protection(int n, istate_t *istate) |
269 | void fast_data_access_protection(int n, istate_t *istate) |
264 | { |
270 | { |
265 | tlb_tag_access_reg_t tag; |
271 | tlb_tag_access_reg_t tag; |
266 | uintptr_t va; |
272 | uintptr_t va; |
267 | pte_t *t; |
273 | pte_t *t; |
268 | 274 | ||
269 | tag.value = dtlb_tag_access_read(); |
275 | tag.value = dtlb_tag_access_read(); |
270 | va = tag.vpn << PAGE_WIDTH; |
276 | va = tag.vpn << PAGE_WIDTH; |
271 | 277 | ||
272 | page_table_lock(AS, true); |
278 | page_table_lock(AS, true); |
273 | t = page_mapping_find(AS, va); |
279 | t = page_mapping_find(AS, va); |
274 | if (t && PTE_WRITABLE(t)) { |
280 | if (t && PTE_WRITABLE(t)) { |
275 | /* |
281 | /* |
276 | * The mapping was found in the software page hash table and is writable. |
282 | * The mapping was found in the software page hash table and is writable. |
277 | * Demap the old mapping and insert an updated mapping into DTLB. |
283 | * Demap the old mapping and insert an updated mapping into DTLB. |
278 | */ |
284 | */ |
279 | t->a = true; |
285 | t->a = true; |
280 | t->d = true; |
286 | t->d = true; |
281 | dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_SECONDARY, va); |
287 | dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_SECONDARY, va); |
282 | dtlb_pte_copy(t, false); |
288 | dtlb_pte_copy(t, false); |
283 | #ifdef CONFIG_TSB |
289 | #ifdef CONFIG_TSB |
284 | dtsb_pte_copy(t, false); |
290 | dtsb_pte_copy(t, false); |
285 | #endif |
291 | #endif |
286 | page_table_unlock(AS, true); |
292 | page_table_unlock(AS, true); |
287 | } else { |
293 | } else { |
288 | /* |
294 | /* |
289 | * Forward the page fault to the address space page fault handler. |
295 | * Forward the page fault to the address space page fault handler. |
290 | */ |
296 | */ |
291 | page_table_unlock(AS, true); |
297 | page_table_unlock(AS, true); |
292 | if (as_page_fault(va, PF_ACCESS_WRITE, istate) == AS_PF_FAULT) { |
298 | if (as_page_fault(va, PF_ACCESS_WRITE, istate) == AS_PF_FAULT) { |
293 | do_fast_data_access_protection_fault(istate, tag, __FUNCTION__); |
299 | do_fast_data_access_protection_fault(istate, tag, __FUNCTION__); |
294 | } |
300 | } |
295 | } |
301 | } |
296 | } |
302 | } |
297 | 303 | ||
298 | /** Print contents of both TLBs. */ |
304 | /** Print contents of both TLBs. */ |
299 | void tlb_print(void) |
305 | void tlb_print(void) |
300 | { |
306 | { |
301 | int i; |
307 | int i; |
302 | tlb_data_t d; |
308 | tlb_data_t d; |
303 | tlb_tag_read_reg_t t; |
309 | tlb_tag_read_reg_t t; |
304 | 310 | ||
305 | printf("I-TLB contents:\n"); |
311 | printf("I-TLB contents:\n"); |
306 | for (i = 0; i < ITLB_ENTRY_COUNT; i++) { |
312 | for (i = 0; i < ITLB_ENTRY_COUNT; i++) { |
307 | d.value = itlb_data_access_read(i); |
313 | d.value = itlb_data_access_read(i); |
308 | t.value = itlb_tag_read_read(i); |
314 | t.value = itlb_tag_read_read(i); |
309 | 315 | ||
310 | printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", |
316 | printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", |
311 | i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); |
317 | i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); |
312 | } |
318 | } |
313 | 319 | ||
314 | printf("D-TLB contents:\n"); |
320 | printf("D-TLB contents:\n"); |
315 | for (i = 0; i < DTLB_ENTRY_COUNT; i++) { |
321 | for (i = 0; i < DTLB_ENTRY_COUNT; i++) { |
316 | d.value = dtlb_data_access_read(i); |
322 | d.value = dtlb_data_access_read(i); |
317 | t.value = dtlb_tag_read_read(i); |
323 | t.value = dtlb_tag_read_read(i); |
318 | 324 | ||
319 | printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", |
325 | printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", |
320 | i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); |
326 | i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); |
321 | } |
327 | } |
322 | 328 | ||
323 | } |
329 | } |
324 | 330 | ||
325 | void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char *str) |
331 | void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char *str) |
326 | { |
332 | { |
327 | fault_if_from_uspace(istate, "%s\n", str); |
333 | fault_if_from_uspace(istate, "%s\n", str); |
328 | dump_istate(istate); |
334 | dump_istate(istate); |
329 | panic("%s\n", str); |
335 | panic("%s\n", str); |
330 | } |
336 | } |
331 | 337 | ||
332 | void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str) |
338 | void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str) |
333 | { |
339 | { |
334 | uintptr_t va; |
340 | uintptr_t va; |
335 | 341 | ||
336 | va = tag.vpn << PAGE_WIDTH; |
342 | va = tag.vpn << PAGE_WIDTH; |
337 | 343 | ||
338 | fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context); |
344 | fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context); |
339 | dump_istate(istate); |
345 | dump_istate(istate); |
340 | printf("Faulting page: %p, ASID=%d\n", va, tag.context); |
346 | printf("Faulting page: %p, ASID=%d\n", va, tag.context); |
341 | panic("%s\n", str); |
347 | panic("%s\n", str); |
342 | } |
348 | } |
343 | 349 | ||
344 | void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str) |
350 | void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str) |
345 | { |
351 | { |
346 | uintptr_t va; |
352 | uintptr_t va; |
347 | 353 | ||
348 | va = tag.vpn << PAGE_WIDTH; |
354 | va = tag.vpn << PAGE_WIDTH; |
349 | 355 | ||
350 | fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context); |
356 | fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context); |
351 | printf("Faulting page: %p, ASID=%d\n", va, tag.context); |
357 | printf("Faulting page: %p, ASID=%d\n", va, tag.context); |
352 | dump_istate(istate); |
358 | dump_istate(istate); |
353 | panic("%s\n", str); |
359 | panic("%s\n", str); |
354 | } |
360 | } |
- | 361 | ||
- | 362 | void dump_sfsr_and_sfar(void) |
|
- | 363 | { |
|
- | 364 | tlb_sfsr_reg_t sfsr; |
|
- | 365 | uintptr_t sfar; |
|
- | 366 | ||
- | 367 | sfsr.value = dtlb_sfsr_read(); |
|
- | 368 | sfar = dtlb_sfar_read(); |
|
- | 369 | ||
- | 370 | printf("DTLB SFSR: asi=%#x, ft=%#x, e=%d, ct=%d, pr=%d, w=%d, ow=%d, fv=%d\n", |
|
- | 371 | sfsr.asi, sfsr.ft, sfsr.e, sfsr.ct, sfsr.pr, sfsr.w, sfsr.ow, sfsr.fv); |
|
- | 372 | printf("DTLB SFAR: address=%p\n", sfar); |
|
- | 373 | ||
- | 374 | dtlb_sfsr_write(0); |
|
- | 375 | } |
|
355 | 376 | ||
356 | /** Invalidate all unlocked ITLB and DTLB entries. */ |
377 | /** Invalidate all unlocked ITLB and DTLB entries. */ |
357 | void tlb_invalidate_all(void) |
378 | void tlb_invalidate_all(void) |
358 | { |
379 | { |
359 | int i; |
380 | int i; |
360 | tlb_data_t d; |
381 | tlb_data_t d; |
361 | tlb_tag_read_reg_t t; |
382 | tlb_tag_read_reg_t t; |
362 | 383 | ||
363 | for (i = 0; i < ITLB_ENTRY_COUNT; i++) { |
384 | for (i = 0; i < ITLB_ENTRY_COUNT; i++) { |
364 | d.value = itlb_data_access_read(i); |
385 | d.value = itlb_data_access_read(i); |
365 | if (!d.l) { |
386 | if (!d.l) { |
366 | t.value = itlb_tag_read_read(i); |
387 | t.value = itlb_tag_read_read(i); |
367 | d.v = false; |
388 | d.v = false; |
368 | itlb_tag_access_write(t.value); |
389 | itlb_tag_access_write(t.value); |
369 | itlb_data_access_write(i, d.value); |
390 | itlb_data_access_write(i, d.value); |
370 | } |
391 | } |
371 | } |
392 | } |
372 | 393 | ||
373 | for (i = 0; i < DTLB_ENTRY_COUNT; i++) { |
394 | for (i = 0; i < DTLB_ENTRY_COUNT; i++) { |
374 | d.value = dtlb_data_access_read(i); |
395 | d.value = dtlb_data_access_read(i); |
375 | if (!d.l) { |
396 | if (!d.l) { |
376 | t.value = dtlb_tag_read_read(i); |
397 | t.value = dtlb_tag_read_read(i); |
377 | d.v = false; |
398 | d.v = false; |
378 | dtlb_tag_access_write(t.value); |
399 | dtlb_tag_access_write(t.value); |
379 | dtlb_data_access_write(i, d.value); |
400 | dtlb_data_access_write(i, d.value); |
380 | } |
401 | } |
381 | } |
402 | } |
382 | 403 | ||
383 | } |
404 | } |
384 | 405 | ||
385 | /** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context). |
406 | /** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context). |
386 | * |
407 | * |
387 | * @param asid Address Space ID. |
408 | * @param asid Address Space ID. |
388 | */ |
409 | */ |
389 | void tlb_invalidate_asid(asid_t asid) |
410 | void tlb_invalidate_asid(asid_t asid) |
390 | { |
411 | { |
391 | tlb_context_reg_t pc_save, ctx; |
412 | tlb_context_reg_t pc_save, ctx; |
392 | 413 | ||
393 | /* switch to nucleus because we are mapped by the primary context */ |
414 | /* switch to nucleus because we are mapped by the primary context */ |
394 | nucleus_enter(); |
415 | nucleus_enter(); |
395 | 416 | ||
396 | ctx.v = pc_save.v = mmu_primary_context_read(); |
417 | ctx.v = pc_save.v = mmu_primary_context_read(); |
397 | ctx.context = asid; |
418 | ctx.context = asid; |
398 | mmu_primary_context_write(ctx.v); |
419 | mmu_primary_context_write(ctx.v); |
399 | 420 | ||
400 | itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_PRIMARY, 0); |
421 | itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_PRIMARY, 0); |
401 | dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_PRIMARY, 0); |
422 | dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_PRIMARY, 0); |
402 | 423 | ||
403 | mmu_primary_context_write(pc_save.v); |
424 | mmu_primary_context_write(pc_save.v); |
404 | 425 | ||
405 | nucleus_leave(); |
426 | nucleus_leave(); |
406 | } |
427 | } |
407 | 428 | ||
408 | /** Invalidate all ITLB and DTLB entries for specified page range in specified address space. |
429 | /** Invalidate all ITLB and DTLB entries for specified page range in specified address space. |
409 | * |
430 | * |
410 | * @param asid Address Space ID. |
431 | * @param asid Address Space ID. |
411 | * @param page First page which to sweep out from ITLB and DTLB. |
432 | * @param page First page which to sweep out from ITLB and DTLB. |
412 | * @param cnt Number of ITLB and DTLB entries to invalidate. |
433 | * @param cnt Number of ITLB and DTLB entries to invalidate. |
413 | */ |
434 | */ |
414 | void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
435 | void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
415 | { |
436 | { |
416 | int i; |
437 | int i; |
417 | tlb_context_reg_t pc_save, ctx; |
438 | tlb_context_reg_t pc_save, ctx; |
418 | 439 | ||
419 | /* switch to nucleus because we are mapped by the primary context */ |
440 | /* switch to nucleus because we are mapped by the primary context */ |
420 | nucleus_enter(); |
441 | nucleus_enter(); |
421 | 442 | ||
422 | ctx.v = pc_save.v = mmu_primary_context_read(); |
443 | ctx.v = pc_save.v = mmu_primary_context_read(); |
423 | ctx.context = asid; |
444 | ctx.context = asid; |
424 | mmu_primary_context_write(ctx.v); |
445 | mmu_primary_context_write(ctx.v); |
425 | 446 | ||
426 | for (i = 0; i < cnt; i++) { |
447 | for (i = 0; i < cnt; i++) { |
427 | itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i * PAGE_SIZE); |
448 | itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i * PAGE_SIZE); |
428 | dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i * PAGE_SIZE); |
449 | dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i * PAGE_SIZE); |
429 | } |
450 | } |
430 | 451 | ||
431 | mmu_primary_context_write(pc_save.v); |
452 | mmu_primary_context_write(pc_save.v); |
432 | 453 | ||
433 | nucleus_leave(); |
454 | nucleus_leave(); |
434 | } |
455 | } |
435 | 456 | ||
436 | /** @} |
457 | /** @} |
437 | */ |
458 | */ |
438 | 459 |