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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Ondrej Palkovsky |
2 | * Copyright (c) 2005 Ondrej Palkovsky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup mips32 |
29 | /** @addtogroup mips32 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <interrupt.h> |
35 | #include <interrupt.h> |
36 | #include <ipc/irq.h> |
36 | #include <ipc/irq.h> |
37 | #include <console/chardev.h> |
37 | #include <console/chardev.h> |
38 | #include <arch/drivers/msim.h> |
38 | #include <arch/drivers/msim.h> |
39 | #include <arch/cp0.h> |
39 | #include <arch/cp0.h> |
40 | #include <console/console.h> |
40 | #include <console/console.h> |
41 | #include <sysinfo/sysinfo.h> |
41 | #include <sysinfo/sysinfo.h> |
42 | #include <ddi/ddi.h> |
42 | #include <ddi/ddi.h> |
43 | 43 | ||
44 | static parea_t msim_parea; |
- | |
45 | static chardev_t console; |
44 | static chardev_t console; |
46 | static irq_t msim_irq; |
45 | static irq_t msim_irq; |
47 | 46 | ||
48 | static void msim_write(chardev_t *dev, const char ch, bool silent); |
47 | static void msim_write(chardev_t *dev, const char ch, bool silent); |
49 | static void msim_enable(chardev_t *dev); |
48 | static void msim_enable(chardev_t *dev); |
50 | static void msim_disable(chardev_t *dev); |
49 | static void msim_disable(chardev_t *dev); |
51 | static char msim_do_read(chardev_t *dev); |
50 | static char msim_do_read(chardev_t *dev); |
52 | 51 | ||
53 | static chardev_operations_t msim_ops = { |
52 | static chardev_operations_t msim_ops = { |
54 | .resume = msim_enable, |
53 | .resume = msim_enable, |
55 | .suspend = msim_disable, |
54 | .suspend = msim_disable, |
56 | .write = msim_write, |
55 | .write = msim_write, |
57 | .read = msim_do_read, |
56 | .read = msim_do_read, |
58 | }; |
57 | }; |
59 | 58 | ||
60 | /** Putchar that works with MSIM & gxemul */ |
59 | /** Putchar that works with MSIM & gxemul */ |
61 | void msim_write(chardev_t *dev, const char ch, bool silent) |
60 | void msim_write(chardev_t *dev, const char ch, bool silent) |
62 | { |
61 | { |
63 | if (!silent) |
62 | if (!silent) |
64 | *((char *) MSIM_VIDEORAM) = ch; |
63 | *((char *) MSIM_VIDEORAM) = ch; |
65 | } |
64 | } |
66 | 65 | ||
67 | /* Called from getc(). */ |
66 | /* Called from getc(). */ |
68 | void msim_enable(chardev_t *dev) |
67 | void msim_enable(chardev_t *dev) |
69 | { |
68 | { |
70 | cp0_unmask_int(MSIM_KBD_IRQ); |
69 | cp0_unmask_int(MSIM_KBD_IRQ); |
71 | } |
70 | } |
72 | 71 | ||
73 | /* Called from getc(). */ |
72 | /* Called from getc(). */ |
74 | void msim_disable(chardev_t *dev) |
73 | void msim_disable(chardev_t *dev) |
75 | { |
74 | { |
76 | cp0_mask_int(MSIM_KBD_IRQ); |
75 | cp0_mask_int(MSIM_KBD_IRQ); |
77 | } |
76 | } |
78 | 77 | ||
79 | /** Read character using polling, assume interrupts disabled */ |
78 | /** Read character using polling, assume interrupts disabled */ |
80 | static char msim_do_read(chardev_t *dev) |
79 | static char msim_do_read(chardev_t *dev) |
81 | { |
80 | { |
82 | char ch; |
81 | char ch; |
83 | 82 | ||
84 | while (1) { |
83 | while (1) { |
85 | ch = *((volatile char *) MSIM_KBD_ADDRESS); |
84 | ch = *((volatile char *) MSIM_KBD_ADDRESS); |
86 | if (ch) { |
85 | if (ch) { |
87 | if (ch == '\r') |
86 | if (ch == '\r') |
88 | return '\n'; |
87 | return '\n'; |
89 | if (ch == 0x7f) |
88 | if (ch == 0x7f) |
90 | return '\b'; |
89 | return '\b'; |
91 | return ch; |
90 | return ch; |
92 | } |
91 | } |
93 | } |
92 | } |
94 | } |
93 | } |
95 | 94 | ||
96 | /** Process keyboard interrupt. */ |
95 | /** Process keyboard interrupt. */ |
97 | static void msim_irq_handler(irq_t *irq, void *arg, ...) |
96 | static void msim_irq_handler(irq_t *irq) |
98 | { |
97 | { |
99 | if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox)) |
98 | if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox)) |
100 | ipc_irq_send_notif(irq); |
99 | ipc_irq_send_notif(irq); |
101 | else { |
100 | else { |
102 | char ch = 0; |
101 | char ch = 0; |
103 | 102 | ||
104 | ch = *((char *) MSIM_KBD_ADDRESS); |
103 | ch = *((char *) MSIM_KBD_ADDRESS); |
105 | if (ch =='\r') |
104 | if (ch =='\r') |
106 | ch = '\n'; |
105 | ch = '\n'; |
107 | if (ch == 0x7f) |
106 | if (ch == 0x7f) |
108 | ch = '\b'; |
107 | ch = '\b'; |
109 | chardev_push_character(&console, ch); |
108 | chardev_push_character(&console, ch); |
110 | } |
109 | } |
111 | } |
110 | } |
112 | 111 | ||
113 | static irq_ownership_t msim_claim(void) |
112 | static irq_ownership_t msim_claim(void *instance) |
114 | { |
113 | { |
115 | return IRQ_ACCEPT; |
114 | return IRQ_ACCEPT; |
116 | } |
115 | } |
117 | 116 | ||
118 | void msim_kbd_grab(void) |
117 | void msim_kbd_grab(void) |
119 | { |
118 | { |
120 | ipl_t ipl = interrupts_disable(); |
119 | ipl_t ipl = interrupts_disable(); |
121 | spinlock_lock(&msim_irq.lock); |
120 | spinlock_lock(&msim_irq.lock); |
122 | msim_irq.notif_cfg.notify = false; |
121 | msim_irq.notif_cfg.notify = false; |
123 | spinlock_unlock(&msim_irq.lock); |
122 | spinlock_unlock(&msim_irq.lock); |
124 | interrupts_restore(ipl); |
123 | interrupts_restore(ipl); |
125 | } |
124 | } |
126 | 125 | ||
127 | void msim_kbd_release(void) |
126 | void msim_kbd_release(void) |
128 | { |
127 | { |
129 | ipl_t ipl = interrupts_disable(); |
128 | ipl_t ipl = interrupts_disable(); |
130 | spinlock_lock(&msim_irq.lock); |
129 | spinlock_lock(&msim_irq.lock); |
131 | if (msim_irq.notif_cfg.answerbox) |
130 | if (msim_irq.notif_cfg.answerbox) |
132 | msim_irq.notif_cfg.notify = true; |
131 | msim_irq.notif_cfg.notify = true; |
133 | spinlock_unlock(&msim_irq.lock); |
132 | spinlock_unlock(&msim_irq.lock); |
134 | interrupts_restore(ipl); |
133 | interrupts_restore(ipl); |
135 | } |
134 | } |
136 | 135 | ||
137 | 136 | ||
138 | /* Return console object representing msim console */ |
137 | /* Return console object representing msim console */ |
139 | void msim_console(devno_t devno) |
138 | void msim_console(devno_t devno) |
140 | { |
139 | { |
141 | chardev_initialize("msim_console", &console, &msim_ops); |
140 | chardev_initialize("msim_console", &console, &msim_ops); |
142 | stdin = &console; |
141 | stdin = &console; |
143 | stdout = &console; |
142 | stdout = &console; |
144 | 143 | ||
145 | irq_initialize(&msim_irq); |
144 | irq_initialize(&msim_irq); |
146 | msim_irq.devno = devno; |
145 | msim_irq.devno = devno; |
147 | msim_irq.inr = MSIM_KBD_IRQ; |
146 | msim_irq.inr = MSIM_KBD_IRQ; |
148 | msim_irq.claim = msim_claim; |
147 | msim_irq.claim = msim_claim; |
149 | msim_irq.handler = msim_irq_handler; |
148 | msim_irq.handler = msim_irq_handler; |
150 | irq_register(&msim_irq); |
149 | irq_register(&msim_irq); |
151 | 150 | ||
152 | cp0_unmask_int(MSIM_KBD_IRQ); |
151 | cp0_unmask_int(MSIM_KBD_IRQ); |
153 | 152 | ||
154 | sysinfo_set_item_val("kbd", NULL, true); |
153 | sysinfo_set_item_val("kbd", NULL, true); |
155 | sysinfo_set_item_val("kbd.devno", NULL, devno); |
154 | sysinfo_set_item_val("kbd.devno", NULL, devno); |
156 | sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ); |
155 | sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ); |
157 | sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS); |
156 | sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS); |
158 | 157 | ||
159 | msim_parea.pbase = KA2PA(MSIM_VIDEORAM); |
- | |
160 | msim_parea.vbase = MSIM_VIDEORAM; |
- | |
161 | msim_parea.frames = 1; |
- | |
162 | msim_parea.cacheable = false; |
- | |
163 | ddi_parea_register(&msim_parea); |
- | |
164 | - | ||
165 | sysinfo_set_item_val("fb", NULL, true); |
158 | sysinfo_set_item_val("fb", NULL, true); |
166 | sysinfo_set_item_val("fb.kind", NULL, 3); |
159 | sysinfo_set_item_val("fb.kind", NULL, 3); |
167 | sysinfo_set_item_val("fb.address.physical", NULL, KA2PA(MSIM_VIDEORAM)); |
160 | sysinfo_set_item_val("fb.address.physical", NULL, KA2PA(MSIM_VIDEORAM)); |
168 | } |
161 | } |
169 | 162 | ||
170 | /** @} |
163 | /** @} |
171 | */ |
164 | */ |
172 | 165 |