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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup xen32 |
29 | /** @addtogroup ia32xen |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <smp/smp.h> |
35 | #include <smp/smp.h> |
36 | #include <arch/smp/smp.h> |
36 | #include <arch/smp/smp.h> |
37 | #include <arch/smp/mps.h> |
37 | #include <arch/smp/mps.h> |
38 | #include <arch/smp/ap.h> |
38 | #include <arch/smp/ap.h> |
39 | #include <arch/boot/boot.h> |
39 | #include <arch/boot/boot.h> |
40 | #include <genarch/acpi/acpi.h> |
40 | #include <genarch/acpi/acpi.h> |
41 | #include <genarch/acpi/madt.h> |
41 | #include <genarch/acpi/madt.h> |
42 | #include <config.h> |
42 | #include <config.h> |
43 | #include <synch/waitq.h> |
43 | #include <synch/waitq.h> |
44 | #include <synch/synch.h> |
44 | #include <synch/synch.h> |
45 | #include <arch/pm.h> |
45 | #include <arch/pm.h> |
46 | #include <func.h> |
46 | #include <func.h> |
47 | #include <panic.h> |
47 | #include <panic.h> |
48 | #include <debug.h> |
48 | #include <debug.h> |
49 | #include <arch/asm.h> |
49 | #include <arch/asm.h> |
50 | #include <mm/frame.h> |
50 | #include <mm/frame.h> |
51 | #include <mm/page.h> |
51 | #include <mm/page.h> |
52 | #include <mm/slab.h> |
52 | #include <mm/slab.h> |
53 | #include <mm/as.h> |
53 | #include <mm/as.h> |
54 | #include <print.h> |
54 | #include <print.h> |
55 | #include <memstr.h> |
55 | #include <memstr.h> |
56 | 56 | ||
57 | #ifdef CONFIG_SMP |
57 | #ifdef CONFIG_SMP |
58 | 58 | ||
59 | static struct smp_config_operations *ops = NULL; |
59 | static struct smp_config_operations *ops = NULL; |
60 | 60 | ||
61 | void smp_init(void) |
61 | void smp_init(void) |
62 | { |
62 | { |
63 | uintptr_t l_apic_address, io_apic_address; |
63 | uintptr_t l_apic_address, io_apic_address; |
64 | 64 | ||
65 | if (acpi_madt) { |
65 | if (acpi_madt) { |
66 | acpi_madt_parse(); |
66 | acpi_madt_parse(); |
67 | ops = &madt_config_operations; |
67 | ops = &madt_config_operations; |
68 | } |
68 | } |
69 | if (config.cpu_count == 1) { |
69 | if (config.cpu_count == 1) { |
70 | mps_init(); |
70 | mps_init(); |
71 | ops = &mps_config_operations; |
71 | ops = &mps_config_operations; |
72 | } |
72 | } |
73 | 73 | ||
74 | l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA); |
74 | l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA); |
75 | if (!l_apic_address) |
75 | if (!l_apic_address) |
76 | panic("cannot allocate address for l_apic\n"); |
76 | panic("cannot allocate address for l_apic\n"); |
77 | 77 | ||
78 | io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA); |
78 | io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA); |
79 | if (!io_apic_address) |
79 | if (!io_apic_address) |
80 | panic("cannot allocate address for io_apic\n"); |
80 | panic("cannot allocate address for io_apic\n"); |
81 | 81 | ||
82 | if (config.cpu_count > 1) { |
82 | if (config.cpu_count > 1) { |
83 | page_mapping_insert(AS_KERNEL, l_apic_address, (uintptr_t) l_apic, |
83 | page_mapping_insert(AS_KERNEL, l_apic_address, (uintptr_t) l_apic, |
84 | PAGE_NOT_CACHEABLE); |
84 | PAGE_NOT_CACHEABLE); |
85 | page_mapping_insert(AS_KERNEL, io_apic_address, (uintptr_t) io_apic, |
85 | page_mapping_insert(AS_KERNEL, io_apic_address, (uintptr_t) io_apic, |
86 | PAGE_NOT_CACHEABLE); |
86 | PAGE_NOT_CACHEABLE); |
87 | 87 | ||
88 | l_apic = (uint32_t *) l_apic_address; |
88 | l_apic = (uint32_t *) l_apic_address; |
89 | io_apic = (uint32_t *) io_apic_address; |
89 | io_apic = (uint32_t *) io_apic_address; |
90 | } |
90 | } |
91 | } |
91 | } |
92 | 92 | ||
93 | /* |
93 | /* |
94 | * Kernel thread for bringing up application processors. It becomes clear |
94 | * Kernel thread for bringing up application processors. It becomes clear |
95 | * that we need an arrangement like this (AP's being initialized by a kernel |
95 | * that we need an arrangement like this (AP's being initialized by a kernel |
96 | * thread), for a thread has its dedicated stack. (The stack used during the |
96 | * thread), for a thread has its dedicated stack. (The stack used during the |
97 | * BSP initialization (prior the very first call to scheduler()) will be used |
97 | * BSP initialization (prior the very first call to scheduler()) will be used |
98 | * as an initialization stack for each AP.) |
98 | * as an initialization stack for each AP.) |
99 | */ |
99 | */ |
100 | void kmp(void *arg) |
100 | void kmp(void *arg) |
101 | { |
101 | { |
102 | int i; |
102 | int i; |
103 | 103 | ||
104 | ASSERT(ops != NULL); |
104 | ASSERT(ops != NULL); |
105 | 105 | ||
106 | waitq_initialize(&ap_completion_wq); |
106 | waitq_initialize(&ap_completion_wq); |
107 | 107 | ||
108 | /* |
108 | /* |
109 | * We need to access data in frame 0. |
109 | * We need to access data in frame 0. |
110 | * We boldly make use of kernel address space mapping. |
110 | * We boldly make use of kernel address space mapping. |
111 | */ |
111 | */ |
112 | 112 | ||
113 | /* |
113 | /* |
114 | * Save 0xa to address 0xf of the CMOS RAM. |
114 | * Save 0xa to address 0xf of the CMOS RAM. |
115 | * BIOS will not do the POST after the INIT signal. |
115 | * BIOS will not do the POST after the INIT signal. |
116 | */ |
116 | */ |
117 | outb(0x70,0xf); |
117 | outb(0x70,0xf); |
118 | outb(0x71,0xa); |
118 | outb(0x71,0xa); |
119 | 119 | ||
120 | // pic_disable_irqs(0xffff); |
120 | // pic_disable_irqs(0xffff); |
121 | apic_init(); |
121 | apic_init(); |
122 | 122 | ||
123 | for (i = 0; i < ops->cpu_count(); i++) { |
123 | for (i = 0; i < ops->cpu_count(); i++) { |
124 | struct descriptor *gdt_new; |
124 | struct descriptor *gdt_new; |
125 | 125 | ||
126 | /* |
126 | /* |
127 | * Skip processors marked unusable. |
127 | * Skip processors marked unusable. |
128 | */ |
128 | */ |
129 | if (!ops->cpu_enabled(i)) |
129 | if (!ops->cpu_enabled(i)) |
130 | continue; |
130 | continue; |
131 | 131 | ||
132 | /* |
132 | /* |
133 | * The bootstrap processor is already up. |
133 | * The bootstrap processor is already up. |
134 | */ |
134 | */ |
135 | if (ops->cpu_bootstrap(i)) |
135 | if (ops->cpu_bootstrap(i)) |
136 | continue; |
136 | continue; |
137 | 137 | ||
138 | if (ops->cpu_apic_id(i) == l_apic_id()) { |
138 | if (ops->cpu_apic_id(i) == l_apic_id()) { |
139 | printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i); |
139 | printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i); |
140 | continue; |
140 | continue; |
141 | } |
141 | } |
142 | 142 | ||
143 | /* |
143 | /* |
144 | * Prepare new GDT for CPU in question. |
144 | * Prepare new GDT for CPU in question. |
145 | */ |
145 | */ |
146 | if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor), FRAME_ATOMIC))) |
146 | if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor), FRAME_ATOMIC))) |
147 | panic("couldn't allocate memory for GDT\n"); |
147 | panic("couldn't allocate memory for GDT\n"); |
148 | 148 | ||
149 | memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor)); |
149 | memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor)); |
150 | memsetb((uintptr_t)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0); |
150 | memsetb((uintptr_t)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0); |
151 | gdtr.base = (uintptr_t) gdt_new; |
151 | gdtr.base = (uintptr_t) gdt_new; |
152 | 152 | ||
153 | if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) { |
153 | if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) { |
154 | /* |
154 | /* |
155 | * There may be just one AP being initialized at |
155 | * There may be just one AP being initialized at |
156 | * the time. After it comes completely up, it is |
156 | * the time. After it comes completely up, it is |
157 | * supposed to wake us up. |
157 | * supposed to wake us up. |
158 | */ |
158 | */ |
159 | if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) |
159 | if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) |
160 | printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i)); |
160 | printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i)); |
161 | } else |
161 | } else |
162 | printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i)); |
162 | printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i)); |
163 | } |
163 | } |
164 | } |
164 | } |
165 | 165 | ||
166 | int smp_irq_to_pin(int irq) |
166 | int smp_irq_to_pin(int irq) |
167 | { |
167 | { |
168 | ASSERT(ops != NULL); |
168 | ASSERT(ops != NULL); |
169 | return ops->irq_to_pin(irq); |
169 | return ops->irq_to_pin(irq); |
170 | } |
170 | } |
171 | 171 | ||
172 | #endif /* CONFIG_SMP */ |
172 | #endif /* CONFIG_SMP */ |
173 | 173 | ||
174 | /** @} |
174 | /** @} |
175 | */ |
175 | */ |
176 | 176 |