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1 | # |
1 | |
2 | # Copyright (C) 2001-2004 Jakub Jermar |
2 | # Copyright (C) 2001-2004 Jakub Jermar |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | #include <arch/asm/macro.h> |
29 | #define __ASM__ |
30 | 30 | ||
- | 31 | #include <arch/asm/regname.h> |
|
- | 32 | #include <arch/mm/page.h> |
|
- | 33 | #include <arch/asm/boot.h> |
|
31 | #define STACK_SPACE 128 |
34 | #include <arch/context.h> |
32 | 35 | ||
33 | .text |
36 | .text |
34 | 37 | ||
35 | .set noat |
38 | .set noat |
36 | .set noreorder |
39 | .set noreorder |
37 | .set nomacro |
40 | .set nomacro |
38 | 41 | ||
39 | .global kernel_image_start |
42 | .global kernel_image_start |
40 | .global tlb_refill_entry |
43 | .global tlb_refill_entry |
41 | .global cache_error_entry |
44 | .global cache_error_entry |
42 | .global exception_entry |
45 | .global exception_entry |
43 | 46 | ||
- | 47 | .macro REGISTERS_STORE r |
|
- | 48 | sw $at,EOFFSET_AT(\r) |
|
- | 49 | sw $v0,EOFFSET_V0(\r) |
|
- | 50 | sw $v1,EOFFSET_V1(\r) |
|
- | 51 | sw $a0,EOFFSET_A0(\r) |
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- | 52 | sw $a1,EOFFSET_A1(\r) |
|
- | 53 | sw $a2,EOFFSET_A2(\r) |
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- | 54 | sw $a3,EOFFSET_A3(\r) |
|
- | 55 | sw $t0,EOFFSET_A4(\r) |
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- | 56 | sw $t1,EOFFSET_T1(\r) |
|
- | 57 | sw $t2,EOFFSET_T2(\r) |
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- | 58 | sw $t3,EOFFSET_T3(\r) |
|
- | 59 | sw $t4,EOFFSET_T4(\r) |
|
- | 60 | sw $t5,EOFFSET_T5(\r) |
|
- | 61 | sw $t6,EOFFSET_T6(\r) |
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- | 62 | sw $t7,EOFFSET_T7(\r) |
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- | 63 | sw $t8,EOFFSET_T8(\r) |
|
- | 64 | sw $t9,EOFFSET_T9(\r) |
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- | 65 | sw $s0,EOFFSET_S0(\r) |
|
- | 66 | sw $s1,EOFFSET_S1(\r) |
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- | 67 | sw $s2,EOFFSET_S2(\r) |
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- | 68 | sw $s3,EOFFSET_S3(\r) |
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- | 69 | sw $s4,EOFFSET_S4(\r) |
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- | 70 | sw $s5,EOFFSET_S5(\r) |
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- | 71 | sw $s6,EOFFSET_S6(\r) |
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- | 72 | sw $s7,EOFFSET_S7(\r) |
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- | 73 | sw $s8,EOFFSET_S8(\r) |
|
- | 74 | sw $gp,EOFFSET_GP(\r) |
|
- | 75 | sw $ra,EOFFSET_RA(\r) |
|
- | 76 | mflo $k0 |
|
- | 77 | mfhi $k1 |
|
- | 78 | sw $k0,EOFFSET_LO(\r) |
|
- | 79 | sw $k1,EOFFSET_HI(\r) |
|
- | 80 | .endm |
|
- | 81 | ||
- | 82 | .macro REGISTERS_LOAD r |
|
- | 83 | lw $at,EOFFSET_AT(\r) |
|
- | 84 | lw $v0,EOFFSET_V0(\r) |
|
- | 85 | lw $v1,EOFFSET_V1(\r) |
|
- | 86 | lw $a0,EOFFSET_A0(\r) |
|
- | 87 | lw $a1,EOFFSET_A1(\r) |
|
- | 88 | lw $a2,EOFFSET_A2(\r) |
|
- | 89 | lw $a3,EOFFSET_A3(\r) |
|
- | 90 | lw $t0,EOFFSET_A4(\r) |
|
- | 91 | lw $t1,EOFFSET_T1(\r) |
|
- | 92 | lw $t2,EOFFSET_T2(\r) |
|
- | 93 | lw $t3,EOFFSET_T3(\r) |
|
- | 94 | lw $t4,EOFFSET_T4(\r) |
|
- | 95 | lw $t5,EOFFSET_T5(\r) |
|
- | 96 | lw $t6,EOFFSET_T6(\r) |
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- | 97 | lw $t7,EOFFSET_T7(\r) |
|
- | 98 | lw $t8,EOFFSET_T8(\r) |
|
- | 99 | lw $t9,EOFFSET_T9(\r) |
|
- | 100 | lw $s0,EOFFSET_S0(\r) |
|
- | 101 | lw $s1,EOFFSET_S1(\r) |
|
- | 102 | lw $s2,EOFFSET_S2(\r) |
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- | 103 | lw $s3,EOFFSET_S3(\r) |
|
- | 104 | lw $s4,EOFFSET_S4(\r) |
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- | 105 | lw $s5,EOFFSET_S5(\r) |
|
- | 106 | lw $s6,EOFFSET_S6(\r) |
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- | 107 | lw $s7,EOFFSET_S7(\r) |
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- | 108 | lw $s8,EOFFSET_S8(\r) |
|
- | 109 | lw $gp,EOFFSET_GP(\r) |
|
- | 110 | lw $ra,EOFFSET_RA(\r) |
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- | 111 | ||
- | 112 | lw $k0,EOFFSET_LO(\r) |
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- | 113 | lw $k1,EOFFSET_HI(\r) |
|
- | 114 | mtlo $k0 |
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- | 115 | mthi $k1 |
|
- | 116 | .endm |
|
- | 117 | ||
- | 118 | ||
44 | .org 0x0 |
119 | .org 0x0 |
45 | kernel_image_start: |
- | |
46 | tlb_refill_entry: |
120 | tlb_refill_entry: |
47 | j tlb_refill_handler |
121 | j tlb_refill_handler |
48 | nop |
122 | nop |
49 | 123 | ||
50 | .org 0x100 |
124 | .org 0x100 |
51 | cache_error_entry: |
125 | cache_error_entry: |
52 | j cache_error_handler |
126 | j cache_error_handler |
53 | nop |
127 | nop |
54 | 128 | ||
55 | .org 0x180 |
129 | .org 0x180 |
56 | exception_entry: |
130 | exception_entry: |
57 | exception_handler: |
131 | exception_handler: |
58 | sub $29, STACK_SPACE |
132 | sub $sp, REGISTER_SPACE |
59 | REGISTERS_STORE $29 |
133 | REGISTERS_STORE $sp |
60 | 134 | ||
61 | jal exception |
135 | jal exception |
62 | nop |
136 | nop |
63 | 137 | ||
64 | REGISTERS_LOAD $29 |
138 | REGISTERS_LOAD $sp |
65 | add $29, STACK_SPACE |
139 | add $sp, REGISTER_SPACE |
66 | 140 | ||
67 | eret |
141 | eret |
- | 142 | nop |
|
- | 143 | ||
- | 144 | .org KA2PA(0x80000300) |
|
- | 145 | kernel_image_start: |
|
- | 146 | /* Load temporary stack */ |
|
- | 147 | lui $sp, (TEMP_STACK_START + TEMP_STACK_SIZE) >> 16 |
|
- | 148 | ori $sp, (TEMP_STACK_START + TEMP_STACK_SIZE) & 0xffff |
|
- | 149 | ||
- | 150 | /* Not sure about this, but might be needed for PIC code???? */ |
|
- | 151 | lui $gp, 0x8000 |
|
- | 152 | ||
- | 153 | jal main_bsp |
|
- | 154 | nop |
|
- | 155 | ||
- | 156 | .org KA2PA(TEMP_STACK_START) |
|
- | 157 | .space TEMP_STACK_SIZE |
|
68 | 158 | ||
69 | tlb_refill_handler: |
159 | tlb_refill_handler: |
70 | sub $29, STACK_SPACE |
160 | sub $sp, REGISTER_SPACE |
71 | REGISTERS_STORE $29 |
161 | REGISTERS_STORE $sp |
72 | 162 | ||
73 | jal tlb_refill |
163 | jal tlb_refill |
74 | nop |
164 | nop |
75 | 165 | ||
76 | REGISTERS_LOAD $29 |
166 | REGISTERS_LOAD $sp |
77 | add $29, STACK_SPACE |
167 | add $sp, REGISTER_SPACE |
78 | 168 | ||
79 | eret |
169 | eret |
- | 170 | nop |
|
80 | 171 | ||
81 | cache_error_handler: |
172 | cache_error_handler: |
82 | sub $29, STACK_SPACE |
173 | sub $sp, REGISTER_SPACE |
83 | REGISTERS_STORE $29 |
174 | REGISTERS_STORE $sp |
84 | 175 | ||
85 | jal cache_error |
176 | jal cache_error |
86 | nop |
177 | nop |
87 | 178 | ||
88 | REGISTERS_LOAD $29 |
179 | REGISTERS_LOAD $sp |
89 | add $29, STACK_SPACE |
180 | add $sp, REGISTER_SPACE |
90 | 181 | ||
91 | eret |
182 | eret |
- | 183 | nop |
|
92 | 184 | ||
93 | 185 |
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94 |
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186 | |
95 | 187 | ||
96 | 188 | ||
97 | - |