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1 | # |
1 | # |
2 | # Copyright (c) 2007 Michal Kebrt |
2 | # Copyright (c) 2007 Michal Kebrt |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | 29 | ||
30 | .text |
30 | .text |
31 | 31 | ||
32 | .global memsetb |
32 | .global memsetb |
33 | .global memsetw |
33 | .global memsetw |
34 | .global memcpy |
34 | .global memcpy |
35 | .global memcpy_from_uspace |
35 | .global memcpy_from_uspace |
36 | .global memcpy_to_uspace |
36 | .global memcpy_to_uspace |
37 | .global memcpy_from_uspace_failover_address |
37 | .global memcpy_from_uspace_failover_address |
38 | .global memcpy_to_uspace_failover_address |
38 | .global memcpy_to_uspace_failover_address |
39 | 39 | ||
40 | memsetb: |
40 | memsetb: |
41 | b _memsetb |
41 | b _memsetb |
42 | 42 | ||
43 | memsetw: |
43 | memsetw: |
44 | b _memsetw |
44 | b _memsetw |
45 | 45 | ||
46 | memcpy: |
46 | memcpy: |
47 | memcpy_from_uspace: |
47 | memcpy_from_uspace: |
48 | memcpy_to_uspace: |
48 | memcpy_to_uspace: |
49 | add r3, r1, #3 |
49 | add r3, r1, #3 |
50 | bic r3, r3, #3 |
50 | bic r3, r3, #3 |
51 | cmp r1, r3 |
51 | cmp r1, r3 |
52 | stmdb sp!, {r4, r5, lr} |
52 | stmdb sp!, {r4, r5, lr} |
53 | mov r5, r0 /* save dst */ |
53 | mov r5, r0 /* save dst */ |
54 | beq 4f |
54 | beq 4f |
55 | 1: |
55 | 1: |
56 | cmp r2, #0 |
56 | cmp r2, #0 |
57 | movne ip, #0 |
57 | movne ip, #0 |
58 | beq 3f |
58 | beq 3f |
59 | 2: |
59 | 2: |
60 | ldrb r3, [ip, r1] |
60 | ldrb r3, [ip, r1] |
61 | strb r3, [ip, r0] |
61 | strb r3, [ip, r0] |
62 | add ip, ip, #1 |
62 | add ip, ip, #1 |
63 | cmp ip, r2 |
63 | cmp ip, r2 |
64 | bne 2b |
64 | bne 2b |
65 | 3: |
65 | 3: |
66 | mov r0, r5 |
66 | mov r0, r5 |
67 | ldmia sp!, {r4, r5, pc} |
67 | ldmia sp!, {r4, r5, pc} |
68 | 4: |
68 | 4: |
69 | add r3, r0, #3 |
69 | add r3, r0, #3 |
70 | bic r3, r3, #3 |
70 | bic r3, r3, #3 |
71 | cmp r0, r3 |
71 | cmp r0, r3 |
72 | bne 1b |
72 | bne 1b |
73 | movs r4, r2, lsr #2 |
73 | movs r4, r2, lsr #2 |
74 | moveq lr, r4 |
74 | moveq lr, r4 |
75 | beq 6f |
75 | beq 6f |
76 | mov lr, #0 |
76 | mov lr, #0 |
77 | mov ip, lr |
77 | mov ip, lr |
78 | 5: |
78 | 5: |
79 | ldr r3, [ip, r1] |
79 | ldr r3, [ip, r1] |
80 | add lr, lr, #1 |
80 | add lr, lr, #1 |
81 | cmp lr, r4 |
81 | cmp lr, r4 |
82 | str r3, [ip, r0] |
82 | str r3, [ip, r0] |
83 | add ip, ip, #4 |
83 | add ip, ip, #4 |
84 | bne 5b |
84 | bne 5b |
85 | 6: |
85 | 6: |
86 | ands r4, r2, #3 |
86 | ands r4, r2, #3 |
87 | beq 3b |
87 | beq 3b |
88 | mov r3, lr, lsl #2 |
88 | mov r3, lr, lsl #2 |
89 | add r0, r3, r0 |
89 | add r0, r3, r0 |
90 | add ip, r3, r1 |
90 | add ip, r3, r1 |
91 | mov r2, #0 |
91 | mov r2, #0 |
92 | 7: |
92 | 7: |
93 | ldrb r3, [r2, ip] |
93 | ldrb r3, [r2, ip] |
94 | strb r3, [r2, r0] |
94 | strb r3, [r2, r0] |
95 | add r2, r2, #1 |
95 | add r2, r2, #1 |
96 | cmp r2, r4 |
96 | cmp r2, r4 |
97 | bne 7b |
97 | bne 7b |
98 | b 3b |
98 | b 3b |
99 | 99 | ||
100 | memcpy_from_uspace_failover_address: |
100 | memcpy_from_uspace_failover_address: |
101 | memcpy_to_uspace_failover_address: |
101 | memcpy_to_uspace_failover_address: |
102 | mov r0, #0 |
102 | mov r0, #0 |
103 | ldmia sp!, {r4, r5, pc} |
103 | ldmia sp!, {r4, r5, pc} |
104 | 104 |