WebSVN – HelenOS – Diff – /SPARTAN/trunk/arch/ia32/src/asm.s


#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
# very low and hardware-level functions
 
.text
 
.global cpu_priority_high
.global cpu_priority_low
.global cpu_priority_restore
.global cpu_priority_read
.global cpu_halt
.global cpu_sleep
.global paging_on
.global cpu_read_dba
.global cpu_write_dba
.global cpu_read_cr2
.global enable_l_apic_in_msr
.global interrupt_handlers
.global inb
.global inw
.global inl
.global outb
.global outw
.global outl
.global memcopy
.global memsetb
.global memsetw
.global memcmp
 
 
 
 
 
 
 
 
 
 
 
 
 
 
#
# set priority level high
cpu_priority_high:
	pushf
	pop %eax
	cli
	ret
    
#
# set priority level low
cpu_priority_low:
        pushf
	pop %eax
	sti
	ret
 
#
# restore priority level
cpu_priority_restore:
	push 4(%esp)
	popf
	ret
 
# return raw priority level
cpu_priority_read:
	pushf
	pop %eax
	ret
 
cpu_halt:
cpu_sleep:
	hlt
	ret
 
paging_on:
	pushl %eax
	movl %cr0,%eax
	orl $(1<<31),%eax		# paging on
	andl $~((1<<30)|(1<<29)),%eax	# clear Cache Disable and not Write Though
	movl %eax,%cr0
	jmp 0f
0:
	popl %eax
	ret
 
cpu_read_dba:
	movl %cr3,%eax
	ret
 
cpu_write_dba:
	pushl %eax
	movl 8(%esp),%eax
	movl %eax,%cr3
	popl %eax
	ret
 
cpu_read_cr2:
	movl %cr2,%eax
	ret
 
enable_l_apic_in_msr:
	pusha
	
	movl $0x1b, %ecx
	rdmsr
	orl $(1<<11),%eax
	orl $(0xfee00000),%eax
	wrmsr
	
	popa
	ret
 
.macro handler i n
	push %ebp
	movl %esp,%ebp
	pusha
 
	push %ds
	push %es
    
	# we must fill the data segment registers
	movw $16,%ax
	movw %ax,%ds
	movw %ax,%es
    
	movl $(\i),%edi
	pushl %ebp
	addl $4,(%esp)
	pushl %edi
	call trap_dispatcher
	addl $8,%esp
 
	pop %es
	pop %ds
 
	popa
	pop %ebp
    
        iret
    
	.if (\n-\i)-1
	handler "(\i+1)",\n
	.endif
.endm
 
# keep in sync with pm.h !!!
IDT_ITEMS=64
interrupt_handlers:
h_start:
	handler 0 64
#	handler 64 128	
#	handler 128 192
#	handler 192 256
h_end:
 
 
inb:
	push %edx
	xorl %eax,%eax
	movl 8(%esp),%edx
	inb %dx,%al
	pop %edx
	ret
 
inw:
	push %edx
	xorl %eax,%eax
	movl 8(%esp),%edx
	inw %dx,%ax
	pop %edx
	ret
 
inl:
	push %edx
	xorl %eax,%eax
	movl 8(%esp),%edx
	inl %dx,%eax
	pop %edx
	ret
 
outb:
	push %ebp
	movl %esp,%ebp
	pusha
    
	movl 8(%ebp),%edx
	movl 12(%ebp),%eax
	outb %al,%dx
    
	popa
	pop %ebp
	ret
 
outw:
	push %ebp
	movl %esp,%ebp
	pusha
    
	movl 8(%ebp),%edx
	movl 12(%ebp),%eax
	outw %ax,%dx
    
	popa
	pop %ebp
	ret
 
outl:
	push %ebp
	movl %esp,%ebp
	pusha
    
	movl 8(%ebp),%edx
	movl 12(%ebp),%eax
	outl %eax,%dx
    
	popa
	pop %ebp
	ret
 
SRC=8
DST=12
CNT=16
memcopy:
	push %ebp
	movl %esp,%ebp
	pusha
    
	cld
	movl CNT(%ebp),%ecx
	movl DST(%ebp),%edi
	movl SRC(%ebp),%esi    
    
	rep movsb %ds:(%esi),%es:(%edi)
    
	popa
	pop %ebp
	ret
 
DST=8
CNT=12
X=16
memsetw:
	push %ebp
	movl %esp,%ebp
	pusha
    
	cld
	movl CNT(%ebp),%ecx
	movl DST(%ebp),%edi
	movl X(%ebp),%eax
    
	rep stosw %ax,%es:(%edi)
    
        popa
	pop %ebp
	ret
 
DST=8
CNT=12
X=16
memsetb:
	push %ebp
	movl %esp,%ebp
	pusha
    
	cld
	movl CNT(%ebp),%ecx
	movl DST(%ebp),%edi
	movl X(%ebp),%eax
    
	rep stosb %al,%es:(%edi)
    
        popa
	pop %ebp
	ret
 
SRC=12
DST=16
CNT=20
memcmp:
	push %ebp
	subl $4,%esp	
	movl %esp,%ebp
 
	pusha
    
	cld
	movl CNT(%ebp),%ecx
	movl DST(%ebp),%edi
	movl SRC(%ebp),%esi    
    
	repe cmpsb %es:(%edi),%ds:(%esi)
	movl %ecx,(%ebp)
 
	popa
	
	movl (%ebp),%eax	# return value => %eax (zero on success)
	addl $4,%esp
	pop %ebp
	
	ret
 
 
# THIS IS USERSPACE CODE
.global utext
utext:
0:
#	movl $0xdeadbeaf, %eax
	int $48
	jmp 0b
	# not reached
utext_end:
 
.data
.global utext_size
utext_size:
	.long utext_end - utext 
 
 
.section K_DATA_START
.global interrupt_handler_size
 
interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
 

Rev 27	Rev 28
1	#	1	#
2	# Copyright (C) 2001-2004 Jakub Jermar	2	# Copyright (C) 2001-2004 Jakub Jermar
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	# very low and hardware-level functions	29	# very low and hardware-level functions
30		30
31	.text	31	.text
32		32
33	.global cpu_priority_high	33	.global cpu_priority_high
34	.global cpu_priority_low	34	.global cpu_priority_low
35	.global cpu_priority_restore	35	.global cpu_priority_restore
36	.global cpu_priority_read	36	.global cpu_priority_read
37	.global cpu_halt	37	.global cpu_halt
38	.global cpu_sleep	38	.global cpu_sleep
39	.global paging_on	39	.global paging_on
40	.global cpu_read_dba	40	.global cpu_read_dba
41	.global cpu_write_dba	41	.global cpu_write_dba
42	.global cpu_read_cr2	42	.global cpu_read_cr2
43	.global enable_l_apic_in_msr	43	.global enable_l_apic_in_msr
44	.global interrupt_handlers	44	.global interrupt_handlers
45	.global inb	45	.global inb
46	.global inw	46	.global inw
47	.global inl	47	.global inl
48	.global outb	48	.global outb
49	.global outw	49	.global outw
50	.global outl	50	.global outl
51	.global memcopy	51	.global memcopy
52	.global memsetb	52	.global memsetb
53	.global memsetw	53	.global memsetw
54	.global memcmp	54	.global memcmp
55	.global write_dr0	-
56	.global read_dr0	-
57		-
58	write_dr0:	-
59	pushl %eax	-
60	movl 8(%esp),%eax	-
61	movl %eax,%dr0	-
62	popl %eax	-
63	ret	-
64		-
65	read_dr0:	-
66	movl %dr0,%eax	-
67	ret	-
68		55
69	#	56	#
70	# set priority level high	57	# set priority level high
71	cpu_priority_high:	58	cpu_priority_high:
72	pushf	59	pushf
73	pop %eax	60	pop %eax
74	cli	61	cli
75	ret	62	ret
76		63
77	#	64	#
78	# set priority level low	65	# set priority level low
79	cpu_priority_low:	66	cpu_priority_low:
80	pushf	67	pushf
81	pop %eax	68	pop %eax
82	sti	69	sti
83	ret	70	ret
84		71
85	#	72	#
86	# restore priority level	73	# restore priority level
87	cpu_priority_restore:	74	cpu_priority_restore:
88	push 4(%esp)	75	push 4(%esp)
89	popf	76	popf
90	ret	77	ret
91		78
92	# return raw priority level	79	# return raw priority level
93	cpu_priority_read:	80	cpu_priority_read:
94	pushf	81	pushf
95	pop %eax	82	pop %eax
96	ret	83	ret
97		84
98	cpu_halt:	85	cpu_halt:
99	cpu_sleep:	86	cpu_sleep:
100	hlt	87	hlt
101	ret	88	ret
102		89
103	paging_on:	90	paging_on:
104	pushl %eax	91	pushl %eax
105	movl %cr0,%eax	92	movl %cr0,%eax
106	orl $(1<<31),%eax # paging on	93	orl $(1<<31),%eax # paging on
107	andl $~((1<<30)\|(1<<29)),%eax # clear Cache Disable and not Write Though	94	andl $~((1<<30)\|(1<<29)),%eax # clear Cache Disable and not Write Though
108	movl %eax,%cr0	95	movl %eax,%cr0
109	jmp 0f	96	jmp 0f
110	0:	97	0:
111	popl %eax	98	popl %eax
112	ret	99	ret
113		100
114	cpu_read_dba:	101	cpu_read_dba:
115	movl %cr3,%eax	102	movl %cr3,%eax
116	ret	103	ret
117		104
118	cpu_write_dba:	105	cpu_write_dba:
119	pushl %eax	106	pushl %eax
120	movl 8(%esp),%eax	107	movl 8(%esp),%eax
121	movl %eax,%cr3	108	movl %eax,%cr3
122	popl %eax	109	popl %eax
123	ret	110	ret
124		111
125	cpu_read_cr2:	112	cpu_read_cr2:
126	movl %cr2,%eax	113	movl %cr2,%eax
127	ret	114	ret
128		115
129	enable_l_apic_in_msr:	116	enable_l_apic_in_msr:
130	pusha	117	pusha
131		118
132	movl $0x1b, %ecx	119	movl $0x1b, %ecx
133	rdmsr	120	rdmsr
134	orl $(1<<11),%eax	121	orl $(1<<11),%eax
135	orl $(0xfee00000),%eax	122	orl $(0xfee00000),%eax
136	wrmsr	123	wrmsr
137		124
138	popa	125	popa
139	ret	126	ret
140		127
141	.macro handler i n	128	.macro handler i n
142	push %ebp	129	push %ebp
143	movl %esp,%ebp	130	movl %esp,%ebp
144	pusha	131	pusha
145		132
146	push %ds	133	push %ds
147	push %es	134	push %es
148		135
149	# we must fill the data segment registers	136	# we must fill the data segment registers
150	movw $16,%ax	137	movw $16,%ax
151	movw %ax,%ds	138	movw %ax,%ds
152	movw %ax,%es	139	movw %ax,%es
153		140
154	movl $(\i),%edi	141	movl $(\i),%edi
155	pushl %ebp	142	pushl %ebp
156	addl $4,(%esp)	143	addl $4,(%esp)
157	pushl %edi	144	pushl %edi
158	call trap_dispatcher	145	call trap_dispatcher
159	addl $8,%esp	146	addl $8,%esp
160		147
161	pop %es	148	pop %es
162	pop %ds	149	pop %ds
163		150
164	popa	151	popa
165	pop %ebp	152	pop %ebp
166		153
167	iret	154	iret
168		155
169	.if (\n-\i)-1	156	.if (\n-\i)-1
170	handler "(\i+1)",\n	157	handler "(\i+1)",\n
171	.endif	158	.endif
172	.endm	159	.endm
173		160
174	# keep in sync with pm.h !!!	161	# keep in sync with pm.h !!!
175	IDT_ITEMS=64	162	IDT_ITEMS=64
176	interrupt_handlers:	163	interrupt_handlers:
177	h_start:	164	h_start:
178	handler 0 64	165	handler 0 64
179	# handler 64 128	166	# handler 64 128
180	# handler 128 192	167	# handler 128 192
181	# handler 192 256	168	# handler 192 256
182	h_end:	169	h_end:
183		170
184		171
185	inb:	172	inb:
186	push %edx	173	push %edx
187	xorl %eax,%eax	174	xorl %eax,%eax
188	movl 8(%esp),%edx	175	movl 8(%esp),%edx
189	inb %dx,%al	176	inb %dx,%al
190	pop %edx	177	pop %edx
191	ret	178	ret
192		179
193	inw:	180	inw:
194	push %edx	181	push %edx
195	xorl %eax,%eax	182	xorl %eax,%eax
196	movl 8(%esp),%edx	183	movl 8(%esp),%edx
197	inw %dx,%ax	184	inw %dx,%ax
198	pop %edx	185	pop %edx
199	ret	186	ret
200		187
201	inl:	188	inl:
202	push %edx	189	push %edx
203	xorl %eax,%eax	190	xorl %eax,%eax
204	movl 8(%esp),%edx	191	movl 8(%esp),%edx
205	inl %dx,%eax	192	inl %dx,%eax
206	pop %edx	193	pop %edx
207	ret	194	ret
208		195
209	outb:	196	outb:
210	push %ebp	197	push %ebp
211	movl %esp,%ebp	198	movl %esp,%ebp
212	pusha	199	pusha
213		200
214	movl 8(%ebp),%edx	201	movl 8(%ebp),%edx
215	movl 12(%ebp),%eax	202	movl 12(%ebp),%eax
216	outb %al,%dx	203	outb %al,%dx
217		204
218	popa	205	popa
219	pop %ebp	206	pop %ebp
220	ret	207	ret
221		208
222	outw:	209	outw:
223	push %ebp	210	push %ebp
224	movl %esp,%ebp	211	movl %esp,%ebp
225	pusha	212	pusha
226		213
227	movl 8(%ebp),%edx	214	movl 8(%ebp),%edx
228	movl 12(%ebp),%eax	215	movl 12(%ebp),%eax
229	outw %ax,%dx	216	outw %ax,%dx
230		217
231	popa	218	popa
232	pop %ebp	219	pop %ebp
233	ret	220	ret
234		221
235	outl:	222	outl:
236	push %ebp	223	push %ebp
237	movl %esp,%ebp	224	movl %esp,%ebp
238	pusha	225	pusha
239		226
240	movl 8(%ebp),%edx	227	movl 8(%ebp),%edx
241	movl 12(%ebp),%eax	228	movl 12(%ebp),%eax
242	outl %eax,%dx	229	outl %eax,%dx
243		230
244	popa	231	popa
245	pop %ebp	232	pop %ebp
246	ret	233	ret
247		234
248	SRC=8	235	SRC=8
249	DST=12	236	DST=12
250	CNT=16	237	CNT=16
251	memcopy:	238	memcopy:
252	push %ebp	239	push %ebp
253	movl %esp,%ebp	240	movl %esp,%ebp
254	pusha	241	pusha
255		242
256	cld	243	cld
257	movl CNT(%ebp),%ecx	244	movl CNT(%ebp),%ecx
258	movl DST(%ebp),%edi	245	movl DST(%ebp),%edi
259	movl SRC(%ebp),%esi	246	movl SRC(%ebp),%esi
260		247
261	rep movsb %ds:(%esi),%es:(%edi)	248	rep movsb %ds:(%esi),%es:(%edi)
262		249
263	popa	250	popa
264	pop %ebp	251	pop %ebp
265	ret	252	ret
266		253
267	DST=8	254	DST=8
268	CNT=12	255	CNT=12
269	X=16	256	X=16
270	memsetw:	257	memsetw:
271	push %ebp	258	push %ebp
272	movl %esp,%ebp	259	movl %esp,%ebp
273	pusha	260	pusha
274		261
275	cld	262	cld
276	movl CNT(%ebp),%ecx	263	movl CNT(%ebp),%ecx
277	movl DST(%ebp),%edi	264	movl DST(%ebp),%edi
278	movl X(%ebp),%eax	265	movl X(%ebp),%eax
279		266
280	rep stosw %ax,%es:(%edi)	267	rep stosw %ax,%es:(%edi)
281		268
282	popa	269	popa
283	pop %ebp	270	pop %ebp
284	ret	271	ret
285		272
286	DST=8	273	DST=8
287	CNT=12	274	CNT=12
288	X=16	275	X=16
289	memsetb:	276	memsetb:
290	push %ebp	277	push %ebp
291	movl %esp,%ebp	278	movl %esp,%ebp
292	pusha	279	pusha
293		280
294	cld	281	cld
295	movl CNT(%ebp),%ecx	282	movl CNT(%ebp),%ecx
296	movl DST(%ebp),%edi	283	movl DST(%ebp),%edi
297	movl X(%ebp),%eax	284	movl X(%ebp),%eax
298		285
299	rep stosb %al,%es:(%edi)	286	rep stosb %al,%es:(%edi)
300		287
301	popa	288	popa
302	pop %ebp	289	pop %ebp
303	ret	290	ret
304		291
305	SRC=12	292	SRC=12
306	DST=16	293	DST=16
307	CNT=20	294	CNT=20
308	memcmp:	295	memcmp:
309	push %ebp	296	push %ebp
310	subl $4,%esp	297	subl $4,%esp
311	movl %esp,%ebp	298	movl %esp,%ebp
312		299
313	pusha	300	pusha
314		301
315	cld	302	cld
316	movl CNT(%ebp),%ecx	303	movl CNT(%ebp),%ecx
317	movl DST(%ebp),%edi	304	movl DST(%ebp),%edi
318	movl SRC(%ebp),%esi	305	movl SRC(%ebp),%esi
319		306
320	repe cmpsb %es:(%edi),%ds:(%esi)	307	repe cmpsb %es:(%edi),%ds:(%esi)
321	movl %ecx,(%ebp)	308	movl %ecx,(%ebp)
322		309
323	popa	310	popa
324		311
325	movl (%ebp),%eax # return value => %eax (zero on success)	312	movl (%ebp),%eax # return value => %eax (zero on success)
326	addl $4,%esp	313	addl $4,%esp
327	pop %ebp	314	pop %ebp
328		315
329	ret	316	ret
330		317
331		318
332	# THIS IS USERSPACE CODE	319	# THIS IS USERSPACE CODE
333	.global utext	320	.global utext
334	utext:	321	utext:
335	0:	322	0:
336	# movl $0xdeadbeaf, %eax	323	# movl $0xdeadbeaf, %eax
337	int $48	324	int $48
338	jmp 0b	325	jmp 0b
339	# not reached	326	# not reached
340	utext_end:	327	utext_end:
341		328
342	.data	329	.data
343	.global utext_size	330	.global utext_size
344	utext_size:	331	utext_size:
345	.long utext_end - utext	332	.long utext_end - utext
346		333
347		334
348	.section K_DATA_START	335	.section K_DATA_START
349	.global interrupt_handler_size	336	.global interrupt_handler_size
350		337
351	interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS	338	interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
352		339

Subversion Repositories HelenOS

(root)/SPARTAN/trunk/arch/ia32/src/asm.s @ 115 – Rev 27 → 28