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Ignore whitespace Rev 124 → Rev 125

/SPARTAN/trunk/test/fpu/fpu1/test.c
75,8 → 75,8
static void pi(void *data)
{
int i;
double lpi, pi;
double n, ab, ad;
double lpi, pi;
double n, ab, ad;
 
waitq_sleep(&can_start);
 
85,15 → 85,15
lpi = -1;
pi = 0;
 
for (n=2, ab = sqrt(2); lpi != pi; n *= 2, ab = ad) {
double sc, cd;
for (n=2, ab = sqrt(2); lpi != pi; n *= 2, ab = ad) {
double sc, cd;
 
sc = sqrt(1 - (ab*ab/4));
cd = 1 - sc;
ad = sqrt(ab*ab/4 + cd*cd);
lpi = pi;
pi = 2 * n * ad;
}
sc = sqrt(1 - (ab*ab/4));
cd = 1 - sc;
ad = sqrt(ab*ab/4 + cd*cd);
lpi = pi;
pi = 2 * n * ad;
}
 
if((int)(100000000*pi)!=PI_10e8)
panic("tid%d: pi*10e8=%d\n", THREAD->tid, (int) 100000000*pi);
/SPARTAN/trunk/include/synch/semaphore.h
36,7 → 36,7
 
struct semaphore
{
waitq_t wq;
waitq_t wq;
};
 
#define semaphore_down(s) \
/SPARTAN/trunk/include/synch/waitq.h
39,9 → 39,9
#define WAKEUP_ALL 1
 
struct waitq {
spinlock_t lock;
int missed_wakeups;
link_t head;
spinlock_t lock;
int missed_wakeups;
link_t head;
};
 
#define waitq_sleep(wq) \
/SPARTAN/trunk/include/stackarg.h
50,6 → 50,6
((type) *((ap).last + ++((ap).pos)))
 
#define va_end(ap)
 
 
#endif
/SPARTAN/trunk/include/time/timeout.h
34,7 → 34,7
#include <synch/spinlock.h>
#include <list.h>
 
#define us2ticks(us) ((__u64)(((__u32) (us)/(1000000/HZ))))
#define us2ticks(us) ((__u64)(((__u32) (us)/(1000000/HZ))))
 
typedef void (* timeout_handler)(void *arg);
 
/SPARTAN/trunk/include/proc/thread.h
73,12 → 73,16
 
context_t saved_context;
context_t sleep_timeout_context;
fpu_context_t saved_fpu_context;
int fpu_context_exists;
int fpu_context_engaged; /* Defined only if thread doesn't run. It means that fpu context is in CPU
that last time executes this thread. This disables migration */
fpu_context_t saved_fpu_context;
int fpu_context_exists;
 
/*
* Defined only if thread doesn't run.
* It means that fpu context is in CPU that last time executes this thread.
* This disables migration
*/
int fpu_context_engaged;
 
waitq_t *sleep_queue;
timeout_t sleep_timeout;
volatile int timeout_pending;
/SPARTAN/trunk/include/mm/page.h
42,14 → 42,14
#define PAGE_WRITE_SHIFT 4
#define PAGE_EXEC_SHIFT 5
 
#define PAGE_NOT_CACHEABLE (0<<PAGE_CACHEABLE_SHIFT)
#define PAGE_CACHEABLE (1<<PAGE_CACHEABLE_SHIFT)
#define PAGE_NOT_CACHEABLE (0<<PAGE_CACHEABLE_SHIFT)
#define PAGE_CACHEABLE (1<<PAGE_CACHEABLE_SHIFT)
 
#define PAGE_PRESENT (0<<PAGE_PRESENT_SHIFT)
#define PAGE_NOT_PRESENT (1<<PAGE_PRESENT_SHIFT)
#define PAGE_PRESENT (0<<PAGE_PRESENT_SHIFT)
#define PAGE_NOT_PRESENT (1<<PAGE_PRESENT_SHIFT)
 
#define PAGE_USER (1<<PAGE_USER_SHIFT)
#define PAGE_KERNEL (0<<PAGE_USER_SHIFT)
#define PAGE_USER (1<<PAGE_USER_SHIFT)
#define PAGE_KERNEL (0<<PAGE_USER_SHIFT)
 
#define PAGE_READ (1<<PAGE_READ_SHIFT)
#define PAGE_WRITE (1<<PAGE_WRITE_SHIFT)
/SPARTAN/trunk/src/main/kinit.c
94,7 → 94,7
 
#ifdef __SMP__
if (config.cpu_count > 1) {
/*
/*
* For each CPU, create its load balancing thread.
*/
for (i = 0; i < config.cpu_count; i++) {
/SPARTAN/trunk/src/cpu/cpu.c
66,7 → 66,7
/* initialize everything */
memsetb((__address) cpu_private_data, sizeof(cpu_private_data_t) * config.cpu_count, 0);
memsetb((__address) cpus, sizeof(cpu_t) * config.cpu_count, 0);
 
for (i=0; i < config.cpu_count; i++) {
cpus[i].stack = (__u8 *) malloc(CPU_STACK_SIZE);
if (!cpus[i].stack)
/SPARTAN/trunk/src/time/timeout.c
105,7 → 105,7
pri = cpu_priority_high();
spinlock_lock(&CPU->timeoutlock);
spinlock_lock(&t->lock);
 
if (t->cpu)
panic("t->cpu != 0");
 
114,7 → 114,7
t->handler = f;
t->arg = arg;
 
/*
* Insert t into the active timeouts list according to t->ticks.
*/
/SPARTAN/trunk/src/time/clock.c
89,7 → 89,7
spinlock_unlock(&CPU->lock);
spinlock_lock(&THREAD->lock);
if (!THREAD->ticks--) {
if (!THREAD->ticks--) {
spinlock_unlock(&THREAD->lock);
scheduler();
}
/SPARTAN/trunk/src/proc/scheduler.c
102,7 → 102,7
* set CPU-private flag that the kcpulb has been started.
*/
if (test_and_set(&CPU->kcpulbstarted) == 0) {
waitq_wakeup(&CPU->kcpulb_wq, 0);
waitq_wakeup(&CPU->kcpulb_wq, 0);
goto loop;
}
#endif /* __SMP__ */
238,7 → 238,7
* This is the place where threads leave scheduler();
*/
before_thread_runs();
spinlock_unlock(&THREAD->lock);
spinlock_unlock(&THREAD->lock);
cpu_priority_restore(THREAD->saved_context.pri);
return;
}
278,74 → 278,73
if (THREAD) {
switch (THREAD->state) {
case Running:
THREAD->state = Ready;
spinlock_unlock(&THREAD->lock);
thread_ready(THREAD);
break;
THREAD->state = Ready;
spinlock_unlock(&THREAD->lock);
thread_ready(THREAD);
break;
 
case Exiting:
frame_free((__address) THREAD->kstack);
if (THREAD->ustack) {
frame_free((__address) THREAD->ustack);
}
/*
* Detach from the containing task.
*/
spinlock_lock(&TASK->lock);
list_remove(&THREAD->th_link);
spinlock_unlock(&TASK->lock);
frame_free((__address) THREAD->kstack);
if (THREAD->ustack) {
frame_free((__address) THREAD->ustack);
}
 
spinlock_unlock(&THREAD->lock);
spinlock_lock(&threads_lock);
list_remove(&THREAD->threads_link);
spinlock_unlock(&threads_lock);
/*
* Detach from the containing task.
*/
spinlock_lock(&TASK->lock);
list_remove(&THREAD->th_link);
spinlock_unlock(&TASK->lock);
 
spinlock_lock(&CPU->lock);
if(CPU->fpu_owner==THREAD) CPU->fpu_owner=NULL;
spinlock_unlock(&CPU->lock);
spinlock_unlock(&THREAD->lock);
spinlock_lock(&threads_lock);
list_remove(&THREAD->threads_link);
spinlock_unlock(&threads_lock);
 
free(THREAD);
break;
spinlock_lock(&CPU->lock);
if(CPU->fpu_owner==THREAD) CPU->fpu_owner=NULL;
spinlock_unlock(&CPU->lock);
 
free(THREAD);
 
break;
case Sleeping:
/*
* Prefer the thread after it's woken up.
*/
THREAD->pri = -1;
/*
* Prefer the thread after it's woken up.
*/
THREAD->pri = -1;
 
/*
* We need to release wq->lock which we locked in waitq_sleep().
* Address of wq->lock is kept in THREAD->sleep_queue.
*/
spinlock_unlock(&THREAD->sleep_queue->lock);
/*
* We need to release wq->lock which we locked in waitq_sleep().
* Address of wq->lock is kept in THREAD->sleep_queue.
*/
spinlock_unlock(&THREAD->sleep_queue->lock);
 
/*
* Check for possible requests for out-of-context invocation.
*/
if (THREAD->call_me) {
THREAD->call_me(THREAD->call_me_with);
THREAD->call_me = NULL;
THREAD->call_me_with = NULL;
}
/*
* Check for possible requests for out-of-context invocation.
*/
if (THREAD->call_me) {
THREAD->call_me(THREAD->call_me_with);
THREAD->call_me = NULL;
THREAD->call_me_with = NULL;
}
 
spinlock_unlock(&THREAD->lock);
break;
spinlock_unlock(&THREAD->lock);
 
break;
 
default:
/*
* Entering state is unexpected.
*/
panic("tid%d: unexpected state %s\n", THREAD->tid, thread_states[THREAD->state]);
break;
/*
* Entering state is unexpected.
*/
panic("tid%d: unexpected state %s\n", THREAD->tid, thread_states[THREAD->state]);
break;
}
THREAD = NULL;
}
 
THREAD = find_best_thread();
spinlock_lock(&THREAD->lock);
469,9 → 468,9
while (l != &r->rq_head) {
t = list_get_instance(l, thread_t, rq_link);
/*
* We don't want to steal CPU-wired threads neither threads already stolen.
* We don't want to steal CPU-wired threads neither threads already stolen.
* The latter prevents threads from migrating between CPU's without ever being run.
* We don't want to steal threads whose FPU context is still in CPU.
* We don't want to steal threads whose FPU context is still in CPU.
*/
spinlock_lock(&t->lock);
if ( (!(t->flags & (X_WIRED | X_STOLEN))) && (!(t->fpu_context_engaged)) ) {
497,7 → 496,7
 
atomic_dec(&nrdy);
 
r->n--;
r->n--;
list_remove(&t->rq_link);
 
break;
527,7 → 526,7
goto satisfied;
/*
* We are not satisfied yet, focus on another CPU next time.
* We are not satisfied yet, focus on another CPU next time.
*/
k++;
552,7 → 551,7
}
goto not_satisfied;
 
satisfied:
/*
* Tell find_best_thread() to wake us up later again.
/SPARTAN/trunk/src/proc/thread.c
146,7 → 146,7
ipi_broadcast(VECTOR_WAKEUP_IPI);
}
spinlock_unlock(&cpu->lock);
 
cpu_priority_restore(pri);
}
 
277,7 → 277,7
*/
void thread_sleep(__u32 sec)
{
thread_usleep(sec*1000000);
thread_usleep(sec*1000000);
}
 
 
/SPARTAN/trunk/src/mm/frame.c
54,23 → 54,23
 
void frame_init(void)
{
if (config.cpu_active == 1) {
if (config.cpu_active == 1) {
 
/*
* The bootstrap processor will allocate all necessary memory for frame allocation.
*/
/*
* The bootstrap processor will allocate all necessary memory for frame allocation.
*/
 
frames = config.memory_size / FRAME_SIZE;
frame_bitmap_octets = frames / 8 + (frames % 8 > 0);
frame_bitmap = (__u8 *) malloc(frame_bitmap_octets);
if (!frame_bitmap)
panic("malloc/frame_bitmap\n");
frames = config.memory_size / FRAME_SIZE;
frame_bitmap_octets = frames / 8 + (frames % 8 > 0);
frame_bitmap = (__u8 *) malloc(frame_bitmap_octets);
if (!frame_bitmap)
panic("malloc/frame_bitmap\n");
 
/*
* Mark all frames free.
*/
memsetb((__address) frame_bitmap, frame_bitmap_octets, 0);
frames_free = frames;
/*
* Mark all frames free.
*/
memsetb((__address) frame_bitmap, frame_bitmap_octets, 0);
frames_free = frames;
}
 
/*
80,10 → 80,10
frame_arch_init();
 
if (config.cpu_active == 1) {
/*
* Create the memory address space map. Marked frames and frame
* regions cannot be used for allocation.
*/
/*
* Create the memory address space map. Marked frames and frame
* regions cannot be used for allocation.
*/
frame_region_not_free(config.base, config.base + config.kernel_size);
}
}
/SPARTAN/trunk/src/mm/page.c
53,11 → 53,11
int i, cnt, length;
 
/* TODO: implement portable way of computing page address from address */
length = size + (s - (s & 0xfffff000));
cnt = length/PAGE_SIZE + (length%PAGE_SIZE>0);
length = size + (s - (s & 0xfffff000));
cnt = length/PAGE_SIZE + (length%PAGE_SIZE>0);
 
for (i = 0; i < cnt; i++)
map_page_to_frame(s + i*PAGE_SIZE, s + i*PAGE_SIZE, PAGE_NOT_CACHEABLE, 0);
for (i = 0; i < cnt; i++)
map_page_to_frame(s + i*PAGE_SIZE, s + i*PAGE_SIZE, PAGE_NOT_CACHEABLE, 0);
 
}
 
73,38 → 73,38
*/
void map_page_to_frame(__address page, __address frame, int flags, __address root)
{
pte_t *ptl0, *ptl1, *ptl2, *ptl3;
__address newpt;
pte_t *ptl0, *ptl1, *ptl2, *ptl3;
__address newpt;
 
ptl0 = (pte_t *) PA2KA(root ? root : (__address) GET_PTL0_ADDRESS());
ptl0 = (pte_t *) PA2KA(root ? root : (__address) GET_PTL0_ADDRESS());
 
if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT) {
newpt = frame_alloc(FRAME_KA);
memsetb(newpt, PAGE_SIZE, 0);
SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt));
SET_PTL1_FLAGS(ptl0, PTL0_INDEX(page), PAGE_PRESENT | PAGE_USER);
}
if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT) {
newpt = frame_alloc(FRAME_KA);
memsetb(newpt, PAGE_SIZE, 0);
SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt));
SET_PTL1_FLAGS(ptl0, PTL0_INDEX(page), PAGE_PRESENT | PAGE_USER);
}
 
ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
 
if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT) {
newpt = frame_alloc(FRAME_KA);
memsetb(newpt, PAGE_SIZE, 0);
SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt));
SET_PTL2_FLAGS(ptl1, PTL1_INDEX(page), PAGE_PRESENT | PAGE_USER);
}
if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT) {
newpt = frame_alloc(FRAME_KA);
memsetb(newpt, PAGE_SIZE, 0);
SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt));
SET_PTL2_FLAGS(ptl1, PTL1_INDEX(page), PAGE_PRESENT | PAGE_USER);
}
 
ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
 
if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT) {
newpt = frame_alloc(FRAME_KA);
memsetb(newpt, PAGE_SIZE, 0);
SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt));
SET_PTL3_FLAGS(ptl2, PTL2_INDEX(page), PAGE_PRESENT | PAGE_USER);
}
if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT) {
newpt = frame_alloc(FRAME_KA);
memsetb(newpt, PAGE_SIZE, 0);
SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt));
SET_PTL3_FLAGS(ptl2, PTL2_INDEX(page), PAGE_PRESENT | PAGE_USER);
}
 
ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
 
SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(page), frame);
SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), flags);
SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(page), frame);
SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), flags);
}
/SPARTAN/trunk/arch/powerpc/_link.ld
10,29 → 10,28
ENTRY(kernel_image_start)
 
SECTIONS {
.image 0x80000000: AT (0x80000000) {
ktext_start = .;
*(.text);
ktext_end = .;
.image 0x80000000: AT (0x80000000) {
ktext_start = .;
*(.text);
ktext_end = .;
 
kdata_start = .;
kdata_end = .;
kdata_start = .;
kdata_end = .;
} = 0x00000000
 
} = 0x00000000
. = ABSOLUTE(hardcoded_ktext_size);
.patch_1 : {
LONG(ktext_end - ktext_start);
}
 
. = ABSOLUTE(hardcoded_ktext_size);
.patch_1 : {
LONG(ktext_end - ktext_start);
}
. = ABSOLUTE(hardcoded_kdata_size);
.patch_2 : {
LONG(kdata_end - kdata_start);
}
 
. = ABSOLUTE(hardcoded_kdata_size);
.patch_2 : {
LONG(kdata_end - kdata_start);
}
. = ABSOLUTE(hardcoded_load_address);
.patch_3 : {
LONG(0x80000000);
}
 
. = ABSOLUTE(hardcoded_load_address);
.patch_3 : {
LONG(0x80000000);
}
 
}
/SPARTAN/trunk/arch/ia64/boot/_link.ld
2,71 → 2,71
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/SPARTAN/trunk/arch/ia64/include/mm/page.h
48,11 → 48,11
#define PTL2_INDEX_ARCH(vaddr) 0
#define PTL3_INDEX_ARCH(vaddr) 0
 
#define GET_PTL0_ADDRESS_ARCH() ((pte_t *) 0)
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *) 0)
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) ((pte_t *) 0)
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) ((pte_t *) 0)
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((pte_t *) 0)
#define GET_PTL0_ADDRESS_ARCH() ((pte_t *) 0)
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *) 0)
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) ((pte_t *) 0)
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) ((pte_t *) 0)
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((pte_t *) 0)
 
#define SET_PTL0_ADDRESS_ARCH(ptl0)
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)
60,10 → 60,10
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)
 
#define GET_PTL1_FLAGS_ARCH(ptl0, i) 0
#define GET_PTL2_FLAGS_ARCH(ptl1, i) 0
#define GET_PTL3_FLAGS_ARCH(ptl2, i) 0
#define GET_FRAME_FLAGS_ARCH(ptl3, i) 0
#define GET_PTL1_FLAGS_ARCH(ptl0, i) 0
#define GET_PTL2_FLAGS_ARCH(ptl1, i) 0
#define GET_PTL3_FLAGS_ARCH(ptl2, i) 0
#define GET_FRAME_FLAGS_ARCH(ptl3, i) 0
 
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
/SPARTAN/trunk/arch/ia64/_link.ld
88,5 → 88,5
_hardcoded_ktext_size = ktext_end - ktext_start;
_hardcoded_kdata_size = kdata_end - kdata_start;
_hardcoded_load_address = 0x0000000000001000;
 
}
/SPARTAN/trunk/arch/mips/boot/boot.s
35,9 → 35,9
start:
# move 0x80000000 to reg $8
lui $8, 0x8000
 
# prepare stack
lui $29, 0x8100
 
j $8
nop
/SPARTAN/trunk/arch/mips/include/mm/page.h
59,13 → 59,13
#define PTL2_INDEX_ARCH(vaddr) 0
#define PTL3_INDEX_ARCH(vaddr) (((vaddr)>>14)&0xfff)
 
#define GET_PTL0_ADDRESS_ARCH() (PTL0)
#define GET_PTL0_ADDRESS_ARCH() (PTL0)
#define SET_PTL0_ADDRESS_ARCH(ptl0) (PTL0 = (pte_t *)(ptl0))
 
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) (((pte_t *)(ptl0))[(i)].pfn<<14)
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1)
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2)
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) (((pte_t *)(ptl3))[(i)].pfn<<14)
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) (((pte_t *)(ptl0))[(i)].pfn<<14)
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1)
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2)
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) (((pte_t *)(ptl3))[(i)].pfn<<14)
 
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_t *)(ptl0))[(i)].pfn = (a)>>14)
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
72,10 → 72,10
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *)(ptl3))[(i)].pfn = (a)>>14)
 
#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *)(ptl0), (index_t)(i))
#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT
#define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT
#define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *)(ptl3), (index_t)(i))
#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *)(ptl0), (index_t)(i))
#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT
#define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT
#define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *)(ptl3), (index_t)(i))
 
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
/SPARTAN/trunk/arch/mips/include/context.h
35,39 → 35,39
 
 
struct context {
__u32 r0;
__u32 r1;
__u32 r2;
__u32 r3;
__u32 r4;
__u32 r5;
__u32 r6;
__u32 r7;
__u32 r8;
__u32 r9;
__u32 r10;
__u32 r11;
__u32 r12;
__u32 r13;
__u32 r14;
__u32 r15;
__u32 r16;
__u32 r17;
__u32 r18;
__u32 r19;
__u32 r20;
__u32 r21;
__u32 r22;
__u32 r23;
__u32 r24;
__u32 r25;
__u32 r26;
__u32 r27;
__u32 r28;
__u32 sp;
__u32 r30;
__u32 pc;
__u32 pri;
__u32 r0;
__u32 r1;
__u32 r2;
__u32 r3;
__u32 r4;
__u32 r5;
__u32 r6;
__u32 r7;
__u32 r8;
__u32 r9;
__u32 r10;
__u32 r11;
__u32 r12;
__u32 r13;
__u32 r14;
__u32 r15;
__u32 r16;
__u32 r17;
__u32 r18;
__u32 r19;
__u32 r20;
__u32 r21;
__u32 r22;
__u32 r23;
__u32 r24;
__u32 r25;
__u32 r26;
__u32 r27;
__u32 r28;
__u32 sp;
__u32 r30;
__u32 pc;
__u32 pri;
};
 
#endif
/SPARTAN/trunk/arch/mips/include/cpu.h
34,8 → 34,8
#define CPU_ID_ARCH 0
 
struct cpu_arch {
int imp_num;
int rev_num;
int imp_num;
int rev_num;
};
#endif
/SPARTAN/trunk/arch/mips/src/cpu/cpu.c
39,42 → 39,42
char *vendor;
char *model;
} imp_data[] = {
{ "Invalid", "Invalid" }, /* 0x00 */
{ "MIPS", "R2000" }, /* 0x01 */
{ "MIPS", "R3000" }, /* 0x02 */
{ "MIPS", "R6000" }, /* 0x03 */
{ "MIPS", " R4000/R4400" }, /* 0x04 */
{ "LSI Logic", "R3000" }, /* 0x05 */
{ "MIPS", "R6000A" }, /* 0x06 */
{ "IDT", "3051/3052" }, /* 0x07 */
{ "Invalid", "Invalid" }, /* 0x08 */
{ "MIPS", "R10000/T5" }, /* 0x09 */
{ "MIPS", "R4200" }, /* 0x0a */
{ "Unknown", "Unknown" }, /* 0x0b */
{ "Unknown", "Unknown" }, /* 0x0c */
{ "Invalid", "Invalid" }, /* 0x0d */
{ "Invalid", "Invalid" }, /* 0x0e */
{ "Invalid", "Invalid" }, /* 0x0f */
{ "MIPS", "R8000" }, /* 0x10 */
{ "Invalid", "Invalid" }, /* 0x11 */
{ "Invalid", "Invalid" }, /* 0x12 */
{ "Invalid", "Invalid" }, /* 0x13 */
{ "Invalid", "Invalid" }, /* 0x14 */
{ "Invalid", "Invalid" }, /* 0x15 */
{ "Invalid", "Invalid" }, /* 0x16 */
{ "Invalid", "Invalid" }, /* 0x17 */
{ "Invalid", "Invalid" }, /* 0x18 */
{ "Invalid", "Invalid" }, /* 0x19 */
{ "Invalid", "Invalid" }, /* 0x1a */
{ "Invalid", "Invalid" }, /* 0x1b */
{ "Invalid", "Invalid" }, /* 0x1c */
{ "Invalid", "Invalid" }, /* 0x1d */
{ "Invalid", "Invalid" }, /* 0x1e */
{ "Invalid", "Invalid" }, /* 0x1f */
{ "QED", "R4600" }, /* 0x20 */
{ "Sony", "R3000" }, /* 0x21 */
{ "Toshiba", "R3000" }, /* 0x22 */
{ "NKK", "R3000" } /* 0x23 */
{ "Invalid", "Invalid" }, /* 0x00 */
{ "MIPS", "R2000" }, /* 0x01 */
{ "MIPS", "R3000" }, /* 0x02 */
{ "MIPS", "R6000" }, /* 0x03 */
{ "MIPS", " R4000/R4400" }, /* 0x04 */
{ "LSI Logic", "R3000" }, /* 0x05 */
{ "MIPS", "R6000A" }, /* 0x06 */
{ "IDT", "3051/3052" }, /* 0x07 */
{ "Invalid", "Invalid" }, /* 0x08 */
{ "MIPS", "R10000/T5" }, /* 0x09 */
{ "MIPS", "R4200" }, /* 0x0a */
{ "Unknown", "Unknown" }, /* 0x0b */
{ "Unknown", "Unknown" }, /* 0x0c */
{ "Invalid", "Invalid" }, /* 0x0d */
{ "Invalid", "Invalid" }, /* 0x0e */
{ "Invalid", "Invalid" }, /* 0x0f */
{ "MIPS", "R8000" }, /* 0x10 */
{ "Invalid", "Invalid" }, /* 0x11 */
{ "Invalid", "Invalid" }, /* 0x12 */
{ "Invalid", "Invalid" }, /* 0x13 */
{ "Invalid", "Invalid" }, /* 0x14 */
{ "Invalid", "Invalid" }, /* 0x15 */
{ "Invalid", "Invalid" }, /* 0x16 */
{ "Invalid", "Invalid" }, /* 0x17 */
{ "Invalid", "Invalid" }, /* 0x18 */
{ "Invalid", "Invalid" }, /* 0x19 */
{ "Invalid", "Invalid" }, /* 0x1a */
{ "Invalid", "Invalid" }, /* 0x1b */
{ "Invalid", "Invalid" }, /* 0x1c */
{ "Invalid", "Invalid" }, /* 0x1d */
{ "Invalid", "Invalid" }, /* 0x1e */
{ "Invalid", "Invalid" }, /* 0x1f */
{ "QED", "R4600" }, /* 0x20 */
{ "Sony", "R3000" }, /* 0x21 */
{ "Toshiba", "R3000" }, /* 0x22 */
{ "NKK", "R3000" } /* 0x23 */
};
 
void cpu_arch_init(void)
/SPARTAN/trunk/arch/mips/src/mips.c
37,12 → 37,12
* Clear the error level.
*/
cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
 
/*
* Unmask hardware clock interrupt.
*/
cp0_status_write(cp0_status_read() | (1<<cp0_status_im7_shift));
 
/*
* Start hardware clock.
*/
/SPARTAN/trunk/arch/mips/src/interrupt.c
35,26 → 35,26
 
pri_t cpu_priority_high(void)
{
pri_t pri = (pri_t) cp0_status_read();
cp0_status_write(pri & ~cp0_status_ie_enabled_bit);
return pri;
pri_t pri = (pri_t) cp0_status_read();
cp0_status_write(pri & ~cp0_status_ie_enabled_bit);
return pri;
}
 
pri_t cpu_priority_low(void)
{
pri_t pri = (pri_t) cp0_status_read();
cp0_status_write(pri | cp0_status_ie_enabled_bit);
return pri;
pri_t pri = (pri_t) cp0_status_read();
cp0_status_write(pri | cp0_status_ie_enabled_bit);
return pri;
}
 
void cpu_priority_restore(pri_t pri)
{
cp0_status_write(cp0_status_read() | (pri & cp0_status_ie_enabled_bit));
cp0_status_write(cp0_status_read() | (pri & cp0_status_ie_enabled_bit));
}
 
pri_t cpu_priority_read(void)
{
return cp0_status_read();
return cp0_status_read();
}
 
 
84,8 → 84,8
break;
case 7: /* Timer Interrupt */
cp0_compare_write(cp0_compare_value); /* clear timer interrupt */
/* start counting over again */
cp0_count_write(0);
/* start counting over again */
cp0_count_write(0);
clock();
break;
}
/SPARTAN/trunk/arch/mips/src/start.S
51,16 → 51,16
cache_error_entry:
j cache_error_handler
nop
 
.org 0x180
exception_entry:
exception_handler:
sub $29, STACK_SPACE
REGISTERS_STORE $29
 
jal exception
nop
 
REGISTERS_LOAD $29
add $29, STACK_SPACE
 
69,13 → 69,13
tlb_refill_handler:
sub $29, STACK_SPACE
REGISTERS_STORE $29
 
jal tlb_refill
nop
 
REGISTERS_LOAD $29
add $29, STACK_SPACE
 
eret
 
cache_error_handler:
84,7 → 84,7
 
jal cache_error
nop
 
REGISTERS_LOAD $29
add $29, STACK_SPACE
 
/SPARTAN/trunk/arch/mips/_link.ld
31,17 → 31,17
 
. = ABSOLUTE(hardcoded_ktext_size);
.patch_1 : {
LONG(ktext_end - ktext_start);
LONG(ktext_end - ktext_start);
}
 
. = ABSOLUTE(hardcoded_kdata_size);
.patch_2 : {
LONG(kdata_end - kdata_start);
LONG(kdata_end - kdata_start);
}
 
. = ABSOLUTE(hardcoded_load_address);
.patch_3 : {
LONG(0x80000000);
LONG(0x80000000);
}
 
}
/SPARTAN/trunk/arch/ia32/boot/boot.ld
1,4 → 1,4
OUTPUT_FORMAT(binary)
SECTIONS {
.text 0x7c00 : AT (0x0) { *(.text) }
.text 0x7c00 : AT (0x0) { *(.text) }
}
/SPARTAN/trunk/arch/ia32/boot/boot.S
50,7 → 50,7
_start_0x7c00:
xorw %ax,%ax # reset, %al will be used below
movw %ax,%dx # fd0, %dh and %dl will be used below
movw %dx,%ds
movw %dx,%ds
 
movw %dx,%ss # initialize stack
movw $stack,%sp
58,7 → 58,7
int $0x13 # reset floppy
jc stop_trying
 
movw %dx,%ds
movw %dx,%ds
movw %dx,%ss
movw $0x7c00,%sp
movw $0xffe0,%si # after next increment, %si will become 0x0000
92,13 → 92,13
 
movw logical_sector,%ax
divb sectors
 
movb %ah,%cl
incb %cl # sector
incb %cl # sector
 
movb %al,%ch
shrb $1,%ch # track
 
movb %al,%dh
andb $1,%dh # head
 
126,11 → 126,11
push %bp
movw %sp,%bp
pusha
 
movb $0xe,%ah
movb $7,%bl
int $0x10
 
popa
pop %bp
ret
/SPARTAN/trunk/arch/ia32/include/cpu.h
42,10 → 42,10
#endif
 
struct cpu_arch {
int vendor;
int family;
int model;
int stepping;
int vendor;
int family;
int model;
int stepping;
struct tss *tss;
};
 
/SPARTAN/trunk/arch/ia32/src/ia32.c
55,7 → 55,7
if (config.cpu_active == 1) {
bios_init();
i8042_init(); /* a20 bit */
i8259_init(); /* PIC */
i8259_init(); /* PIC */
i8254_init(); /* hard clock */
 
trap_register(VECTOR_SYSCALL, syscall);
/SPARTAN/trunk/arch/ia32/src/fpu_context.c
78,6 → 78,6
void fpu_init(void)
{
asm(
"fninit;"
"fninit;"
);
}
/SPARTAN/trunk/arch/ia32/src/asm.s
95,12 → 95,12
 
push %ds
push %es
 
# we must fill the data segment registers
movw $16,%ax
movw %ax,%ds
movw %ax,%es
 
movl $(\i),%edi
pushl %ebp
addl $4,(%esp)
113,9 → 113,9
 
popa
pop %ebp
iret
 
iret
 
.if (\n-\i)-1
handler "(\i+1)",\n
.endif
179,11 → 179,11
push %ebp
movl %esp,%ebp
pusha
 
movl 8(%ebp),%edx
movl 12(%ebp),%eax
outb %al,%dx
 
popa
pop %ebp
ret
197,11 → 197,11
push %ebp
movl %esp,%ebp
pusha
 
movl 8(%ebp),%edx
movl 12(%ebp),%eax
outw %ax,%dx
 
popa
pop %ebp
ret
215,11 → 215,11
push %ebp
movl %esp,%ebp
pusha
 
movl 8(%ebp),%edx
movl 12(%ebp),%eax
outl %eax,%dx
 
popa
pop %ebp
ret
239,14 → 239,14
push %ebp
movl %esp,%ebp
pusha
 
cld
movl CNT(%ebp),%ecx
movl DST(%ebp),%edi
movl SRC(%ebp),%esi
movl SRC(%ebp),%esi
 
rep movsb %ds:(%esi),%es:(%edi)
 
popa
pop %ebp
ret
265,15 → 265,15
push %ebp
movl %esp,%ebp
pusha
 
cld
movl CNT(%ebp),%ecx
movl DST(%ebp),%edi
movl X(%ebp),%eax
 
rep stosb %al,%es:(%edi)
popa
 
popa
pop %ebp
ret
 
291,15 → 291,15
push %ebp
movl %esp,%ebp
pusha
 
cld
movl CNT(%ebp),%ecx
movl DST(%ebp),%edi
movl X(%ebp),%eax
 
rep stosw %ax,%es:(%edi)
popa
 
popa
pop %ebp
ret
 
320,12 → 320,12
movl %esp,%ebp
 
pusha
 
cld
movl CNT(%ebp),%ecx
movl DST(%ebp),%edi
movl SRC(%ebp),%esi
movl SRC(%ebp),%esi
 
repe cmpsb %es:(%edi),%ds:(%esi)
movl %ecx,(%ebp)
 
/SPARTAN/trunk/arch/ia32/src/context.s
42,7 → 42,7
 
movl 4(%esp),%eax # the caller's return %eip
movl 8(%esp),%ebx # address of the kernel_context variable to save context to
movl %eax,4(%ebx) # %eip -> ctx->pc
movl %eax,4(%ebx) # %eip -> ctx->pc
movl %esp,(%ebx) # %esp -> ctx->sp
 
movl %ebx,%eax
53,8 → 53,8
movl %edx,16(%eax)
movl %esi,20(%eax)
movl %edi,24(%eax)
movl %ebp,28(%eax)
movl %ebp,28(%eax)
 
xorl %eax,%eax # context_save returns 1
incl %eax
ret
64,7 → 64,7
#
# Restore CPU context from the kernel_context variable
# pointed by the 1st argument. Returns 0 in EAX.
#
#
context_restore:
movl 4(%esp),%eax # address of the kernel_context variable to restore context from
movl (%eax),%esp # ctx->sp -> %esp
79,5 → 79,5
 
movl 4(%eax),%eax
movl %eax,(%esp) # ctx->pc -> saver's return %eip
xorl %eax,%eax # context_restore returns 0
xorl %eax,%eax # context_restore returns 0
ret
/SPARTAN/trunk/arch/ia32/src/cpu/cpu.c
108,10 → 108,7
/*
* Check for AMD processor.
*/
if (info.cpuid_ebx==AMD_CPUID_EBX &&
info.cpuid_ecx==AMD_CPUID_ECX &&
info.cpuid_edx==AMD_CPUID_EDX) {
if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {
CPU->arch.vendor = VendorAMD;
}
 
118,12 → 115,8
/*
* Check for Intel processor.
*/
if (info.cpuid_ebx==INTEL_CPUID_EBX &&
info.cpuid_ecx==INTEL_CPUID_ECX &&
info.cpuid_edx==INTEL_CPUID_EDX) {
 
if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {
CPU->arch.vendor = VendorIntel;
 
}
cpuid(1, &info);
/SPARTAN/trunk/arch/ia32/src/pm.c
45,18 → 45,18
* whole memory. One is for code and one is for data.
*/
struct descriptor gdt[GDT_ITEMS] = {
/* NULL descriptor */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
/* KTEXT descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
/* KDATA descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
/* UTEXT descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
/* UDATA descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
/* TSS descriptor - set up will be completed later */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
/* NULL descriptor */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
/* KTEXT descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
/* KDATA descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
/* UTEXT descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
/* UDATA descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
/* TSS descriptor - set up will be completed later */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
};
 
static struct idescriptor idt[IDT_ITEMS];
71,16 → 71,15
 
void gdt_setbase(struct descriptor *d, __address base)
{
d->base_0_15 = base & 0xffff;
d->base_16_23 = ((base) >> 16) & 0xff;
d->base_24_31 = ((base) >> 24) & 0xff;
 
d->base_0_15 = base & 0xffff;
d->base_16_23 = ((base) >> 16) & 0xff;
d->base_24_31 = ((base) >> 24) & 0xff;
}
 
void gdt_setlimit(struct descriptor *d, __u32 limit)
{
d->limit_0_15 = limit & 0xffff;
d->limit_16_19 = (limit >> 16) & 0xf;
d->limit_0_15 = limit & 0xffff;
d->limit_16_19 = (limit >> 16) & 0xf;
}
 
void idt_setoffset(struct idescriptor *d, __address offset)
104,7 → 103,7
{
struct idescriptor *d;
int i;
 
for (i = 0; i < IDT_ITEMS; i++) {
d = &idt[i];
 
/SPARTAN/trunk/arch/ia32/src/smp/mps.c
243,9 → 243,9
l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
l_intr_entry_cnt++;
ct_l_intr_entry((struct __l_intr_entry *) cur);
cur += 8;
cur += 8;
break;
 
default:
/*
* Something is wrong. Fallback to UP mode.
/SPARTAN/trunk/arch/ia32/src/smp/apic.c
84,7 → 84,7
int pin;
if ((pin = mps_irq_to_pin(i)) != -1)
io_apic_change_ioredtbl(pin,0xf,IVT_IRQBASE+i,LOPRI);
io_apic_change_ioredtbl(pin,0xf,IVT_IRQBASE+i,LOPRI);
}
 
136,7 → 136,7
printf("Received Illegal Vector\n");
if ((esr>>7) & 1)
printf("Illegal Register Address\n");
 
return !esr;
}
 
/SPARTAN/trunk/arch/ia32/src/boot/boot.S
56,7 → 56,7
movw %ax,%gs
movw %ax,%fs
movw %ax,%ds # kernel data + stack
movw %ax,%ss
movw %ax,%ss
movl $0x7c00,%esp
 
lidt idtr
/SPARTAN/trunk/arch/ia32/src/proc/scheduler.c
34,5 → 34,5
void before_thread_runs_arch(void)
{
CPU->arch.tss->esp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-8];
CPU->arch.tss->ss0 = selector(KDATA_DES);
CPU->arch.tss->ss0 = selector(KDATA_DES);
}
/SPARTAN/trunk/arch/ia32/src/cpuid.s
83,7 → 83,7
movl %ebx,4(%esi)
movl %ecx,8(%esi)
movl %edx,12(%esi)
 
popa
popl %ebp
ret
/SPARTAN/trunk/arch/ia32/src/mm/frame.c
39,7 → 39,7
if (config.cpu_active == 1) {
frame_not_free(0x0);
 
frame_region_not_free(0xa0000,0xff000);
frame_region_not_free(0xfec00000,0xffffffff);
frame_region_not_free(0xa0000,0xff000);
frame_region_not_free(0xfec00000,0xffffffff);
}
}
/SPARTAN/trunk/arch/ia32/src/mm/page.c
56,7 → 56,7
if (config.cpu_active == 1) {
dba = frame_alloc(FRAME_KA | FRAME_PANIC);
memsetb(dba, PAGE_SIZE, 0);
 
bootstrap_dba = dba;
 
/*
/SPARTAN/trunk/arch/ia32/src/userspace.c
46,13 → 46,13
pri = cpu_priority_high();
 
__asm__ volatile (""
"pushl %0\n"
"pushl %1\n"
"pushl %2\n"
"pushl %3\n"
"pushl %4\n"
"iret"
: : "i" (selector(UDATA_DES) | PL_USER), "i" (USTACK_ADDRESS+(THREAD_STACK_SIZE-1)), "r" (pri), "i" (selector(UTEXT_DES) | PL_USER), "i" (UTEXT_ADDRESS));
"pushl %0\n"
"pushl %1\n"
"pushl %2\n"
"pushl %3\n"
"pushl %4\n"
"iret"
: : "i" (selector(UDATA_DES) | PL_USER), "i" (USTACK_ADDRESS+(THREAD_STACK_SIZE-1)), "r" (pri), "i" (selector(UTEXT_DES) | PL_USER), "i" (UTEXT_ADDRESS));
/* Unreachable */
for(;;);
/SPARTAN/trunk/arch/ia32/src/acpi/acpi.c
84,31 → 84,31
 
void acpi_init(void)
{
__u8 *addr[2] = { NULL, (__u8 *) 0xe0000 };
int i, j, length[2] = { 1024, 128*1024 };
__u8 *addr[2] = { NULL, (__u8 *) 0xe0000 };
int i, j, length[2] = { 1024, 128*1024 };
__u64 *sig = (__u64 *) RSDP_SIGNATURE;
 
/*
/*
* Find Root System Description Pointer
* 1. search first 1K of EBDA
* 2. search 128K starting at 0xe0000
*/
* 1. search first 1K of EBDA
* 2. search 128K starting at 0xe0000
*/
 
addr[0] = (__u8 *) ebda;
for (i = (ebda ? 0 : 1); i < 2; i++) {
for (j = 0; j < length[i]; j += 16) {
if (*((__u64 *) &addr[i][j]) == *sig && rsdp_check(&addr[i][j])) {
acpi_rsdp = (struct acpi_rsdp *) &addr[i][j];
goto rsdp_found;
}
}
}
for (j = 0; j < length[i]; j += 16) {
if (*((__u64 *) &addr[i][j]) == *sig && rsdp_check(&addr[i][j])) {
acpi_rsdp = (struct acpi_rsdp *) &addr[i][j];
goto rsdp_found;
}
}
}
 
return;
return;
 
rsdp_found:
printf("%L: ACPI Root System Description Pointer\n", acpi_rsdp);
printf("%L: ACPI Root System Description Pointer\n", acpi_rsdp);
 
acpi_rsdt = (struct acpi_rsdt *) acpi_rsdp->rsdt_address;
if (acpi_rsdp->revision) acpi_xsdt = (struct acpi_xsdt *) ((__address) acpi_rsdp->xsdt_address);
 
137,7 → 137,7
for (j=0; j<sizeof(signature_map)/sizeof(struct acpi_signature_map); j++) {
struct acpi_sdt_header *h = (struct acpi_sdt_header *) acpi_rsdt->entry[i];
map_sdt(h);
map_sdt(h);
if (*((__u32 *) &h->signature[0])==*((__u32 *) &signature_map[j].signature[0])) {
if (!acpi_sdt_check((__u8 *) h))
goto next;
/SPARTAN/trunk/arch/ia32/src/interrupt.c
97,13 → 97,12
void nm_fault(__u8 n, __u32 stack[])
{
reset_TS_flag();
if ((CPU->fpu_owner)!=NULL)
{
fpu_lazy_context_save(&((CPU->fpu_owner)->saved_fpu_context));
if ((CPU->fpu_owner)!=NULL) {
fpu_lazy_context_save(&((CPU->fpu_owner)->saved_fpu_context));
(CPU->fpu_owner)->fpu_context_engaged=0; /* don't prevent migration */
}
if(THREAD->fpu_context_exists) fpu_lazy_context_restore(&(THREAD->saved_fpu_context));
else {fpu_init();THREAD->fpu_context_exists=1;}
else {fpu_init();THREAD->fpu_context_exists=1;}
CPU->fpu_owner=THREAD;
}
 
/SPARTAN/trunk/arch/ia32/src/drivers/i8259.c
44,23 → 44,23
 
/* ICW2: IRQ 0 maps to INT IRQBASE */
outb(PIC_PIC0PORT2, IVT_IRQBASE);
 
/* ICW3: pic1 using IRQ IRQ_PIC1 */
outb(PIC_PIC0PORT2, 1 << IRQ_PIC1);
/* ICW4: i8086 mode */
 
/* ICW4: i8086 mode */
outb(PIC_PIC0PORT2, 1);
 
/* ICW1: ICW1, ICW4 to follow */
outb(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4);
 
/* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
/* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
outb(PIC_PIC1PORT2, IVT_IRQBASE + 8);
 
/* ICW3: pic1 is known as PIC_PIC1ID */
outb(PIC_PIC1PORT2, PIC_PIC1ID);
 
/* ICW4: i8086 mode */
/* ICW4: i8086 mode */
outb(PIC_PIC1PORT2, 1);
 
/*
75,7 → 75,7
enable_irqs_function = pic_enable_irqs;
disable_irqs_function = pic_disable_irqs;
eoi_function = pic_eoi;
 
pic_disable_irqs(0xffff); /* disable all irq's */
pic_enable_irqs(1<<IRQ_PIC1); /* but enable pic1 */
}
83,13 → 83,13
void pic_enable_irqs(__u16 irqmask)
{
__u8 x;
 
if (irqmask & 0xff) {
x = inb(PIC_PIC0PORT2);
x = inb(PIC_PIC0PORT2);
outb(PIC_PIC0PORT2, x & (~(irqmask & 0xff)));
}
if (irqmask >> 8) {
x = inb(PIC_PIC1PORT2);
x = inb(PIC_PIC1PORT2);
outb(PIC_PIC1PORT2, x & (~(irqmask >> 8)));
}
}
97,13 → 97,13
void pic_disable_irqs(__u16 irqmask)
{
__u8 x;
 
if (irqmask & 0xff) {
x = inb(PIC_PIC0PORT2);
x = inb(PIC_PIC0PORT2);
outb(PIC_PIC0PORT2, x | (irqmask & 0xff));
}
if (irqmask >> 8) {
x = inb(PIC_PIC1PORT2);
x = inb(PIC_PIC1PORT2);
outb(PIC_PIC1PORT2, x | (irqmask >> 8));
}
}
111,7 → 111,7
void pic_eoi(void)
{
outb(0x20,0x20);
outb(0xa0,0x20);
outb(0xa0,0x20);
}
 
void pic_spurious(__u8 n, __u32 stack[])
/SPARTAN/trunk/arch/ia32/src/drivers/i8254.c
83,7 → 83,7
outb(CLK_PORT1, 0xff);
 
do {
/* will read both status and count */
/* will read both status and count */
outb(CLK_PORT4, 0xc2);
not_ok = (inb(CLK_PORT1)>>6)&1;
t1 = inb(CLK_PORT1);
109,11 → 109,8
o2 = inb(CLK_PORT1);
o2 |= inb(CLK_PORT1) << 8;
 
CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) + (((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0);
 
CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) +
(((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0);
 
clk1 = rdtsc();
delay(1<<SHIFT);
clk2 = rdtsc();
/SPARTAN/trunk/arch/ia32/src/drivers/ega.c
69,7 → 69,7
void ega_check_cursor(void)
{
if (ega_cursor < SCREEN)
return;
return;
 
memcopy(PA2KA(VIDEORAM) + ROW*2, PA2KA(VIDEORAM), (SCREEN - ROW)*2);
memsetw(PA2KA(VIDEORAM) + (SCREEN - ROW)*2, ROW, 0x0720);
85,19 → 85,19
 
switch (ch) {
case '\n':
ega_cursor = (ega_cursor + ROW) - ega_cursor % ROW;
break;
ega_cursor = (ega_cursor + ROW) - ega_cursor % ROW;
break;
case '\t':
ega_cursor = (ega_cursor + 8) - ega_cursor % 8;
break;
ega_cursor = (ega_cursor + 8) - ega_cursor % 8;
break;
default:
ega_display_char(ch);
ega_cursor++;
break;
ega_display_char(ch);
ega_cursor++;
break;
}
ega_check_cursor();
ega_move_cursor();
 
spinlock_unlock(&egalock);
cpu_priority_restore(pri);
}