| /uspace/trunk/uspace.config |
|---|
| 27,3 → 27,7 |
| @ "native" Native |
| ! [ARCH=ppc64] PPC64_COMPILER (choice) |
| % [ARCH=ppc64] SAVEAS PPC64_COMPILER COMPILER |
| # MIPS FPU support |
| ! [ARCH=mips32|ARCH=mips32eb] CONFIG_MIPS_FPU (n/y) |
| /uspace/trunk/libc/arch/mips32/include/context_offset.h |
|---|
| 14,6 → 14,18 |
| #define OFFSET_GP 0x2c |
| #define OFFSET_TLS 0x30 |
| #define OFFSET_F20 0x34 |
| #define OFFSET_F21 0x38 |
| #define OFFSET_F22 0x3c |
| #define OFFSET_F23 0x40 |
| #define OFFSET_F24 0x44 |
| #define OFFSET_F25 0x48 |
| #define OFFSET_F26 0x4c |
| #define OFFSET_F27 0x50 |
| #define OFFSET_F28 0x54 |
| #define OFFSET_F29 0x58 |
| #define OFFSET_F30 0x5c |
| /** @} |
| */ |
| /uspace/trunk/libc/arch/mips32/include/psthread.h |
|---|
| 69,6 → 69,19 |
| uint32_t s8; |
| uint32_t gp; |
| uint32_t tls; /* Thread local storage(=k1) */ |
| uint32_t f20; |
| uint32_t f21; |
| uint32_t f22; |
| uint32_t f23; |
| uint32_t f24; |
| uint32_t f25; |
| uint32_t f26; |
| uint32_t f27; |
| uint32_t f28; |
| uint32_t f29; |
| uint32_t f30; |
| } context_t; |
| #endif |
| /uspace/trunk/libc/arch/mips32/Makefile.inc |
|---|
| 33,9 → 33,15 |
| TOOLCHAIN_DIR = /usr/local/mipsel/bin |
| CFLAGS += -mips3 |
| -include ../Makefile.config |
| ifeq ($(CONFIG_MIPS_FPU),y) |
| CFLAGS += -DCONFIG_MIPS_FPU |
| endif |
| ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \ |
| arch/$(ARCH)/src/psthread.S \ |
| arch/$(ARCH)/src/thread.c |
| BFD_ARCH = mips |
| BFD_NAME = elf32-little |
| /uspace/trunk/libc/arch/mips32/src/entry.s |
|---|
| 60,6 → 60,7 |
| jal __exit |
| nop |
| .end |
| .ent __entry_driver |
| __entry_driver: |
| 82,7 → 83,7 |
| jal __exit |
| nop |
| .end |
| # Alignment of output section data to 0x4000 |
| .section .data |
| .align 14 |
| /uspace/trunk/libc/arch/mips32/src/psthread.S |
|---|
| 37,7 → 37,7 |
| .global context_save |
| .global context_restore |
| .macro CONTEXT_STORE r |
| sw $s0,OFFSET_S0(\r) |
| sw $s1,OFFSET_S1(\r) |
| 50,7 → 50,42 |
| sw $s8,OFFSET_S8(\r) |
| sw $gp,OFFSET_GP(\r) |
| sw $k1,OFFSET_TLS(\r) |
| #ifdef CONFIG_MIPS_FPU |
| mfc1 $t0,$20 |
| sw $t0, OFFSET_F20(\r) |
| mfc1 $t0,$21 |
| sw $t0, OFFSET_F21(\r) |
| mfc1 $t0,$22 |
| sw $t0, OFFSET_F22(\r) |
| mfc1 $t0,$23 |
| sw $t0, OFFSET_F23(\r) |
| mfc1 $t0,$24 |
| sw $t0, OFFSET_F24(\r) |
| mfc1 $t0,$25 |
| sw $t0, OFFSET_F25(\r) |
| mfc1 $t0,$26 |
| sw $t0, OFFSET_F26(\r) |
| mfc1 $t0,$27 |
| sw $t0, OFFSET_F27(\r) |
| mfc1 $t0,$28 |
| sw $t0, OFFSET_F28(\r) |
| mfc1 $t0,$29 |
| sw $t0, OFFSET_F29(\r) |
| mfc1 $t0,$30 |
| sw $t0, OFFSET_F30(\r) |
| #endif |
| sw $ra,OFFSET_PC(\r) |
| sw $sp,OFFSET_SP(\r) |
| .endm |
| 67,7 → 102,42 |
| lw $s8,OFFSET_S8(\r) |
| lw $gp,OFFSET_GP(\r) |
| lw $k1,OFFSET_TLS(\r) |
| #ifdef CONFIG_MIPS_FPU |
| lw $t0, OFFSET_F20(\r) |
| mtc1 $t0,$20 |
| lw $t0, OFFSET_F21(\r) |
| mtc1 $t0,$21 |
| lw $t0, OFFSET_F22(\r) |
| mtc1 $t0,$22 |
| lw $t0, OFFSET_F23(\r) |
| mtc1 $t0,$23 |
| lw $t0, OFFSET_F24(\r) |
| mtc1 $t0,$24 |
| lw $t0, OFFSET_F25(\r) |
| mtc1 $t0,$25 |
| lw $t0, OFFSET_F26(\r) |
| mtc1 $t0,$26 |
| lw $t0, OFFSET_F27(\r) |
| mtc1 $t0,$27 |
| lw $t0, OFFSET_F28(\r) |
| mtc1 $t0,$28 |
| lw $t0, OFFSET_F29(\r) |
| mtc1 $t0,$29 |
| lw $t0, OFFSET_F30(\r) |
| mtc1 $t0,$30 |
| #endif |
| lw $ra,OFFSET_PC(\r) |
| lw $sp,OFFSET_SP(\r) |
| .endm |
| /uspace/trunk/Makefile |
|---|
| 51,6 → 51,8 |
| DIRS += pci |
| endif |
| CFLAGS += -DCONFIG_MIPS_FPU |
| BUILDS := $(addsuffix .build,$(DIRS)) |
| CLEANS := $(addsuffix .clean,$(DIRS)) |