| /kernel/trunk/arch/sparc64/include/trap/exception.h |
|---|
| 31,11 → 31,13 |
| #define TT_INSTRUCTION_ACCESS_EXCEPTION 0x08 |
| #define TT_ILLEGAL_INSTRUCTION 0x10 |
| #define TT_DATA_ACCESS_ERROR 0x32 |
| #define TT_MEM_ADDRESS_NOT_ALIGNED 0x34 |
| #ifndef __ASM__ |
| extern void do_instruction_access_exc(void); |
| extern void do_mem_address_not_aligned(void); |
| extern void do_data_access_error(void); |
| extern void do_illegal_instruction(void); |
| #endif /* !__ASM__ */ |
| /kernel/trunk/arch/sparc64/include/mm/tlb.h |
|---|
| 405,4 → 405,6 |
| extern void fast_data_access_mmu_miss(void); |
| extern void fast_data_access_protection(void); |
| extern void dtlb_insert_mapping(__address page, __address frame, int pagesize, bool locked, bool cacheable); |
| #endif |
| /kernel/trunk/arch/sparc64/include/drivers/i8042.h |
|---|
| 32,7 → 32,7 |
| #include <arch/types.h> |
| #define KBD_PHYS_ADDRESS 0x1fff8904000ULL |
| #define KBD_VIRT_ADDRESS 0x00000d00000ULL |
| #define KBD_VIRT_ADDRESS 0x000d0000000ULL |
| #define STATUS_REG 4 |
| #define COMMAND_REG 4 |
| 40,7 → 40,7 |
| static inline void i8042_data_write(__u8 data) |
| { |
| ((__u8 *)(KBD_VIRT_ADDRESS))[DATA_REG] = data; |
| ((volatile __u8 *)(KBD_VIRT_ADDRESS))[DATA_REG] = data; |
| } |
| static inline __u8 i8042_data_read(void) |
| 55,7 → 55,7 |
| static inline void i8042_command_write(__u8 command) |
| { |
| ((__u8 *)(KBD_VIRT_ADDRESS))[COMMAND_REG] = command; |
| ((volatile __u8 *)(KBD_VIRT_ADDRESS))[COMMAND_REG] = command; |
| } |
| #endif |