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Ignore whitespace Rev 1762 → Rev 1780

/kernel/trunk/arch/ppc32/src/ddi/ddi.c
47,7 → 47,7
*
* @return 0 on success or an error code from errno.h.
*/
int ddi_iospace_enable_arch(task_t *task, __address ioaddr, size_t size)
int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size)
{
return 0;
}
/kernel/trunk/arch/ppc32/src/ppc32.c
50,7 → 50,7
/* Setup usermode */
init.cnt = bootinfo.taskmap.count;
__u32 i;
uint32_t i;
for (i = 0; i < bootinfo.taskmap.count; i++) {
init.tasks[i].addr = PA2KA(bootinfo.taskmap.tasks[i].addr);
97,7 → 97,7
 
void userspace(uspace_arg_t *kernel_uarg)
{
userspace_asm((__address) kernel_uarg->uspace_uarg, (__address) kernel_uarg->uspace_stack + THREAD_STACK_SIZE - SP_DELTA, (__address) kernel_uarg->uspace_entry);
userspace_asm((uintptr_t) kernel_uarg->uspace_uarg, (uintptr_t) kernel_uarg->uspace_stack + THREAD_STACK_SIZE - SP_DELTA, (uintptr_t) kernel_uarg->uspace_entry);
/* Unreachable */
for (;;)
/kernel/trunk/arch/ppc32/src/mm/tlb.c
56,7 → 56,7
* @return PTE on success, NULL otherwise.
*
*/
static pte_t *find_mapping_and_check(as_t *as, bool lock, __address badvaddr, int access, istate_t *istate, int *pfrc)
static pte_t *find_mapping_and_check(as_t *as, bool lock, uintptr_t badvaddr, int access, istate_t *istate, int *pfrc)
{
/*
* Check if the mapping exists in page tables.
103,7 → 103,7
}
 
 
static void pht_refill_fail(__address badvaddr, istate_t *istate)
static void pht_refill_fail(uintptr_t badvaddr, istate_t *istate)
{
char *symbol = "";
char *sym2 = "";
118,12 → 118,12
}
 
 
static void pht_insert(const __address vaddr, const pfn_t pfn)
static void pht_insert(const uintptr_t vaddr, const pfn_t pfn)
{
__u32 page = (vaddr >> 12) & 0xffff;
__u32 api = (vaddr >> 22) & 0x3f;
uint32_t page = (vaddr >> 12) & 0xffff;
uint32_t api = (vaddr >> 22) & 0x3f;
__u32 vsid;
uint32_t vsid;
asm volatile (
"mfsrin %0, %1\n"
: "=r" (vsid)
130,7 → 130,7
: "r" (vaddr)
);
__u32 sdr1;
uint32_t sdr1;
asm volatile (
"mfsdr1 %0\n"
: "=r" (sdr1)
138,10 → 138,10
phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
/* Primary hash (xor) */
__u32 h = 0;
__u32 hash = vsid ^ page;
__u32 base = (hash & 0x3ff) << 3;
__u32 i;
uint32_t h = 0;
uint32_t hash = vsid ^ page;
uint32_t base = (hash & 0x3ff) << 3;
uint32_t i;
bool found = false;
/* Find unused or colliding
155,7 → 155,7
if (!found) {
/* Secondary hash (not) */
__u32 base2 = (~hash & 0x3ff) << 3;
uint32_t base2 = (~hash & 0x3ff) << 3;
/* Find unused or colliding
PTE in PTEG */
185,12 → 185,12
}
 
 
static void pht_real_insert(const __address vaddr, const pfn_t pfn)
static void pht_real_insert(const uintptr_t vaddr, const pfn_t pfn)
{
__u32 page = (vaddr >> 12) & 0xffff;
__u32 api = (vaddr >> 22) & 0x3f;
uint32_t page = (vaddr >> 12) & 0xffff;
uint32_t api = (vaddr >> 22) & 0x3f;
__u32 vsid;
uint32_t vsid;
asm volatile (
"mfsrin %0, %1\n"
: "=r" (vsid)
197,7 → 197,7
: "r" (vaddr)
);
__u32 sdr1;
uint32_t sdr1;
asm volatile (
"mfsdr1 %0\n"
: "=r" (sdr1)
205,10 → 205,10
phte_t *phte_physical = (phte_t *) (sdr1 & 0xffff0000);
/* Primary hash (xor) */
__u32 h = 0;
__u32 hash = vsid ^ page;
__u32 base = (hash & 0x3ff) << 3;
__u32 i;
uint32_t h = 0;
uint32_t hash = vsid ^ page;
uint32_t base = (hash & 0x3ff) << 3;
uint32_t i;
bool found = false;
/* Find unused or colliding
222,7 → 222,7
if (!found) {
/* Secondary hash (not) */
__u32 base2 = (~hash & 0x3ff) << 3;
uint32_t base2 = (~hash & 0x3ff) << 3;
/* Find unused or colliding
PTE in PTEG */
260,7 → 260,7
*/
void pht_refill(int n, istate_t *istate)
{
__address badvaddr;
uintptr_t badvaddr;
pte_t *pte;
int pfrc;
as_t *as;
322,7 → 322,7
*/
bool pht_real_refill(int n, istate_t *istate)
{
__address badvaddr;
uintptr_t badvaddr;
if (n == VECTOR_DATA_STORAGE) {
asm volatile (
332,7 → 332,7
} else
badvaddr = istate->pc;
__u32 physmem;
uint32_t physmem;
asm volatile (
"mfsprg3 %0\n"
: "=r" (physmem)
364,7 → 364,7
 
void tlb_invalidate_asid(asid_t asid)
{
__u32 sdr1;
uint32_t sdr1;
asm volatile (
"mfsdr1 %0\n"
: "=r" (sdr1)
371,7 → 371,7
);
phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
__u32 i;
uint32_t i;
for (i = 0; i < 8192; i++) {
if ((phte[i].v) && (phte[i].vsid >= (asid << 4)) && (phte[i].vsid < ((asid << 4) + 16)))
phte[i].v = 0;
380,7 → 380,7
}
 
 
void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt)
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
{
// TODO
tlb_invalidate_all();
395,7 → 395,7
); \
mask = (upper & 0x1ffc) >> 2; \
if (upper & 3) { \
__u32 tmp = mask; \
uint32_t tmp = mask; \
length = 128; \
while (tmp) { \
if ((tmp & 1) == 0) { \
412,10 → 412,10
 
void tlb_print(void)
{
__u32 sr;
uint32_t sr;
for (sr = 0; sr < 16; sr++) {
__u32 vsid;
uint32_t vsid;
asm volatile (
"mfsrin %0, %1\n"
: "=r" (vsid)
424,10 → 424,10
printf("vsid[%d]: VSID=%.*p (ASID=%d)%s%s\n", sr, sizeof(vsid) * 2, vsid & 0xffffff, (vsid & 0xffffff) >> 4, ((vsid >> 30) & 1) ? " supervisor" : "", ((vsid >> 29) & 1) ? " user" : "");
}
__u32 upper;
__u32 lower;
__u32 mask;
__u32 length;
uint32_t upper;
uint32_t lower;
uint32_t mask;
uint32_t length;
PRINT_BAT("ibat[0]", 528, 529);
PRINT_BAT("ibat[1]", 530, 531);
/kernel/trunk/arch/ppc32/src/mm/as.c
55,7 → 55,7
{
asid_t asid;
ipl_t ipl;
__u32 sr;
uint32_t sr;
 
ipl = interrupts_disable();
spinlock_lock(&as->lock);
/kernel/trunk/arch/ppc32/src/mm/frame.c
39,7 → 39,7
#include <align.h>
#include <macros.h>
 
__address last_frame = 0;
uintptr_t last_frame = 0;
 
void frame_arch_init(void)
{
67,7 → 67,7
frame_mark_unavailable(0, 8);
/* Mark the Page Hash Table frames as unavailable */
__u32 sdr1;
uint32_t sdr1;
asm volatile (
"mfsdr1 %0\n"
: "=r" (sdr1)
/kernel/trunk/arch/ppc32/src/mm/page.c
45,12 → 45,12
}
 
 
__address hw_map(__address physaddr, size_t size)
uintptr_t hw_map(uintptr_t physaddr, size_t size)
{
if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
panic("Unable to map physical memory %p (%d bytes)", physaddr, size)
__address virtaddr = PA2KA(last_frame);
uintptr_t virtaddr = PA2KA(last_frame);
pfn_t i;
for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)
page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE);
/kernel/trunk/arch/ppc32/src/interrupt.c
88,7 → 88,7
 
 
/* Reregister irq to be IPC-ready */
void irq_ipc_bind_arch(__native irq)
void irq_ipc_bind_arch(unative_t irq)
{
int_register(irq, "ipc_int", ipc_int);
}
/kernel/trunk/arch/ppc32/src/drivers/pic.c
38,11 → 38,11
#include <byteorder.h>
#include <bitops.h>
 
static volatile __u32 *pic;
static volatile uint32_t *pic;
 
void pic_init(__address base, size_t size)
void pic_init(uintptr_t base, size_t size)
{
pic = (__u32 *) hw_map(base, size);
pic = (uint32_t *) hw_map(base, size);
}
 
 
/kernel/trunk/arch/ppc32/src/drivers/cuda.c
59,7 → 59,7
#define TIP 0x20
 
 
static volatile __u8 *cuda = NULL;
static volatile uint8_t *cuda = NULL;
static iroutine vector;
 
 
190,10 → 190,10
};
 
 
void send_packet(const __u8 kind, index_t count, ...);
void send_packet(const uint8_t kind, index_t count, ...);
 
 
static void receive_packet(__u8 *kind, index_t count, __u8 data[])
static void receive_packet(uint8_t *kind, index_t count, uint8_t data[])
{
cuda[B] = cuda[B] & ~TIP;
*kind = cuda[SR];
237,8 → 237,8
 
int cuda_get_scancode(void)
{
__u8 kind;
__u8 data[4];
uint8_t kind;
uint8_t data[4];
receive_packet(&kind, 4, data);
253,7 → 253,7
int scan_code = cuda_get_scancode();
if (scan_code != -1) {
__u8 scancode = (__u8) scan_code;
uint8_t scancode = (uint8_t) scan_code;
if ((scancode & 0x80) != 0x80)
chardev_push_character(&kbrd, lchars[scancode & 0x7f]);
}
275,9 → 275,9
}
 
 
void cuda_init(__address base, size_t size)
void cuda_init(uintptr_t base, size_t size)
{
cuda = (__u8 *) hw_map(base, size);
cuda = (uint8_t *) hw_map(base, size);
int_register(CUDA_IRQ, "cuda", cuda_irq);
pic_enable_interrupt(CUDA_IRQ);
290,7 → 290,7
}
 
 
void send_packet(const __u8 kind, index_t count, ...)
void send_packet(const uint8_t kind, index_t count, ...)
{
index_t i;
va_list va;