| 27,8 → 27,14 |
|---|
| */ |
| |
| #include <arch/mm/as.h> |
| #include <arch/mm/asid.h> |
| #include <arch/mm/page.h> |
| #include <genarch/mm/as_ht.h> |
| #include <genarch/mm/asid_fifo.h> |
| #include <mm/asid.h> |
| #include <arch.h> |
| #include <arch/barrier.h> |
| #include <synch/spinlock.h> |
| |
| /** Architecture dependent address space init. */ |
| void as_arch_init(void) |
| 36,3 → 42,39 |
|---|
| as_operations = &as_ht_operations; |
| asid_fifo_init(); |
| } |
| |
| /** Prepare registers for switching to another address space. |
| * |
| * @param as Address space. |
| */ |
| void as_install_arch(as_t *as) |
| { |
| ipl_t ipl; |
| region_register rr; |
| int i; |
| |
| ipl = interrupts_disable(); |
| spinlock_lock(&as->lock); |
| |
| ASSERT(as->asid != ASID_INVALID); |
| |
| /* |
| * Load respective ASID (7 consecutive RIDs) to |
| * region registers. |
| */ |
| for (i = 0; i < REGION_REGISTERS; i++) { |
| if (i == VRN_KERNEL) |
| continue; |
| |
| rr.word = rr_read(i); |
| rr.map.ve = false; /* disable VHPT walker */ |
| rr.map.rid = ASID2RID(as->asid, i); |
| rr.map.ps = PAGE_WIDTH; |
| rr_write(i, rr.word); |
| } |
| srlz_d(); |
| srlz_i(); |
| |
| spinlock_unlock(&as->lock); |
| interrupts_restore(ipl); |
| } |