| /kernel/trunk/arch/ia32/include/interrupt.h |
|---|
| 53,6 → 53,7 |
| #error Wrong definition of VECTOR_APIC_SPUR |
| #endif |
| #define VECTOR_DEBUG 1 |
| #define VECTOR_PIC_SPUR (IVT_IRQBASE+IRQ_PIC_SPUR) |
| #define VECTOR_CLK (IVT_IRQBASE+IRQ_CLK) |
| #define VECTOR_KBD (IVT_IRQBASE+IRQ_KBD) |
| /kernel/trunk/arch/ia32/include/asm.h |
|---|
| 53,30 → 53,37 |
| static inline void cpu_halt(void) { __asm__("hlt\n"); }; |
| static inline void cpu_sleep(void) { __asm__("hlt\n"); }; |
| /** Read CR2 |
| * |
| * Return value in CR2 |
| * |
| * @return Value read. |
| */ |
| static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0\n" : "=r" (v)); return v; } |
| #define GEN_READ_REG(reg) static inline __native read_ ##reg (void) \ |
| { \ |
| __native res; \ |
| __asm__ volatile ("movl %%" #reg ", %0" : "=r" (res) ); \ |
| return res; \ |
| } |
| /** Write CR3 |
| * |
| * Write value to CR3. |
| * |
| * @param v Value to be written. |
| */ |
| static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); } |
| #define GEN_WRITE_REG(reg) static inline void write_ ##reg (__native regn) \ |
| { \ |
| __asm__ volatile ("movl %0, %%" #reg : : "r" (regn)); \ |
| } |
| /** Read CR3 |
| * |
| * Return value in CR3 |
| * |
| * @return Value read. |
| */ |
| static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0\n" : "=r" (v)); return v; } |
| GEN_READ_REG(cr0); |
| GEN_READ_REG(cr2); |
| GEN_READ_REG(cr3); |
| GEN_WRITE_REG(cr3); |
| GEN_READ_REG(dr0); |
| GEN_READ_REG(dr1); |
| GEN_READ_REG(dr2); |
| GEN_READ_REG(dr3); |
| GEN_READ_REG(dr6); |
| GEN_READ_REG(dr7); |
| GEN_WRITE_REG(dr0); |
| GEN_WRITE_REG(dr1); |
| GEN_WRITE_REG(dr2); |
| GEN_WRITE_REG(dr3); |
| GEN_WRITE_REG(dr6); |
| GEN_WRITE_REG(dr7); |
| /** Byte to port |
| * |
| * Output byte to port |
| /kernel/trunk/arch/ia32/include/debugger.h |
|---|
| 0,0 → 1,0 |
| link ../../amd64/include/debugger.h |
| Property changes: |
| Added: svn:special |
| +* |
| \ No newline at end of property |
| /kernel/trunk/arch/ia32/include/cpu.h |
|---|
| 33,6 → 33,8 |
| #include <arch/pm.h> |
| #include <arch/asm.h> |
| #define EFLAGS_RF (1 << 16) |
| struct cpu_arch { |
| int vendor; |
| int family; |
| /kernel/trunk/arch/ia32/Makefile.inc |
|---|
| 128,4 → 128,5 |
| arch/$(ARCH)/src/drivers/i8259.c \ |
| arch/$(ARCH)/src/drivers/ega.c \ |
| arch/$(ARCH)/src/boot/boot.S \ |
| arch/$(ARCH)/src/fpu_context.c |
| arch/$(ARCH)/src/fpu_context.c \ |
| arch/$(ARCH)/src/debugger.c |
| /kernel/trunk/arch/ia32/src/ia32.c |
|---|
| 50,6 → 50,7 |
| #include <arch/mm/memory_init.h> |
| #include <interrupt.h> |
| #include <arch/debugger.h> |
| void arch_pre_mm_init(void) |
| { |
| 73,6 → 74,8 |
| { |
| if (config.cpu_active == 1) { |
| ega_init(); /* video */ |
| /* Enable debugger */ |
| debugger_init(); |
| } |
| } |
| /kernel/trunk/arch/ia32/src/proc/scheduler.c |
|---|
| 31,11 → 31,22 |
| #include <proc/thread.h> |
| #include <arch.h> |
| #include <arch/context.h> /* SP_DELTA */ |
| #include <arch/debugger.h> |
| void before_thread_runs_arch(void) |
| { |
| CPU->arch.tss->esp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; |
| CPU->arch.tss->ss0 = selector(KDATA_DES); |
| #ifdef CONFIG_DEBUG_AS_WATCHPOINT |
| /* Set watchpoint on AS to ensure that nobody sets it to zero */ |
| static int old_slot = -1; |
| if (old_slot >=0) |
| breakpoint_del(old_slot); |
| old_slot = breakpoint_add(&((the_t *) THREAD->kstack)->as, |
| BKPOINT_WRITE | BKPOINT_CHECK_ZERO); |
| #endif |
| } |
| void after_thread_ran_arch(void) |
| /kernel/trunk/arch/ia32/src/debugger.c |
|---|
| 0,0 → 1,0 |
| link ../../amd64/src/debugger.c |
| Property changes: |
| Added: svn:special |
| +* |
| \ No newline at end of property |