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Compare Revisions

• This comparison shows the changes necessary to convert path

  → /kernel/trunk/arch/amd64/ @ 1111

  → /kernel/trunk/arch/amd64/ @ 1112

  ↔ Reverse comparison

• Compare Path:	Rev

  With Path:	Rev

Ignore whitespace Rev 1111 → Rev 1112

/kernel/trunk/arch/amd64/include/thread.h
29,6 → 29,6
#ifndef __amd64_THREAD_H__
#define __amd64_THREAD_H__
#define ARCH_THREAD_DATA
#define ARCH_THREAD_DATA __native tls;
#endif

/kernel/trunk/arch/amd64/include/cpu.h
42,6 → 42,7
#define AMD_MSR_STAR 0xc0000081
#define AMD_MSR_LSTAR 0xc0000082
#define AMD_MSR_SFMASK 0xc0000084
#define AMD_MSR_FS 0xc0000100
#define AMD_MSR_GS 0xc0000101
#ifndef __ASM__

/kernel/trunk/arch/amd64/src/amd64.c
32,6 → 32,7
#include <config.h>
#include <proc/thread.h>
#include <arch/ega.h>
#include <genarch/i8042/i8042.h>
#include <arch/i8254.h>
47,7 → 48,9
#include <interrupt.h>
#include <arch/syscall.h>
#include <arch/debugger.h>
#include <syscall/syscall.h>
/** Disable I/O on non-privileged levels
*
* Clean IOPL(12,13) and NT(14) flags in EFLAGS register
159,3 → 162,18
i8254_calibrate_delay_loop();
i8254_normal_operation();
}
/** Set Thread-local-storeage pointer
*
* TLS pointer is set in FS register. Unfortunately the 64-bit
* part can be set only in CPL0 mode.
*
* The specs says, that on %fs:0 there is stored contents of %fs register,
* we need not to go to CPL0 to read it.
*/
__native sys_tls_set(__native addr)
{
THREAD->tls = addr;
write_msr(AMD_MSR_FS, addr);
return 0;
}

/kernel/trunk/arch/amd64/src/proc/scheduler.c
45,6 → 45,9
(__u64)&THREAD->kstack);
swapgs();
/* TLS support - set FS to thread local storage */
write_msr(AMD_MSR_FS, THREAD->tls);
#ifdef CONFIG_DEBUG_AS_WATCHPOINT
/* Set watchpoint on AS to ensure that nobody sets it to zero */
if (CPU->id < BKPOINTS_MAX)