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Compare Revisions

• This comparison shows the changes necessary to convert path

  → /kernel/trunk/arch/ @ 1707

  → /kernel/trunk/arch/ @ 1708

  ↔ Reverse comparison

• Compare Path:	Rev

  With Path:	Rev

Ignore whitespace Rev 1707 → Rev 1708

/kernel/trunk/arch/sparc64/include/asm.h
55,7 → 55,7
/** Write Processor State register.
*
* @param New value of PSTATE register.
* @param v New value of PSTATE register.
*/
static inline void pstate_write(__u64 v)
{
77,7 → 77,7
/** Write TICK_compare Register.
*
* @param New value of TICK_comapre register.
* @param v New value of TICK_comapre register.
*/
static inline void tick_compare_write(__u64 v)
{
99,7 → 99,7
/** Write TICK Register.
*
* @param New value of TICK register.
* @param v New value of TICK register.
*/
static inline void tick_write(__u64 v)
{
121,7 → 121,7
/** Write SOFTINT Register.
*
* @param New value of SOFTINT register.
* @param v New value of SOFTINT register.
*/
static inline void softint_write(__u64 v)
{
132,7 → 132,7
*
* Bits set in CLEAR_SOFTINT register will be cleared in SOFTINT register.
*
* @param New value of CLEAR_SOFTINT register.
* @param v New value of CLEAR_SOFTINT register.
*/
static inline void clear_softint_write(__u64 v)
{
270,7 → 270,7
/** Write Trap Base Address register.
*
* @param New value of TBA.
* @param v New value of TBA.
*/
static inline void tba_write(__u64 v)
{

/kernel/trunk/arch/ia64/include/faddr.h
42,7 → 42,7
* Calculate absolute address of function
* referenced by fptr pointer.
*
* @param fptr Function pointer.
* @param f Function pointer.
*
*/
#define FADDR(f) (*((__address *)(f)));

/kernel/trunk/arch/ia64/include/asm.h
82,7 → 82,7
/** Write IVA (Interruption Vector Address) register.
*
* @param New location of interruption vector table.
* @param v New location of interruption vector table.
*/
static inline void iva_write(__u64 v)
{
105,7 → 105,7
/** Write ITC (Interval Timer Counter) register.
*
* @param New counter value.
* @param v New counter value.
*/
static inline void itc_write(__u64 v)
{
127,7 → 127,7
/** Write ITM (Interval Timer Match) register.
*
* @param New match value.
* @param v New match value.
*/
static inline void itm_write(__u64 v)
{
162,7 → 162,7
/** Write ITV (Interval Timer Vector) register.
*
* @param New vector and mask bit.
* @param v New vector and mask bit.
*/
static inline void itv_write(__u64 v)
{
171,7 → 171,7
/** Write EOI (End Of Interrupt) register.
*
* @param This value is ignored.
* @param v This value is ignored.
*/
static inline void eoi_write(__u64 v)
{
193,7 → 193,7
/** Write TPR (Task Priority Register).
*
* @param New value of TPR.
* @param v New value of TPR.
*/
static inline void tpr_write(__u64 v)
{

/kernel/trunk/arch/ia64/src/mm/tlb.c
297,7 → 297,7
* @param va Virtual page address.
* @param asid Address space identifier.
* @param entry The rest of TLB entry as required by TLB insertion format.
* @param dtc If true, insert into data translation register, use instruction translation register otherwise.
* @param dtr If true, insert into data translation register, use instruction translation register otherwise.
* @param tr Translation register.
*/
void tr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, bool dtr, index_t tr)

/kernel/trunk/arch/ia64/src/mm/page.c
210,7 → 210,7
/** Set up one VHPT entry.
*
* @param t VHPT entry to be set up.
* @param v VHPT entry to be set up.
* @param page Virtual address of the page mapped by the entry.
* @param asid Address space identifier of the address space to which page belongs.
* @param frame Physical address of the frame to wich page is mapped.

/kernel/trunk/arch/ppc32/src/mm/page.c
67,7 → 67,7
*
*/
static pte_t *find_mapping_and_check(as_t *as, bool lock, __address badvaddr, int access,
istate_t *istate, int *pfcr)
istate_t *istate, int *pfrc)
{
/*
* Check if the mapping exists in page tables.
99,12 → 99,12
return pte;
case AS_PF_DEFER:
page_table_lock(as, lock);
*pfcr = rc;
*pfrc = rc;
return NULL;
case AS_PF_FAULT:
page_table_lock(as, lock);
printf("Page fault.\n");
*pfcr = rc;
*pfrc = rc;
return NULL;
default:
panic("unexpected rc (%d)\n", rc);
190,7 → 190,7
/** Process Instruction/Data Storage Interrupt
*
* @param data True if Data Storage Interrupt.
* @param n Interrupt vector number.
* @param istate Interrupted register context.
*
*/
198,7 → 198,7
{
__address badvaddr;
pte_t *pte;
int pfcr;
int pfrc;
as_t *as;
bool lock;
220,9 → 220,9
page_table_lock(as, lock);
pte = find_mapping_and_check(as, lock, badvaddr, PF_ACCESS_READ /* FIXME */, istate, &pfcr);
pte = find_mapping_and_check(as, lock, badvaddr, PF_ACCESS_READ /* FIXME */, istate, &pfrc);
if (!pte) {
switch (pfcr) {
switch (pfrc) {
case AS_PF_FAULT:
goto fail;
break;
234,7 → 234,7
page_table_unlock(as, lock);
return;
default:
panic("Unexpected pfrc (%d)\n", pfcr);
panic("Unexpected pfrc (%d)\n", pfrc);
}
}

/kernel/trunk/arch/ppc64/src/mm/page.c
66,7 → 66,7
*
*/
static pte_t *find_mapping_and_check(as_t *as, bool lock, __address badvaddr, int access,
istate_t *istate, int *pfcr)
istate_t *istate, int *pfrc)
{
/*
* Check if the mapping exists in page tables.
98,12 → 98,12
return pte;
case AS_PF_DEFER:
page_table_lock(as, lock);
*pfcr = rc;
*pfrc = rc;
return NULL;
case AS_PF_FAULT:
page_table_lock(as, lock);
printf("Page fault.\n");
*pfcr = rc;
*pfrc = rc;
return NULL;
default:
panic("unexpected rc (%d)\n", rc);
197,7 → 197,7
{
__address badvaddr;
pte_t *pte;
int pfcr;
int pfrc;
as_t *as;
bool lock;
219,9 → 219,9
page_table_lock(as, lock);
pte = find_mapping_and_check(as, lock, badvaddr, PF_ACCESS_READ /* FIXME */, istate, &pfcr);
pte = find_mapping_and_check(as, lock, badvaddr, PF_ACCESS_READ /* FIXME */, istate, &pfrc);
if (!pte) {
switch (pfcr) {
switch (pfrc) {
case AS_PF_FAULT:
goto fail;
break;
233,7 → 233,7
page_table_unlock(as, lock);
return;
default:
panic("Unexpected pfrc (%d)\n", pfcr);
panic("Unexpected pfrc (%d)\n", pfrc);
}
}

/kernel/trunk/arch/ia32/src/smp/apic.c
173,7 → 173,7
/** APIC spurious interrupt handler.
*
* @param n Interrupt vector.
* @param stack Interrupted stack.
* @param istate Interrupted state.
*/
void apic_spurious(int n, istate_t *istate)
{
443,7 → 443,7
/** Local APIC Timer Interrupt.
*
* @param n Interrupt vector number.
* @param stack Interrupted stack.
* @param istate Interrupted state.
*/
void l_apic_timer_interrupt(int n, istate_t *istate)
{
482,7 → 482,7
/** Write to IO APIC register.
*
* @param address IO APIC register address.
* @param Content to be written to the addressed IO APIC register.
* @param x Content to be written to the addressed IO APIC register.
*/
void io_apic_write(__u8 address, __u32 x)
{