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Ignore whitespace Rev 957 → Rev 958

/kernel/trunk/genarch/src/i8042/i8042.c
265,13 → 265,13
SPECIAL, /* 0x7f */
};
 
static void i8042_interrupt(int n, void *stack);
static void i8042_interrupt(int n, istate_t *istate);
static void i8042_wait(void);
 
/** Initialize i8042. */
void i8042_init(void)
{
exc_register(VECTOR_KBD, "i8042_interrupt", i8042_interrupt);
exc_register(VECTOR_KBD, "i8042_interrupt", (iroutine) i8042_interrupt);
i8042_wait();
i8042_command_write(i8042_SET_COMMAND);
i8042_wait();
288,7 → 288,7
* @param n Interrupt vector.
* @param stack Interrupted stack.
*/
void i8042_interrupt(int n, void *stack)
void i8042_interrupt(int n, istate_t *istate)
{
__u8 x;
 
/kernel/trunk/generic/include/interrupt.h
41,7 → 41,7
#endif
 
extern iroutine exc_register(int n, const char *name, iroutine f);
extern void exc_dispatch(int n, void *stack);
extern void exc_dispatch(int n, istate_t *t);
void exc_init(void);
 
#endif
/kernel/trunk/generic/include/typedefs.h
82,7 → 82,8
typedef struct cmd_arg cmd_arg_t;
typedef struct cmd_info cmd_info_t;
 
typedef void (* iroutine)(int n, void *stack);
typedef struct istate istate_t;
typedef void (* iroutine)(int n, istate_t *istate);
 
typedef struct hash_table hash_table_t;
typedef struct hash_table_operations hash_table_operations_t;
/kernel/trunk/generic/src/interrupt/interrupt.c
71,15 → 71,15
* Called directly from the assembler code.
* CPU is interrupts_disable()'d.
*/
void exc_dispatch(int n, void *stack)
void exc_dispatch(int n, istate_t *istate)
{
ASSERT(n < IVT_ITEMS);
exc_table[n].f(n + IVT_FIRST, stack);
exc_table[n].f(n + IVT_FIRST, istate);
}
 
/** Default 'null' exception handler */
static void exc_undef(int n, void *stack)
static void exc_undef(int n, istate_t *istate)
{
panic("Unhandled exception %d.", n);
}
126,7 → 126,7
int i;
 
for (i=0;i < IVT_ITEMS; i++)
exc_register(i, "undef", exc_undef);
exc_register(i, "undef", (iroutine) exc_undef);
 
cmd_initialize(&exc_info);
if (!cmd_register(&exc_info))
/kernel/trunk/arch/sparc64/include/drivers/tick.h
29,9 → 29,11
#ifndef __sparc64_TICK_H__
#define __sparc64_TICK_H__
 
#include <typedefs.h>
 
#define TICK_DELTA 500000
 
extern void tick_init(void);
extern void tick_interrupt(int n, void *stack);
extern void tick_interrupt(int n, istate_t *istate);
 
#endif
/kernel/trunk/arch/sparc64/src/drivers/tick.c
32,6 → 32,7
#include <arch/register.h>
#include <debug.h>
#include <time/clock.h>
#include <typedefs.h>
 
/** Initialize tick interrupt. */
void tick_init(void)
48,9 → 49,9
/** Process tick interrupt.
*
* @param n Interrupt Level, 14, (can be ignored)
* @param stack Stack pointer of the interrupted context.
* @param istate Interrupted state.
*/
void tick_interrupt(int n, void *stack)
void tick_interrupt(int n, istate_t *istate)
{
softint_reg_t softint, clear;
/kernel/trunk/arch/ia64/include/interrupt.h
29,6 → 29,7
#ifndef __ia64_INTERRUPT_H__
#define __ia64_INTERRUPT_H__
 
#include <typedefs.h>
#include <arch/types.h>
#include <arch/register.h>
 
46,7 → 47,7
 
#define EOI 0 /**< The actual value doesn't matter. */
 
struct exception_regdump {
struct istate {
__address ar_bsp;
__address ar_bspstore;
__address ar_bspstore_new;
73,9 → 74,9
 
extern void *ivt;
 
extern void general_exception(__u64 vector, struct exception_regdump *pstate);
extern int break_instruction(__u64 vector, struct exception_regdump *pstate);
extern void universal_handler(__u64 vector, struct exception_regdump *pstate);
extern void external_interrupt(__u64 vector, struct exception_regdump *pstate);
extern void general_exception(__u64 vector, istate_t *istate);
extern int break_instruction(__u64 vector, istate_t *istate);
extern void universal_handler(__u64 vector, istate_t *istate);
extern void external_interrupt(__u64 vector, istate_t *istate);
 
#endif
/kernel/trunk/arch/ia64/include/types.h
1,4 → 1,4
 
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
47,7 → 47,7
typedef __u64 ipl_t;
 
typedef __u64 __native;
typedef __s64 __native;
typedef __s64 __snative;
 
typedef struct pte pte_t;
 
/kernel/trunk/arch/ia64/include/mm/tlb.h
82,12 → 82,12
extern void dtc_pte_copy(pte_t *t);
extern void itc_pte_copy(pte_t *t);
 
extern void alternate_instruction_tlb_fault(__u64 vector, struct exception_regdump *pstate);
extern void alternate_data_tlb_fault(__u64 vector, struct exception_regdump *pstate);
extern void data_nested_tlb_fault(__u64 vector, struct exception_regdump *pstate);
extern void data_dirty_bit_fault(__u64 vector, struct exception_regdump *pstate);
extern void instruction_access_bit_fault(__u64 vector, struct exception_regdump *pstate);
extern void data_access_bit_fault(__u64 vector, struct exception_regdump *pstate);
extern void page_not_present(__u64 vector, struct exception_regdump *pstate);
extern void alternate_instruction_tlb_fault(__u64 vector, istate_t *istate);
extern void alternate_data_tlb_fault(__u64 vector, istate_t *istate);
extern void data_nested_tlb_fault(__u64 vector, istate_t *istate);
extern void data_dirty_bit_fault(__u64 vector, istate_t *istate);
extern void instruction_access_bit_fault(__u64 vector, istate_t *istate);
extern void data_access_bit_fault(__u64 vector, istate_t *istate);
extern void page_not_present(__u64 vector, istate_t *istate);
 
#endif
/kernel/trunk/arch/ia64/src/mm/tlb.c
442,15 → 442,15
/** Instruction TLB fault handler for faults with VHPT turned off.
*
* @param vector Interruption vector.
* @param pstate Structure with saved interruption state.
* @param istate Structure with saved interruption state.
*/
void alternate_instruction_tlb_fault(__u64 vector, struct exception_regdump *pstate)
void alternate_instruction_tlb_fault(__u64 vector, istate_t *istate)
{
region_register rr;
__address va;
pte_t *t;
va = pstate->cr_ifa; /* faulting address */
va = istate->cr_ifa; /* faulting address */
t = page_mapping_find(AS, va);
if (t) {
/*
463,7 → 463,7
* Forward the page fault to address space page fault handler.
*/
if (!as_page_fault(va)) {
panic("%s: va=%P, rid=%d\n", __FUNCTION__, pstate->cr_ifa, rr.map.rid);
panic("%s: va=%P, rid=%d\n", __FUNCTION__, istate->cr_ifa, rr.map.rid);
}
}
}
471,9 → 471,9
/** Data TLB fault handler for faults with VHPT turned off.
*
* @param vector Interruption vector.
* @param pstate Structure with saved interruption state.
* @param istate Structure with saved interruption state.
*/
void alternate_data_tlb_fault(__u64 vector, struct exception_regdump *pstate)
void alternate_data_tlb_fault(__u64 vector, istate_t *istate)
{
region_register rr;
rid_t rid;
480,7 → 480,7
__address va;
pte_t *t;
va = pstate->cr_ifa; /* faulting address */
va = istate->cr_ifa; /* faulting address */
rr.word = rr_read(VA2VRN(va));
rid = rr.map.rid;
if (RID2ASID(rid) == ASID_KERNEL) {
506,7 → 506,7
* Forward the page fault to address space page fault handler.
*/
if (!as_page_fault(va)) {
panic("%s: va=%P, rid=%d\n", __FUNCTION__, pstate->cr_ifa, rr.map.rid);
panic("%s: va=%P, rid=%d\n", __FUNCTION__, istate->cr_ifa, rr.map.rid);
}
}
}
516,9 → 516,9
* This fault should not occur.
*
* @param vector Interruption vector.
* @param pstate Structure with saved interruption state.
* @param istate Structure with saved interruption state.
*/
void data_nested_tlb_fault(__u64 vector, struct exception_regdump *pstate)
void data_nested_tlb_fault(__u64 vector, istate_t *istate)
{
panic("%s\n", __FUNCTION__);
}
526,13 → 526,13
/** Data Dirty bit fault handler.
*
* @param vector Interruption vector.
* @param pstate Structure with saved interruption state.
* @param istate Structure with saved interruption state.
*/
void data_dirty_bit_fault(__u64 vector, struct exception_regdump *pstate)
void data_dirty_bit_fault(__u64 vector, istate_t *istate)
{
pte_t *t;
 
t = page_mapping_find(AS, pstate->cr_ifa);
t = page_mapping_find(AS, istate->cr_ifa);
ASSERT(t && t->p);
if (t && t->p) {
/*
547,13 → 547,13
/** Instruction access bit fault handler.
*
* @param vector Interruption vector.
* @param pstate Structure with saved interruption state.
* @param istate Structure with saved interruption state.
*/
void instruction_access_bit_fault(__u64 vector, struct exception_regdump *pstate)
void instruction_access_bit_fault(__u64 vector, istate_t *istate)
{
pte_t *t;
 
t = page_mapping_find(AS, pstate->cr_ifa);
t = page_mapping_find(AS, istate->cr_ifa);
ASSERT(t && t->p);
if (t && t->p) {
/*
568,13 → 568,13
/** Data access bit fault handler.
*
* @param vector Interruption vector.
* @param pstate Structure with saved interruption state.
* @param istate Structure with saved interruption state.
*/
void data_access_bit_fault(__u64 vector, struct exception_regdump *pstate)
void data_access_bit_fault(__u64 vector, istate_t *istate)
{
pte_t *t;
 
t = page_mapping_find(AS, pstate->cr_ifa);
t = page_mapping_find(AS, istate->cr_ifa);
ASSERT(t && t->p);
if (t && t->p) {
/*
589,15 → 589,15
/** Page not present fault handler.
*
* @param vector Interruption vector.
* @param pstate Structure with saved interruption state.
* @param istate Structure with saved interruption state.
*/
void page_not_present(__u64 vector, struct exception_regdump *pstate)
void page_not_present(__u64 vector, istate_t *istate)
{
region_register rr;
__address va;
pte_t *t;
va = pstate->cr_ifa; /* faulting address */
va = istate->cr_ifa; /* faulting address */
t = page_mapping_find(AS, va);
ASSERT(t);
612,7 → 612,7
dtc_pte_copy(t);
} else {
if (!as_page_fault(va)) {
panic("%s: va=%P, rid=%d\n", __FUNCTION__, pstate->cr_ifa, rr.map.rid);
panic("%s: va=%P, rid=%d\n", __FUNCTION__, istate->cr_ifa, rr.map.rid);
}
}
}
/kernel/trunk/arch/ia64/src/interrupt.c
108,7 → 108,7
};
 
static char *vector_to_string(__u16 vector);
static void dump_interrupted_context(struct exception_regdump *pstate);
static void dump_interrupted_context(istate_t *istate);
 
char *vector_to_string(__u16 vector)
{
120,33 → 120,33
return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
}
 
void dump_interrupted_context(struct exception_regdump *pstate)
void dump_interrupted_context(istate_t *istate)
{
char *ifa, *iipa, *iip;
 
ifa = get_symtab_entry(pstate->cr_ifa);
iipa = get_symtab_entry(pstate->cr_iipa);
iip = get_symtab_entry(pstate->cr_iip);
ifa = get_symtab_entry(istate->cr_ifa);
iipa = get_symtab_entry(istate->cr_iipa);
iip = get_symtab_entry(istate->cr_iip);
 
putchar('\n');
printf("Interrupted context dump:\n");
printf("ar.bsp=%P\tar.bspstore=%P\n", pstate->ar_bsp, pstate->ar_bspstore);
printf("ar.rnat=%Q\tar.rsc=%Q\n", pstate->ar_rnat, pstate->ar_rsc);
printf("ar.ifs=%Q\tar.pfs=%Q\n", pstate->ar_ifs, pstate->ar_pfs);
printf("cr.isr=%Q\tcr.ipsr=%Q\t\n", pstate->cr_isr.value, pstate->cr_ipsr);
printf("ar.bsp=%P\tar.bspstore=%P\n", istate->ar_bsp, istate->ar_bspstore);
printf("ar.rnat=%Q\tar.rsc=%Q\n", istate->ar_rnat, istate->ar_rsc);
printf("ar.ifs=%Q\tar.pfs=%Q\n", istate->ar_ifs, istate->ar_pfs);
printf("cr.isr=%Q\tcr.ipsr=%Q\t\n", istate->cr_isr.value, istate->cr_ipsr);
printf("cr.iip=%Q, #%d\t(%s)\n", pstate->cr_iip, pstate->cr_isr.ei ,iip ? iip : "?");
printf("cr.iipa=%Q\t(%s)\n", pstate->cr_iipa, iipa ? iipa : "?");
printf("cr.ifa=%Q\t(%s)\n", pstate->cr_ifa, ifa ? ifa : "?");
printf("cr.iip=%Q, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei ,iip ? iip : "?");
printf("cr.iipa=%Q\t(%s)\n", istate->cr_iipa, iipa ? iipa : "?");
printf("cr.ifa=%Q\t(%s)\n", istate->cr_ifa, ifa ? ifa : "?");
}
 
void general_exception(__u64 vector, struct exception_regdump *pstate)
void general_exception(__u64 vector, istate_t *istate)
{
char *desc = "";
 
dump_interrupted_context(pstate);
dump_interrupted_context(istate);
 
switch (pstate->cr_isr.ge_code) {
switch (istate->cr_isr.ge_code) {
case GE_ILLEGALOP:
desc = "Illegal Operation fault";
break;
174,33 → 174,33
}
 
/** Handle syscall. */
int break_instruction(__u64 vector, struct exception_regdump *pstate)
int break_instruction(__u64 vector, istate_t *istate)
{
/*
* Move to next instruction after BREAK.
*/
if (pstate->cr_ipsr.ri == 2) {
pstate->cr_ipsr.ri = 0;
pstate->cr_iip += 16;
if (istate->cr_ipsr.ri == 2) {
istate->cr_ipsr.ri = 0;
istate->cr_iip += 16;
} else {
pstate->cr_ipsr.ri++;
istate->cr_ipsr.ri++;
}
 
if (pstate->in0 < SYSCALL_END)
return syscall_table[pstate->in0](pstate->in1, pstate->in2, pstate->in3);
if (istate->in3 < SYSCALL_END)
return syscall_table[istate->in3](istate->in0, istate->in1, istate->in2);
else
panic("Undefined syscall %d", pstate->in0);
panic("Undefined syscall %d", istate->in3);
return -1;
}
 
void universal_handler(__u64 vector, struct exception_regdump *pstate)
void universal_handler(__u64 vector, istate_t *istate)
{
dump_interrupted_context(pstate);
dump_interrupted_context(istate);
panic("Interruption: %W (%s)\n", (__u16) vector, vector_to_string(vector));
}
 
void external_interrupt(__u64 vector, struct exception_regdump *pstate)
void external_interrupt(__u64 vector, istate_t *istate)
{
cr_ivr_t ivr;
/kernel/trunk/arch/amd64/include/interrupt.h
60,17 → 60,38
#define VECTOR_TLB_SHOOTDOWN_IPI (IVT_FREEBASE+0)
#define VECTOR_WAKEUP_IPI (IVT_FREEBASE+1)
 
/** This is passed to interrupt handlers */
struct istate {
__u64 rax;
__u64 rbx;
__u64 rcx;
__u64 rdx;
__u64 rsi;
__u64 rdi;
__u64 r8;
__u64 r9;
__u64 r10;
__u64 r11;
__u64 r12;
__u64 r13;
__u64 r14;
__u64 r15;
/* These 2 items MUST be last parts of the structure */
__u64 rbp;
__u64 stack[0]; /* Additional data on stack */
} __attribute__ ((packed));
 
extern void (* disable_irqs_function)(__u16 irqmask);
extern void (* enable_irqs_function)(__u16 irqmask);
extern void (* eoi_function)(void);
 
extern void null_interrupt(int n, struct interrupt_context *ctx);
extern void gp_fault(int n, void *stack);
extern void nm_fault(int n, void *stack);
extern void ss_fault(int n, void *stack);
extern void page_fault(int n, struct interrupt_context *ctx);
extern void syscall(int n, void *stack);
extern void tlb_shootdown_ipi(int n, void *stack);
extern void null_interrupt(int n, istate_t *istate);
extern void gp_fault(int n, istate_t *istate);
extern void nm_fault(int n, istate_t *istate);
extern void ss_fault(int n, istate_t *istate);
extern void page_fault(int n, istate_t *istate);
extern void syscall(int n, istate_t *istate);
extern void tlb_shootdown_ipi(int n, istate_t *istate);
 
extern void trap_virtual_enable_irqs(__u16 irqmask);
extern void trap_virtual_disable_irqs(__u16 irqmask);
/kernel/trunk/arch/amd64/include/context.h
58,25 → 58,4
ipl_t ipl;
} __attribute__ ((packed));
 
/** This is passed to interrupt handlers */
struct interrupt_context {
__u64 rax;
__u64 rbx;
__u64 rcx;
__u64 rdx;
__u64 rsi;
__u64 rdi;
__u64 r8;
__u64 r9;
__u64 r10;
__u64 r11;
__u64 r12;
__u64 r13;
__u64 r14;
__u64 r15;
/* These 2 items MUST be last parts of the structure */
__u64 rbp;
__u64 stack[0]; /* Additional data on stack */
} __attribute__ ((packed));
 
#endif
/kernel/trunk/arch/amd64/src/interrupt.c
42,47 → 42,29
#include <proc/scheduler.h>
#include <proc/thread.h>
 
/*
static void messy_stack_trace(__native *stack)
static void print_info_errcode(int n, istate_t *istate)
{
__native *upper_limit = (__native *)(((__native)get_stack_base()) + STACK_SIZE);
char *symbol;
__u64 *x = &istate->stack[0];
 
printf("Stack contents: ");
while (stack < upper_limit) {
symbol = get_symtab_entry((__address)*stack);
if (symbol)
printf("%s, ", symbol);
stack++;
}
printf("\n");
}
*/
 
static void print_info_errcode(int n, struct interrupt_context *ctx)
{
char *symbol;
__u64 *x = &ctx->stack[0];
 
if (!(symbol=get_symtab_entry(x[1])))
symbol = "";
 
printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n",n,__FUNCTION__);
printf("%%rip: %Q (%s)\n",ctx->stack[1],symbol);
printf("ERROR_WORD=%Q\n", ctx->stack[0]);
printf("%%rcs=%Q,flags=%Q, %%cr0=%Q\n", ctx->stack[2],
ctx->stack[3],read_cr0());
printf("%%rax=%Q, %%rbx=%Q, %%rcx=%Q\n",ctx->rax,ctx->rbx,ctx->rcx);
printf("%%rdx=%Q, %%rsi=%Q, %%rdi=%Q\n",ctx->rdx,ctx->rsi,ctx->rdi);
printf("%%r8 =%Q, %%r9 =%Q, %%r10=%Q\n",ctx->r8,ctx->r9,ctx->r10);
printf("%%r11=%Q, %%r12=%Q, %%r13=%Q\n",ctx->r11,ctx->r12,ctx->r13);
printf("%%r14=%Q, %%r15=%Q, %%rsp=%Q\n",ctx->r14,ctx->r15,&ctx->stack[0]);
printf("%%rbp=%Q\n",ctx->rbp);
printf("%%rip: %Q (%s)\n",istate->stack[1],symbol);
printf("ERROR_WORD=%Q\n", istate->stack[0]);
printf("%%rcs=%Q,flags=%Q, %%cr0=%Q\n", istate->stack[2],
istate->stack[3],read_cr0());
printf("%%rax=%Q, %%rbx=%Q, %%rcx=%Q\n",istate->rax,istate->rbx,istate->rcx);
printf("%%rdx=%Q, %%rsi=%Q, %%rdi=%Q\n",istate->rdx,istate->rsi,istate->rdi);
printf("%%r8 =%Q, %%r9 =%Q, %%r10=%Q\n",istate->r8,istate->r9,istate->r10);
printf("%%r11=%Q, %%r12=%Q, %%r13=%Q\n",istate->r11,istate->r12,istate->r13);
printf("%%r14=%Q, %%r15=%Q, %%rsp=%Q\n",istate->r14,istate->r15,&istate->stack[0]);
printf("%%rbp=%Q\n",istate->rbp);
printf("stack: %Q, %Q, %Q\n", x[5], x[6], x[7]);
printf(" %Q, %Q, %Q\n", x[8], x[9], x[10]);
printf(" %Q, %Q, %Q\n", x[11], x[12], x[13]);
printf(" %Q, %Q, %Q\n", x[14], x[15], x[16]);
// messy_stack_trace(&x[5]);
}
 
/*
93,28 → 75,28
void (* enable_irqs_function)(__u16 irqmask) = NULL;
void (* eoi_function)(void) = NULL;
 
void null_interrupt(int n, struct interrupt_context *ctx)
void null_interrupt(int n, istate_t *istate)
{
printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n",n,__FUNCTION__); \
printf("stack: %X, %X, %X, %X\n", ctx->stack[0], ctx->stack[1],
ctx->stack[2], ctx->stack[3]);
printf("stack: %X, %X, %X, %X\n", istate->stack[0], istate->stack[1],
istate->stack[2], istate->stack[3]);
panic("unserviced interrupt\n");
}
 
void gp_fault(int n, void *stack)
void gp_fault(int n, istate_t *istate)
{
print_info_errcode(n,stack);
print_info_errcode(n, istate);
panic("general protection fault\n");
}
 
void ss_fault(int n, void *stack)
void ss_fault(int n, istate_t *istate)
{
print_info_errcode(n,stack);
print_info_errcode(n, istate);
panic("stack fault\n");
}
 
 
void nm_fault(int n, void *stack)
void nm_fault(int n, istate_t *istate)
{
#ifdef CONFIG_FPU_LAZY
scheduler_fpu_lazy_request();
123,19 → 105,19
#endif
}
 
void page_fault(int n, struct interrupt_context *ctx)
void page_fault(int n, istate_t *istate)
{
__address page;
page = read_cr2();
if (!as_page_fault(page)) {
print_info_errcode(n,ctx);
print_info_errcode(n, istate);
printf("Page fault address: %Q\n", page);
panic("page fault\n");
}
}
 
void tlb_shootdown_ipi(int n, void *stack)
void tlb_shootdown_ipi(int n, istate_t *istate)
{
trap_virtual_eoi();
tlb_shootdown_ipi_recv();
/kernel/trunk/arch/mips32/include/exception.h
33,6 → 33,8
# include <arch/types.h>
#endif
 
#include <typedefs.h>
 
#define EXC_Int 0
#define EXC_Mod 1
#define EXC_TLBL 2
52,7 → 54,7
#define EXC_WATCH 23
#define EXC_VCED 31
 
struct exception_regdump {
struct istate {
__u32 at;
__u32 v0;
__u32 v1;
90,7 → 92,7
__u32 epc; /* cp0_epc */
};
 
extern void exception(struct exception_regdump *pstate);
extern void exception(istate_t *istate);
extern void tlb_refill_entry(void);
extern void exception_entry(void);
extern void cache_error_entry(void);
/kernel/trunk/arch/mips32/include/thread.h
31,6 → 31,6
 
#include <arch/exception.h>
 
#define ARCH_THREAD_DATA struct exception_regdump *pstate
#define ARCH_THREAD_DATA istate_t *istate
 
#endif
/kernel/trunk/arch/mips32/include/mm/tlb.h
169,8 → 169,8
 
#define tlb_invalidate(asid) tlb_invalidate_asid(asid)
 
extern void tlb_invalid(struct exception_regdump *pstate);
extern void tlb_refill(struct exception_regdump *pstate);
extern void tlb_modified(struct exception_regdump *pstate);
extern void tlb_invalid(istate_t *istate);
extern void tlb_refill(istate_t *istate);
extern void tlb_modified(istate_t *istate);
 
#endif
/kernel/trunk/arch/mips32/include/debugger.h
49,11 → 49,11
__native nextinstruction; /**< Original instruction following break */
int flags; /**< Flags regarding breakpoint */
count_t counter;
void (*bkfunc)(void *b, struct exception_regdump *pstate);
void (*bkfunc)(void *b, istate_t *istate);
} bpinfo_t;
 
extern void debugger_init(void);
void debugger_bpoint(struct exception_regdump *pstate);
void debugger_bpoint(istate_t *istate);
 
extern bpinfo_t breakpoints[BKPOINTS_MAX];
 
/kernel/trunk/arch/mips32/src/exception.c
62,52 → 62,52
"Virtual Coherency - data",
};
 
static void print_regdump(struct exception_regdump *pstate)
static void print_regdump(istate_t *istate)
{
char *pcsymbol = "";
char *rasymbol = "";
 
char *s = get_symtab_entry(pstate->epc);
char *s = get_symtab_entry(istate->epc);
if (s)
pcsymbol = s;
s = get_symtab_entry(pstate->ra);
s = get_symtab_entry(istate->ra);
if (s)
rasymbol = s;
printf("PC: %X(%s) RA: %X(%s), SP(%P)\n",pstate->epc,pcsymbol,
pstate->ra,rasymbol, pstate->sp);
printf("PC: %X(%s) RA: %X(%s), SP(%P)\n",istate->epc,pcsymbol,
istate->ra,rasymbol, istate->sp);
}
 
static void unhandled_exception(int n, struct exception_regdump *pstate)
static void unhandled_exception(int n, istate_t *istate)
{
print_regdump(pstate);
print_regdump(istate);
panic("unhandled exception %s\n", exctable[n]);
}
 
static void breakpoint_exception(int n, struct exception_regdump *pstate)
static void breakpoint_exception(int n, istate_t *istate)
{
#ifdef CONFIG_DEBUG
debugger_bpoint(pstate);
debugger_bpoint(istate);
#else
/* it is necessary to not re-execute BREAK instruction after
returning from Exception handler
(see page 138 in R4000 Manual for more information) */
pstate->epc += 4;
istate->epc += 4;
#endif
}
 
static void tlbmod_exception(int n, struct exception_regdump *pstate)
static void tlbmod_exception(int n, istate_t *istate)
{
tlb_modified(pstate);
tlb_modified(istate);
}
 
static void tlbinv_exception(int n, struct exception_regdump *pstate)
static void tlbinv_exception(int n, istate_t *istate)
{
tlb_invalid(pstate);
tlb_invalid(istate);
}
 
#ifdef CONFIG_FPU_LAZY
static void cpuns_exception(int n, struct exception_regdump *pstate)
static void cpuns_exception(int n, istate_t *istate)
{
if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)
scheduler_fpu_lazy_request();
116,7 → 116,7
}
#endif
 
static void interrupt_exception(int n, struct exception_regdump *pstate)
static void interrupt_exception(int n, istate_t *istate)
{
__u32 cause;
int i;
126,26 → 126,25
for (i = 0; i < 8; i++)
if (cause & (1 << i))
exc_dispatch(i+INT_OFFSET, pstate);
exc_dispatch(i+INT_OFFSET, istate);
}
 
#include <debug.h>
/** Handle syscall userspace call */
static void syscall_exception(int n, struct exception_regdump *pstate)
static void syscall_exception(int n, istate_t *istate)
{
interrupts_enable();
if (pstate->a3 < SYSCALL_END)
pstate->v0 = syscall_table[pstate->a3](pstate->a0,
pstate->a1,
pstate->a2);
if (istate->a3 < SYSCALL_END)
istate->v0 = syscall_table[istate->a3](istate->a0,
istate->a1,
istate->a2);
else
panic("Undefined syscall %d", pstate->a3);
panic("Undefined syscall %d", istate->a3);
istate->epc += 4;
interrupts_disable();
pstate->epc += 4;
}
 
 
void exception(struct exception_regdump *pstate)
void exception(istate_t *istate)
{
int cause;
int excno;
163,26 → 162,26
cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit |
cp0_status_um_bit));
 
/* Save pstate so that the threads can access it */
/* If THREAD->pstate is set, this is nested exception,
/* Save istate so that the threads can access it */
/* If THREAD->istate is set, this is nested exception,
* do not rewrite it
*/
if (THREAD && !THREAD->pstate)
THREAD->pstate = pstate;
if (THREAD && !THREAD->istate)
THREAD->istate = istate;
 
cause = cp0_cause_read();
excno = cp0_cause_excno(cause);
/* Dispatch exception */
exc_dispatch(excno, pstate);
exc_dispatch(excno, istate);
 
/* Set to NULL, so that we can still support nested
* exceptions
* TODO: We should probably set EXL bit before this command,
* nesting. On the other hand, if some exception occurs between
* here and ERET, it won't set anything on the pstate anyway.
* here and ERET, it won't set anything on the istate anyway.
*/
if (THREAD)
THREAD->pstate = NULL;
THREAD->istate = NULL;
}
 
void exception_init(void)
/kernel/trunk/arch/mips32/src/fpu_context.c
36,8 → 36,8
{
#ifdef ARCH_HAS_FPU
cp0_status_write(cp0_status_read() & ~cp0_status_fpu_bit);
if (THREAD && THREAD->pstate)
THREAD->pstate->status &= ~cp0_status_fpu_bit;
if (THREAD && THREAD->istate)
THREAD->istate->status &= ~cp0_status_fpu_bit;
#endif
}
 
45,8 → 45,8
{
#ifdef ARCH_HAS_FPU
cp0_status_write(cp0_status_read() | cp0_status_fpu_bit);
if (THREAD && THREAD->pstate)
THREAD->pstate->status |= cp0_status_fpu_bit;
if (THREAD && THREAD->istate)
THREAD->istate->status |= cp0_status_fpu_bit;
#endif
}
 
/kernel/trunk/arch/mips32/src/debugger.c
179,7 → 179,7
cur->flags = 0;
} else { /* We are add extended */
cur->flags = BKPOINT_FUNCCALL;
cur->bkfunc = (void (*)(void *, struct exception_regdump *)) argv[1].intval;
cur->bkfunc = (void (*)(void *, istate_t *)) argv[1].intval;
}
if (is_jump(cur->instruction))
cur->flags |= BKPOINT_ONESHOT;
289,10 → 289,10
* If breakpoint not found in breakpoint table, call kconsole and start
* next instruction.
*/
void debugger_bpoint(struct exception_regdump *pstate)
void debugger_bpoint(istate_t *istate)
{
bpinfo_t *cur = NULL;
__address fireaddr = pstate->epc;
__address fireaddr = istate->epc;
int i;
 
/* test branch delay slot */
329,7 → 329,7
if (!(cur->flags & BKPOINT_FUNCCALL))
printf("***Breakpoint %d: 0x%p in %s.\n", i,
fireaddr, get_symtab_entry(pstate->epc));
fireaddr, get_symtab_entry(istate->epc));
 
/* Return first instruction back */
((__u32 *)cur->address)[0] = cur->instruction;
344,7 → 344,7
printf("***Breakpoint 0x%p in %s.\n", fireaddr,
get_symtab_entry(fireaddr));
/* Move on to next instruction */
pstate->epc += 4;
istate->epc += 4;
}
if (cur)
cur->counter++;
351,7 → 351,7
if (cur && (cur->flags & BKPOINT_FUNCCALL)) {
/* Allow zero bkfunc, just for counting */
if (cur->bkfunc)
cur->bkfunc(cur, pstate);
cur->bkfunc(cur, istate);
} else {
printf("***Type 'exit' to exit kconsole.\n");
/* This disables all other processors - we are not SMP,
/kernel/trunk/arch/mips32/src/mm/tlb.c
39,9 → 39,9
#include <print.h>
#include <debug.h>
 
static void tlb_refill_fail(struct exception_regdump *pstate);
static void tlb_invalid_fail(struct exception_regdump *pstate);
static void tlb_modified_fail(struct exception_regdump *pstate);
static void tlb_refill_fail(istate_t *istate);
static void tlb_invalid_fail(istate_t *istate);
static void tlb_modified_fail(istate_t *istate);
 
static pte_t *find_mapping_and_check(__address badvaddr);
 
81,9 → 81,9
*
* Process TLB Refill Exception.
*
* @param pstate Interrupted register context.
* @param istate Interrupted register context.
*/
void tlb_refill(struct exception_regdump *pstate)
void tlb_refill(istate_t *istate)
{
entry_lo_t lo;
entry_hi_t hi;
126,7 → 126,7
fail:
spinlock_unlock(&AS->lock);
tlb_refill_fail(pstate);
tlb_refill_fail(istate);
}
 
/** Process TLB Invalid Exception
133,9 → 133,9
*
* Process TLB Invalid Exception.
*
* @param pstate Interrupted register context.
* @param istate Interrupted register context.
*/
void tlb_invalid(struct exception_regdump *pstate)
void tlb_invalid(istate_t *istate)
{
tlb_index_t index;
__address badvaddr;
195,7 → 195,7
fail:
spinlock_unlock(&AS->lock);
tlb_invalid_fail(pstate);
tlb_invalid_fail(istate);
}
 
/** Process TLB Modified Exception
202,9 → 202,9
*
* Process TLB Modified Exception.
*
* @param pstate Interrupted register context.
* @param istate Interrupted register context.
*/
void tlb_modified(struct exception_regdump *pstate)
void tlb_modified(istate_t *istate)
{
tlb_index_t index;
__address badvaddr;
271,42 → 271,42
fail:
spinlock_unlock(&AS->lock);
tlb_modified_fail(pstate);
tlb_modified_fail(istate);
}
 
void tlb_refill_fail(struct exception_regdump *pstate)
void tlb_refill_fail(istate_t *istate)
{
char *symbol = "";
char *sym2 = "";
 
char *s = get_symtab_entry(pstate->epc);
char *s = get_symtab_entry(istate->epc);
if (s)
symbol = s;
s = get_symtab_entry(pstate->ra);
s = get_symtab_entry(istate->ra);
if (s)
sym2 = s;
panic("%X: TLB Refill Exception at %X(%s<-%s)\n", cp0_badvaddr_read(), pstate->epc, symbol, sym2);
panic("%X: TLB Refill Exception at %X(%s<-%s)\n", cp0_badvaddr_read(), istate->epc, symbol, sym2);
}
 
 
void tlb_invalid_fail(struct exception_regdump *pstate)
void tlb_invalid_fail(istate_t *istate)
{
char *symbol = "";
 
char *s = get_symtab_entry(pstate->epc);
char *s = get_symtab_entry(istate->epc);
if (s)
symbol = s;
panic("%X: TLB Invalid Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol);
panic("%X: TLB Invalid Exception at %X(%s)\n", cp0_badvaddr_read(), istate->epc, symbol);
}
 
void tlb_modified_fail(struct exception_regdump *pstate)
void tlb_modified_fail(istate_t *istate)
{
char *symbol = "";
 
char *s = get_symtab_entry(pstate->epc);
char *s = get_symtab_entry(istate->epc);
if (s)
symbol = s;
panic("%X: TLB Modified Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol);
panic("%X: TLB Modified Exception at %X(%s)\n", cp0_badvaddr_read(), istate->epc, symbol);
}
 
/** Try to find PTE for faulting address
/kernel/trunk/arch/mips32/src/interrupt.c
74,18 → 74,18
return cp0_status_read();
}
 
static void timer_exception(int n, void *stack)
static void timer_exception(int n, istate_t *istate)
{
cp0_compare_write(cp0_count_read() + cp0_compare_value);
clock();
}
 
static void swint0(int n, void *stack)
static void swint0(int n, istate_t *istate)
{
cp0_cause_write(cp0_cause_read() & ~(1 << 8)); /* clear SW0 interrupt */
}
 
static void swint1(int n, void *stack)
static void swint1(int n, istate_t *istate)
{
cp0_cause_write(cp0_cause_read() & ~(1 << 9)); /* clear SW1 interrupt */
}
/kernel/trunk/arch/mips32/src/drivers/serial.c
112,10 → 112,10
 
iroutine old_timer;
/** Do polling on timer interrupt */
static void timer_replace(int n, void *stack)
static void timer_replace(int n, istate_t *istate)
{
old_timer(n, stack);
serial_interrupt(n, stack);
old_timer(n, istate);
serial_interrupt(n, istate);
}
 
void serial_console(void)
/kernel/trunk/arch/mips32/src/drivers/arc.c
349,10 → 349,10
 
iroutine old_timer;
/** Do polling on timer interrupt */
static void timer_replace(int n, void *stack)
static void timer_replace(int n, istate_t *istate)
{
arc_keyboard_poll();
old_timer(n, stack);
old_timer(n, istate);
arc_keyboard_poll();
}
 
/kernel/trunk/arch/mips32/src/drivers/msim.c
83,7 → 83,7
}
 
/** Process keyboard interrupt. */
static void msim_interrupt(int n, void *stack)
static void msim_interrupt(int n, istate_t *istate)
{
char ch = 0;
 
/kernel/trunk/arch/ia32/include/interrupt.h
60,17 → 60,33
#define VECTOR_SYSCALL (IVT_FREEBASE+0)
#define VECTOR_TLB_SHOOTDOWN_IPI (IVT_FREEBASE+1)
 
struct istate {
__u32 edi;
__u32 esi;
__u32 ebp;
__u32 esp;
__u32 ebx;
__u32 edx;
__u32 ecx;
__u32 eax;
__u32 error_word;
__u32 eip;
__u32 cs;
__u32 eflags;
__u32 stack[];
};
 
extern void (* disable_irqs_function)(__u16 irqmask);
extern void (* enable_irqs_function)(__u16 irqmask);
extern void (* eoi_function)(void);
 
extern void null_interrupt(int n, void *stack);
extern void gp_fault(int n, void *stack);
extern void nm_fault(int n, void *stack);
extern void ss_fault(int n, void *stack);
extern void page_fault(int n, void *stack);
extern void syscall(int n, void *stack);
extern void tlb_shootdown_ipi(int n, void *stack);
extern void null_interrupt(int n, istate_t *istate);
extern void gp_fault(int n, istate_t *istate);
extern void nm_fault(int n, istate_t *istate);
extern void ss_fault(int n, istate_t *istate);
extern void page_fault(int n, istate_t *istate);
extern void syscall(int n, istate_t *istate);
extern void tlb_shootdown_ipi(int n, istate_t *istate);
 
extern void trap_virtual_enable_irqs(__u16 irqmask);
extern void trap_virtual_disable_irqs(__u16 irqmask);
/kernel/trunk/arch/ia32/include/types.h
47,7 → 47,7
typedef __u32 ipl_t;
 
typedef __u32 __native;
typedef __s32 __native;
typedef __s32 __snative;
 
typedef struct page_specifier pte_t;
 
/kernel/trunk/arch/ia32/src/ia32.c
60,11 → 60,11
i8259_init(); /* PIC */
i8254_init(); /* hard clock */
exc_register(VECTOR_SYSCALL, "syscall", syscall);
exc_register(VECTOR_SYSCALL, "syscall", (iroutine) syscall);
#ifdef CONFIG_SMP
exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
tlb_shootdown_ipi);
(iroutine) tlb_shootdown_ipi);
#endif /* CONFIG_SMP */
}
}
/kernel/trunk/arch/ia32/src/asm.S
78,10 → 78,37
# and call exc_dispatch().
#
.macro handler i n
push %ebp
movl %esp,%ebp
push %eax
 
# Test if this is interrupt with error word or not
movl $(1<<\i), %eax
andl $ERROR_WORD_INTERRUPT_LIST,%eax
 
/*
* If this interrupt/exception stores error word,
* we need to pop EAX.
* If this interrupt doesn't store error word, we emulate it
* for the sake of consistent pstate structure. In that case
* we merely leave the EAX on the stack.
*/
jz 0f
 
/*
* This exception stores error word.
*/
pop %eax
jmp 1f
 
0:
/*
* This interrupt doesn't store error word.
* Just restore EAX without doing POP.
*/
movl (%esp), %eax
 
1:
pusha
 
movl %esp, %ebp
push %ds
push %es
 
92,7 → 119,6
 
movl $(\i),%edi
pushl %ebp
addl $4,(%esp)
pushl %edi
call exc_dispatch
addl $8,%esp
100,8 → 126,7
pop %es
pop %ds
 
 
# CLNT
# Clear Nested Task flag.
pushfl
pop %eax
and $0xFFFFBFFF,%eax
108,31 → 133,10
push %eax
popfl
 
 
# Test if this is interrupt with error word or not
mov $\i,%cl
movl $1,%eax
test $0xe0,%cl
jnz 0f
and $0x1f,%cl
shl %cl,%eax
and $ERROR_WORD_INTERRUPT_LIST,%eax
jz 0f
 
 
# Return with error word
popa
pop %ebp
add $4,%esp # Skip error word
add $4,%esp # Skip error word, whether real or fake.
iret
 
0:
# Return with no error word
popa
pop %ebp
iret
 
.if (\n-\i)-1
handler "(\i+1)",\n
.endif
/kernel/trunk/arch/ia32/src/pm.c
125,11 → 125,11
}
idt_setoffset(d, ((__address) interrupt_handlers) + i*interrupt_handler_size);
exc_register(i, "undef", null_interrupt);
exc_register(i, "undef", (iroutine) null_interrupt);
}
exc_register(13, "gp_fault", gp_fault);
exc_register( 7, "nm_fault", nm_fault);
exc_register(12, "ss_fault", ss_fault);
exc_register(13, "gp_fault", (iroutine) gp_fault);
exc_register( 7, "nm_fault", (iroutine) nm_fault);
exc_register(12, "ss_fault", (iroutine) ss_fault);
}
 
 
/kernel/trunk/arch/ia32/src/smp/apic.c
112,8 → 112,8
#endif /* LAPIC_VERBOSE */
 
 
static void apic_spurious(int n, void *stack);
static void l_apic_timer_interrupt(int n, void *stack);
static void apic_spurious(int n, istate_t *istate);
static void l_apic_timer_interrupt(int n, istate_t *istate);
 
/** Initialize APIC on BSP. */
void apic_init(void)
121,7 → 121,7
io_apic_id_t idreg;
int i;
 
exc_register(VECTOR_APIC_SPUR, "apic_spurious", apic_spurious);
exc_register(VECTOR_APIC_SPUR, "apic_spurious", (iroutine) apic_spurious);
 
enable_irqs_function = io_apic_enable_irqs;
disable_irqs_function = io_apic_disable_irqs;
133,7 → 133,7
* Other interrupts will be forwarded to the lowest priority CPU.
*/
io_apic_disable_irqs(0xffff);
exc_register(VECTOR_CLK, "l_apic_timer", l_apic_timer_interrupt);
exc_register(VECTOR_CLK, "l_apic_timer", (iroutine) l_apic_timer_interrupt);
for (i = 0; i < IRQ_COUNT; i++) {
int pin;
169,7 → 169,7
* @param n Interrupt vector.
* @param stack Interrupted stack.
*/
void apic_spurious(int n, void *stack)
void apic_spurious(int n, istate_t *istate)
{
printf("cpu%d: APIC spurious interrupt\n", CPU->id);
}
427,7 → 427,7
* @param n Interrupt vector number.
* @param stack Interrupted stack.
*/
void l_apic_timer_interrupt(int n, void *stack)
void l_apic_timer_interrupt(int n, istate_t *istate)
{
l_apic_eoi();
clock();
/kernel/trunk/arch/ia32/src/mm/page.c
60,7 → 60,7
page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
}
 
exc_register(14, "page_fault", page_fault);
exc_register(14, "page_fault", (iroutine) page_fault);
write_cr3((__address) AS_KERNEL->page_table);
}
else {
/kernel/trunk/arch/ia32/src/interrupt.c
49,46 → 49,41
void (* enable_irqs_function)(__u16 irqmask) = NULL;
void (* eoi_function)(void) = NULL;
 
#define PRINT_INFO_ERRCODE(st) { \
__native *x = (__native *) st; \
char *symbol = get_symtab_entry(x[1]); \
#define PRINT_INFO_ERRCODE(istate) do { \
char *symbol = get_symtab_entry(istate->eip); \
if (!symbol) \
symbol = ""; \
printf("----------------EXCEPTION OCCURED----------------\n"); \
printf("%%eip: %X (%s)\n",x[1],symbol); \
printf("ERROR_WORD=%X\n", x[0]); \
printf("%%cs=%X,flags=%X\n", x[2], x[3]); \
printf("%%eip: %X (%s)\n",istate->eip,symbol); \
printf("ERROR_WORD=%X\n", istate->error_word); \
printf("%%cs=%X,flags=%X\n", istate->cs, istate->eflags); \
printf("%%eax=%X, %%ebx=%X, %%ecx=%X, %%edx=%X\n",\
x[-2],x[-5],x[-3],x[-4]); \
istate->eax,istate->ebx,istate->ecx,istate->edx); \
printf("%%esi=%X, %%edi=%X, %%ebp=%X, %%esp=%X\n",\
x[-8],x[-9],x[-1],x); \
printf("stack: %X, %X, %X, %X\n", x[4], x[5], x[6], x[7]); \
printf(" %X, %X, %X, %X\n", x[8], x[9], x[10], x[11]); \
}
istate->esi,istate->edi,istate->ebp,istate->esp); \
printf("stack: %X, %X, %X, %X\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]); \
printf(" %X, %X, %X, %X\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]); \
} while(0)
 
void null_interrupt(int n, void *st)
void null_interrupt(int n, istate_t *istate)
{
__native *stack = (__native *) st;
 
printf("int %d: null_interrupt\n", n);
printf("stack: %L, %L, %L, %L\n", stack[0], stack[1], stack[2], stack[3]);
panic("unserviced interrupt\n");
PRINT_INFO_ERRCODE(istate);
panic("unserviced interrupt: %d\n", n);
}
 
void gp_fault(int n, void *stack)
void gp_fault(int n, istate_t *istate)
{
PRINT_INFO_ERRCODE(stack);
PRINT_INFO_ERRCODE(istate);
panic("general protection fault\n");
}
 
void ss_fault(int n, void *stack)
void ss_fault(int n, istate_t *istate)
{
PRINT_INFO_ERRCODE(stack);
PRINT_INFO_ERRCODE(istate);
panic("stack fault\n");
}
 
 
void nm_fault(int n, void *stack)
void nm_fault(int n, istate_t *istate)
{
#ifdef CONFIG_FPU_LAZY
scheduler_fpu_lazy_request();
97,33 → 92,29
#endif
}
 
 
 
void page_fault(int n, void *stack)
void page_fault(int n, istate_t *istate)
{
__address page;
 
page = read_cr2();
if (!as_page_fault(page)) {
PRINT_INFO_ERRCODE(stack);
PRINT_INFO_ERRCODE(istate);
printf("page fault address: %X\n", page);
panic("page fault\n");
}
}
 
void syscall(int n, void *st)
void syscall(int n, istate_t *istate)
{
__native *stack = (__native *) st;
 
interrupts_enable();
if (stack[-2] < SYSCALL_END)
stack[-2] = syscall_table[stack[-2]](stack[-5], stack[-3], stack[-4]);
if (istate->edx < SYSCALL_END)
istate->eax = syscall_table[istate->edx](istate->eax, istate->ebx, istate->ecx);
else
panic("Undefined syscall %d", stack[-2]);
panic("Undefined syscall %d", istate->edx);
interrupts_disable();
}
 
void tlb_shootdown_ipi(int n, void *stack)
void tlb_shootdown_ipi(int n, istate_t *istate)
{
trap_virtual_eoi();
tlb_shootdown_ipi_recv();
/kernel/trunk/arch/ia32/src/drivers/i8259.c
39,7 → 39,7
* Programmable Interrupt Controller for UP systems.
*/
 
static void pic_spurious(int n, void *stack);
static void pic_spurious(int n, istate_t *istate);
 
void i8259_init(void)
{
70,7 → 70,7
/*
* Register interrupt handler for the PIC spurious interrupt.
*/
exc_register(VECTOR_PIC_SPUR, "pic_spurious", pic_spurious);
exc_register(VECTOR_PIC_SPUR, "pic_spurious", (iroutine) pic_spurious);
 
/*
* Set the enable/disable IRQs handlers.
118,7 → 118,7
outb(0xa0,0x20);
}
 
void pic_spurious(int n, void *stack)
void pic_spurious(int n, istate_t *istate)
{
printf("cpu%d: PIC spurious interrupt\n", CPU->id);
}
/kernel/trunk/arch/ia32/src/drivers/i8254.c
53,7 → 53,7
#define CLK_CONST 1193180
#define MAGIC_NUMBER 1194
 
static void i8254_interrupt(int n, void *stack);
static void i8254_interrupt(int n, istate_t *istate);
 
void i8254_init(void)
{
67,7 → 67,7
outb(CLK_PORT1, (CLK_CONST/HZ) & 0xf);
outb(CLK_PORT1, (CLK_CONST/HZ) >> 8);
pic_enable_irqs(1<<IRQ_CLK);
exc_register(VECTOR_CLK, "i8254_clock", i8254_interrupt);
exc_register(VECTOR_CLK, "i8254_clock", (iroutine) i8254_interrupt);
}
 
#define LOOPS 150000
125,7 → 125,7
return;
}
 
void i8254_interrupt(int n, void *stack)
void i8254_interrupt(int n, istate_t *istate)
{
trap_virtual_eoi();
clock();