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Ignore whitespace Rev 859 → Rev 860

/kernel/trunk/generic/src/proc/thread.c
269,8 → 269,8
t->task = task;
t->fpu_context_exists=0;
t->fpu_context_engaged=0;
t->fpu_context_exists = 0;
t->fpu_context_engaged = 0;
/*
* Register this thread in the system-wide list.
288,7 → 288,7
spinlock_unlock(&task->lock);
interrupts_restore(ipl);
 
return t;
}
 
/kernel/trunk/generic/src/main/main.c
181,7 → 181,7
printf("config.memory_size=%dM\n", config.memory_size/(1024*1024));
printf("config.cpu_count=%d\n", config.cpu_count);
cpu_init();
 
calibrate_delay_loop();
timeout_init();
scheduler_init();
197,7 → 197,7
k = task_create(AS_KERNEL);
if (!k)
panic("can't create kernel task\n");
/*
* Create the first thread.
*/
205,7 → 205,7
if (!t)
panic("can't create kinit thread\n");
thread_ready(t);
 
/*
* This call to scheduler() will return to kinit,
* starting the thread of kernel threads.
/kernel/trunk/arch/sparc64/include/context_offset.h
1,21 → 1,21
/* This file is automatically generated by gencontext.c. */
/* struct context */
#define OFFSET_SP 0x0
#define OFFSET_PC 0x8
#define OFFSET_I0 0x10
#define OFFSET_I1 0x18
#define OFFSET_I2 0x20
#define OFFSET_I3 0x28
#define OFFSET_I4 0x30
#define OFFSET_I5 0x38
#define OFFSET_FP 0x40
#define OFFSET_I7 0x48
#define OFFSET_L0 0x50
#define OFFSET_L1 0x58
#define OFFSET_L2 0x60
#define OFFSET_L3 0x68
#define OFFSET_L4 0x70
#define OFFSET_L5 0x78
#define OFFSET_L6 0x80
#define OFFSET_L7 0x88
#define OFFSET_CLEANWIN 0x98
#define OFFSET_SP 0x0
#define OFFSET_PC 0x8
#define OFFSET_I0 0x10
#define OFFSET_I1 0x18
#define OFFSET_I2 0x20
#define OFFSET_I3 0x28
#define OFFSET_I4 0x30
#define OFFSET_I5 0x38
#define OFFSET_FP 0x40
#define OFFSET_I7 0x48
#define OFFSET_L0 0x50
#define OFFSET_L1 0x58
#define OFFSET_L2 0x60
#define OFFSET_L3 0x68
#define OFFSET_L4 0x70
#define OFFSET_L5 0x78
#define OFFSET_L6 0x80
#define OFFSET_L7 0x88
#define OFFSET_CLEANWIN 0x98
/kernel/trunk/arch/ppc32/include/context_offset.h
1,25 → 1,45
/* This file is automatically generated by gencontext.c. */
/* struct context */
#define OFFSET_SP 0x0
#define OFFSET_PC 0x4
#define OFFSET_R2 0x8
#define OFFSET_R13 0xc
#define OFFSET_R14 0x10
#define OFFSET_R15 0x14
#define OFFSET_R16 0x18
#define OFFSET_R17 0x1c
#define OFFSET_R18 0x20
#define OFFSET_R19 0x24
#define OFFSET_R20 0x28
#define OFFSET_R21 0x2c
#define OFFSET_R22 0x30
#define OFFSET_R23 0x34
#define OFFSET_R24 0x38
#define OFFSET_R25 0x3c
#define OFFSET_R26 0x40
#define OFFSET_R27 0x44
#define OFFSET_R28 0x48
#define OFFSET_R29 0x4c
#define OFFSET_R30 0x50
#define OFFSET_R31 0x54
#define OFFSET_CR 0x58
#define OFFSET_SP 0x0
#define OFFSET_PC 0x4
#define OFFSET_R2 0x8
#define OFFSET_R13 0xc
#define OFFSET_R14 0x10
#define OFFSET_R15 0x14
#define OFFSET_R16 0x18
#define OFFSET_R17 0x1c
#define OFFSET_R18 0x20
#define OFFSET_R19 0x24
#define OFFSET_R20 0x28
#define OFFSET_R21 0x2c
#define OFFSET_R22 0x30
#define OFFSET_R23 0x34
#define OFFSET_R24 0x38
#define OFFSET_R25 0x3c
#define OFFSET_R26 0x40
#define OFFSET_R27 0x44
#define OFFSET_R28 0x48
#define OFFSET_R29 0x4c
#define OFFSET_R30 0x50
#define OFFSET_R31 0x54
#define OFFSET_CR 0x58
 
#define OFFSET_FR14 0x0
#define OFFSET_FR15 0x8
#define OFFSET_FR16 0x10
#define OFFSET_FR17 0x18
#define OFFSET_FR18 0x20
#define OFFSET_FR19 0x28
#define OFFSET_FR20 0x30
#define OFFSET_FR21 0x38
#define OFFSET_FR22 0x40
#define OFFSET_FR23 0x48
#define OFFSET_FR24 0x50
#define OFFSET_FR25 0x58
#define OFFSET_FR26 0x60
#define OFFSET_FR27 0x68
#define OFFSET_FR28 0x70
#define OFFSET_FR29 0x78
#define OFFSET_FR30 0x80
#define OFFSET_FR31 0x88
#define OFFSET_FPSCR 0x90
/kernel/trunk/arch/ppc32/include/fpu_context.h
29,9 → 29,30
#ifndef __ppc32_FPU_CONTEXT_H__
#define __ppc32_FPU_CONTEXT_H__
 
#include <arch/types.h>
#ifndef __ppc32_TYPES_H__
# include <arch/types.h>
#endif
 
struct fpu_context {
};
__u64 fr14;
__u64 fr15;
__u64 fr16;
__u64 fr17;
__u64 fr18;
__u64 fr19;
__u64 fr20;
__u64 fr21;
__u64 fr22;
__u64 fr23;
__u64 fr24;
__u64 fr25;
__u64 fr26;
__u64 fr27;
__u64 fr28;
__u64 fr29;
__u64 fr30;
__u64 fr31;
__u32 fpscr;
} __attribute__ ((packed));
 
#endif
/kernel/trunk/arch/ppc32/include/cpuid.h
0,0 → 1,47
/*
* Copyright (C) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifndef __ppc32_CPUID_H__
#define __ppc32_CPUID_H__
 
#include <arch/types.h>
 
struct cpu_info {
__u16 version;
__u16 revision;
} __attribute__ ((packed));
 
static inline void cpu_version(struct cpu_info *info)
{
__asm__ volatile (
"mfspr %0, 287\n"
: "=r" (*info)
);
}
 
#endif
/kernel/trunk/arch/ppc32/include/cpu.h
32,6 → 32,8
#include <typedefs.h>
 
struct cpu_arch {
int version;
int revision;
};
#endif
/kernel/trunk/arch/ppc32/Makefile.inc
55,7 → 55,7
arch/$(ARCH)/src/console.c \
arch/$(ARCH)/src/context.S \
arch/$(ARCH)/src/debug/panic.s \
arch/$(ARCH)/src/fpu_context.c \
arch/$(ARCH)/src/fpu_context.S \
arch/$(ARCH)/src/ppc32.c \
arch/$(ARCH)/src/dummy.s \
arch/$(ARCH)/src/start.S \
/kernel/trunk/arch/ppc32/src/fpu_context.c
File deleted
/kernel/trunk/arch/ppc32/src/fpu_context.S
0,0 → 1,93
#
# Copyright (C) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include <arch/asm/regname.h>
#include <arch/context_offset.h>
 
.text
 
.global fpu_context_save
.global fpu_context_restore
 
.macro FPU_CONTEXT_STORE r
stfd fr14, OFFSET_FR14(\r)
stfd fr15, OFFSET_FR15(\r)
stfd fr16, OFFSET_FR16(\r)
stfd fr17, OFFSET_FR17(\r)
stfd fr18, OFFSET_FR18(\r)
stfd fr19, OFFSET_FR19(\r)
stfd fr20, OFFSET_FR20(\r)
stfd fr21, OFFSET_FR21(\r)
stfd fr22, OFFSET_FR22(\r)
stfd fr23, OFFSET_FR23(\r)
stfd fr24, OFFSET_FR24(\r)
stfd fr25, OFFSET_FR25(\r)
stfd fr26, OFFSET_FR26(\r)
stfd fr27, OFFSET_FR27(\r)
stfd fr28, OFFSET_FR28(\r)
stfd fr29, OFFSET_FR29(\r)
stfd fr30, OFFSET_FR30(\r)
stfd fr31, OFFSET_FR31(\r)
.endm
 
.macro FPU_CONTEXT_LOAD r
lfd fr14, OFFSET_FR14(\r)
lfd fr15, OFFSET_FR15(\r)
lfd fr16, OFFSET_FR16(\r)
lfd fr17, OFFSET_FR17(\r)
lfd fr18, OFFSET_FR18(\r)
lfd fr19, OFFSET_FR19(\r)
lfd fr20, OFFSET_FR20(\r)
lfd fr21, OFFSET_FR21(\r)
lfd fr22, OFFSET_FR22(\r)
lfd fr23, OFFSET_FR23(\r)
lfd fr24, OFFSET_FR24(\r)
lfd fr25, OFFSET_FR25(\r)
lfd fr26, OFFSET_FR26(\r)
lfd fr27, OFFSET_FR27(\r)
lfd fr28, OFFSET_FR28(\r)
lfd fr29, OFFSET_FR29(\r)
lfd fr30, OFFSET_FR30(\r)
lfd fr31, OFFSET_FR31(\r)
.endm
 
fpu_context_save:
FPU_CONTEXT_STORE r3
mffs fr0
stfd fr0, OFFSET_FPSCR(r3)
blr
fpu_context_restore:
FPU_CONTEXT_LOAD r3
lfd fr0, OFFSET_FPSCR(r3)
mtfsf 7, fr0
blr
/kernel/trunk/arch/ppc32/src/asm.S
85,5 → 85,63
blr
 
memcpy:
# TODO
srwi. r7, r5, 3
addi r6, r3, -4
addi r4, r4, -4
beq 2f
andi. r0, r6, 3
mtctr r7
bne 5f
1:
lwz r7, 4(r4)
lwzu r8, 8(r4)
stw r7, 4(r6)
stwu r8, 8(r6)
bdnz 1b
andi. r5, r5, 7
2:
cmplwi 0, r5, 4
blt 3f
lwzu r0, 4(r4)
addi r5, r5, -4
stwu r0, 4(r6)
3:
cmpwi 0, r5, 0
beqlr
mtctr r5
addi r4, r4, 3
addi r6, r6, 3
4:
lbzu r0, 1(r4)
stbu r0, 1(r6)
bdnz 4b
blr
5:
subfic r0, r0, 4
mtctr r0
6:
lbz r7, 4(r4)
addi r4, r4, 1
stb r7, 4(r6)
addi r6, r6, 1
bdnz 6b
subf r5, r0, r5
rlwinm. r7, r5, 32-3, 3, 31
beq 2b
mtctr r7
b 1b
/kernel/trunk/arch/ppc32/src/cpu/cpu.c
27,6 → 27,7
*/
 
#include <arch/cpu.h>
#include <arch/cpuid.h>
#include <cpu.h>
 
#include <arch.h>
40,9 → 41,14
 
void cpu_identify(void)
{
cpu_info_t info;
cpu_version(&info);
CPU->arch.version = info.version;
CPU->arch.revision = info.revision;
}
 
void cpu_print_report(cpu_t *m)
{
printf("cpu%d:\n", m->id);
printf("cpu%d: version=%d, revision=%d\n", m->id, m->arch.version, m->arch.revision);
}
/kernel/trunk/arch/amd64/include/cpuid.h
26,8 → 26,8
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifndef __CPUID_H__
#define __CPUID_H__
#ifndef __amd64_CPUID_H__
#define __amd64_CPUID_H__
 
#define AMD_CPUID_EXTENDED 0x80000001
#define AMD_EXT_NOEXECUTE 20
/kernel/trunk/arch/mips32/include/context_offset.h
1,51 → 1,51
/* This file is automatically generated by gencontext.c. */
/* struct context */
#define OFFSET_SP 0x0
#define OFFSET_PC 0x4
#define OFFSET_S0 0x8
#define OFFSET_S1 0xc
#define OFFSET_S2 0x10
#define OFFSET_S3 0x14
#define OFFSET_S4 0x18
#define OFFSET_S5 0x1c
#define OFFSET_S6 0x20
#define OFFSET_S7 0x24
#define OFFSET_S8 0x28
#define OFFSET_GP 0x2c
#define OFFSET_SP 0x0
#define OFFSET_PC 0x4
#define OFFSET_S0 0x8
#define OFFSET_S1 0xc
#define OFFSET_S2 0x10
#define OFFSET_S3 0x14
#define OFFSET_S4 0x18
#define OFFSET_S5 0x1c
#define OFFSET_S6 0x20
#define OFFSET_S7 0x24
#define OFFSET_S8 0x28
#define OFFSET_GP 0x2c
 
 
/* struct register_dump */
#define EOFFSET_AT 0x0
#define EOFFSET_V0 0x4
#define EOFFSET_V1 0x8
#define EOFFSET_A0 0xc
#define EOFFSET_A1 0x10
#define EOFFSET_A2 0x14
#define EOFFSET_A3 0x18
#define EOFFSET_T0 0x1c
#define EOFFSET_T1 0x20
#define EOFFSET_T2 0x24
#define EOFFSET_T3 0x28
#define EOFFSET_T4 0x2c
#define EOFFSET_T5 0x30
#define EOFFSET_T6 0x34
#define EOFFSET_T7 0x38
#define EOFFSET_S0 0x3c
#define EOFFSET_S1 0x40
#define EOFFSET_S2 0x44
#define EOFFSET_S3 0x48
#define EOFFSET_S4 0x4c
#define EOFFSET_S5 0x50
#define EOFFSET_S6 0x54
#define EOFFSET_S7 0x58
#define EOFFSET_T8 0x5c
#define EOFFSET_T9 0x60
#define EOFFSET_GP 0x64
#define EOFFSET_SP 0x68
#define EOFFSET_S8 0x6c
#define EOFFSET_RA 0x70
#define EOFFSET_LO 0x74
#define EOFFSET_HI 0x78
#define EOFFSET_STATUS 0x7c
#define EOFFSET_EPC 0x80
#define REGISTER_SPACE 132
#define EOFFSET_AT 0x0
#define EOFFSET_V0 0x4
#define EOFFSET_V1 0x8
#define EOFFSET_A0 0xc
#define EOFFSET_A1 0x10
#define EOFFSET_A2 0x14
#define EOFFSET_A3 0x18
#define EOFFSET_T0 0x1c
#define EOFFSET_T1 0x20
#define EOFFSET_T2 0x24
#define EOFFSET_T3 0x28
#define EOFFSET_T4 0x2c
#define EOFFSET_T5 0x30
#define EOFFSET_T6 0x34
#define EOFFSET_T7 0x38
#define EOFFSET_S0 0x3c
#define EOFFSET_S1 0x40
#define EOFFSET_S2 0x44
#define EOFFSET_S3 0x48
#define EOFFSET_S4 0x4c
#define EOFFSET_S5 0x50
#define EOFFSET_S6 0x54
#define EOFFSET_S7 0x58
#define EOFFSET_T8 0x5c
#define EOFFSET_T9 0x60
#define EOFFSET_GP 0x64
#define EOFFSET_SP 0x68
#define EOFFSET_S8 0x6c
#define EOFFSET_RA 0x70
#define EOFFSET_LO 0x74
#define EOFFSET_HI 0x78
#define EOFFSET_STATUS 0x7c
#define EOFFSET_EPC 0x80
#define REGISTER_SPACE 132
/kernel/trunk/arch/ia32/include/cpuid.h
26,8 → 26,8
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifndef __CPUID_H__
#define __CPUID_H__
#ifndef __ia32_CPUID_H__
#define __ia32_CPUID_H__
 
#include <arch/types.h>