| 48,11 → 48,32 |
|---|
| #define i8042_DATA 0x60 |
| #define i8042_STATUS 0x64 |
| |
| |
| /** Keyboard commands. */ |
| #define KBD_ENABLE 0xf4 |
| #define KBD_DISABLE 0xf5 |
| #define KBD_ACK 0xfa |
| |
| /* |
| 60 Write 8042 Command Byte: next data byte written to port 60h is |
| placed in 8042 command register.Format: |
| |
| |7|6|5|4|3|2|1|0|8042 Command Byte |
| | | | | | | | `---- 1=enable output register full interrupt |
| | | | | | | `----- should be 0 |
| | | | | | `------ 1=set status register system, 0=clear |
| | | | | `------- 1=override keyboard inhibit, 0=allow inhibit |
| | | | `-------- disable keyboard I/O by driving clock line low |
| | | `--------- disable auxiliary device, drives clock line low |
| | `---------- IBM scancode translation 0=AT, 1=PC/XT |
| `----------- reserved, should be 0 |
| */ |
| |
| #define i8042_SET_COMMAND 0x60 |
| #define i8042_COMMAND 0x09 |
| #define i8042_WAIT_MASK 0x02 |
| |
| |
| #define SPECIAL '?' |
| #define KEY_RELEASE 0x80 |
| |
| 242,6 → 263,11 |
|---|
| void i8042_init(void) |
| { |
| exc_register(VECTOR_KBD, "i8042_interrupt", i8042_interrupt); |
| while (inb(i8042_STATUS)&i8042_WAIT_MASK); /*Wait*/ |
| outb(i8042_STATUS,i8042_SET_COMMAND); |
| while (inb(i8042_STATUS)&i8042_WAIT_MASK); /*Wait*/ |
| outb(i8042_DATA,i8042_COMMAND); |
| |
| trap_virtual_enable_irqs(1<<IRQ_KBD); |
| chardev_initialize("i8042_kbd", &kbrd, &ops); |
| stdin = &kbrd; |