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Compare Revisions

• This comparison shows the changes necessary to convert path

  → /kernel/ @ 1254

  → /kernel/ @ 1255

  ↔ Reverse comparison

• Compare Path:	Rev

  With Path:	Rev

Ignore whitespace Rev 1254 → Rev 1255

/kernel/trunk/arch/amd64/src/proc/scheduler.c
47,6 → 47,7
count_t bits;
ptr_16_64_t cpugdtr;
descriptor_t *gdt_p;
tss_descriptor_t *tss_desc;
/*
* Switch the I/O Permission Bitmap, if necessary.
61,10 → 62,10
bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8);
bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);
/*
* It is safe to set the trailing four bits because of the extra
* It is safe to set the trailing eight bits because of the extra
* convenience byte in TSS_IOMAP_SIZE.
*/
bitmap_set_range(&iomap, TASK->arch.iomap.bits, 4);
bitmap_set_range(&iomap, TASK->arch.iomap.bits, 8);
}
spinlock_unlock(&TASK->lock);
73,6 → 74,14
gdt_p = (descriptor_t *) cpugdtr.base;
gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits) - 1);
gdtr_load(&cpugdtr);
/*
* Before we load new TSS limit, the current TSS descriptor
* type must be changed to describe inactive TSS.
*/
tss_desc = (tss_descriptor_t *) &gdt_p[TSS_DES];
tss_desc->type = AR_TSS;
tr_load(gdtselector(TSS_DES));
}
/** Perform amd64 specific tasks needed before the new thread is scheduled. */

/kernel/trunk/arch/ia32/src/proc/scheduler.c
61,10 → 61,10
bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8);
bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);
/*
* It is safe to set the trailing four bits because of the extra
* It is safe to set the trailing eight bits because of the extra
* convenience byte in TSS_IOMAP_SIZE.
*/
bitmap_set_range(&iomap, TASK->arch.iomap.bits, 4);
bitmap_set_range(&iomap, TASK->arch.iomap.bits, 8);
}
spinlock_unlock(&TASK->lock);
73,6 → 73,13
gdt_p = (descriptor_t *) cpugdtr.base;
gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits) - 1);
gdtr_load(&cpugdtr);
/*
* Before we load new TSS limit, the current TSS descriptor
* type must be changed to describe inactive TSS.
*/
gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
tr_load(selector(TSS_DES));
}
/** Perform ia32 specific tasks needed before the new thread is scheduled.