| 44,23 → 44,23 |
|---|
| |
| /* ICW2: IRQ 0 maps to INT IRQBASE */ |
| outb(PIC_PIC0PORT2, IVT_IRQBASE); |
| |
| |
| /* ICW3: pic1 using IRQ IRQ_PIC1 */ |
| outb(PIC_PIC0PORT2, 1 << IRQ_PIC1); |
| |
| /* ICW4: i8086 mode */ |
| |
| /* ICW4: i8086 mode */ |
| outb(PIC_PIC0PORT2, 1); |
| |
| /* ICW1: ICW1, ICW4 to follow */ |
| outb(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4); |
| |
| /* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */ |
| /* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */ |
| outb(PIC_PIC1PORT2, IVT_IRQBASE + 8); |
| |
| /* ICW3: pic1 is known as PIC_PIC1ID */ |
| outb(PIC_PIC1PORT2, PIC_PIC1ID); |
| |
| /* ICW4: i8086 mode */ |
| /* ICW4: i8086 mode */ |
| outb(PIC_PIC1PORT2, 1); |
| |
| /* |
| 75,7 → 75,7 |
|---|
| enable_irqs_function = pic_enable_irqs; |
| disable_irqs_function = pic_disable_irqs; |
| eoi_function = pic_eoi; |
| |
| |
| pic_disable_irqs(0xffff); /* disable all irq's */ |
| pic_enable_irqs(1<<IRQ_PIC1); /* but enable pic1 */ |
| } |
| 83,13 → 83,13 |
|---|
| void pic_enable_irqs(__u16 irqmask) |
| { |
| __u8 x; |
| |
| |
| if (irqmask & 0xff) { |
| x = inb(PIC_PIC0PORT2); |
| x = inb(PIC_PIC0PORT2); |
| outb(PIC_PIC0PORT2, x & (~(irqmask & 0xff))); |
| } |
| if (irqmask >> 8) { |
| x = inb(PIC_PIC1PORT2); |
| x = inb(PIC_PIC1PORT2); |
| outb(PIC_PIC1PORT2, x & (~(irqmask >> 8))); |
| } |
| } |
| 97,13 → 97,13 |
|---|
| void pic_disable_irqs(__u16 irqmask) |
| { |
| __u8 x; |
| |
| |
| if (irqmask & 0xff) { |
| x = inb(PIC_PIC0PORT2); |
| x = inb(PIC_PIC0PORT2); |
| outb(PIC_PIC0PORT2, x | (irqmask & 0xff)); |
| } |
| if (irqmask >> 8) { |
| x = inb(PIC_PIC1PORT2); |
| x = inb(PIC_PIC1PORT2); |
| outb(PIC_PIC1PORT2, x | (irqmask >> 8)); |
| } |
| } |
| 111,7 → 111,7 |
|---|
| void pic_eoi(void) |
| { |
| outb(0x20,0x20); |
| outb(0xa0,0x20); |
| outb(0xa0,0x20); |
| } |
| |
| void pic_spurious(__u8 n, __u32 stack[]) |