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Ignore whitespace Rev 910 → Rev 911

/kernel/trunk/arch/ia64/include/mm/frame.h
29,7 → 29,14
#ifndef __ia64_FRAME_H__
#define __ia64_FRAME_H__
 
#define FRAME_WIDTH 14 /* 16K */
/*
* Frame is defined to be 64K long.
* Such a relatively big frame size is used because of kernel stack requirements
* and organization. Portion of the stack reserved for RSE must be at least 16K
* long. If the memory stack is to have some space allocated, the next available
* frame size (i.e. 64K) needs to be used.
*/
#define FRAME_WIDTH 16 /* 64K */
#define FRAME_SIZE (1<<FRAME_WIDTH)
 
extern void frame_arch_init(void);
/kernel/trunk/arch/ia64/include/register.h
42,8 → 42,6
#define PSR_RT_MASK (1<<27)
#define PSR_IT_MASK 0x0000001000000000
 
 
 
/** Application registers. */
#define AR_KR0 0
#define AR_KR1 1
/kernel/trunk/arch/ia64/src/ivt.S
37,6 → 37,12
#error Memory stack must be 16-byte aligned.
#endif
 
/** Partitioning of bank 0 registers. */
#define R_OFFS r16
#define R_HANDLER r17
#define R_RET r18
#define R_KSTACK r23 /* keep in sync with before_thread_runs_arch() */
 
/** Heavyweight interrupt handler
*
* This macro roughly follows steps from 1 to 19 described in
54,10 → 60,8
*/
.macro HEAVYWEIGHT_HANDLER offs, handler=universal_handler
.org ivt + \offs
mov r24 = \offs
movl r25 = \handler ;;
mov ar.k0 = r24
mov ar.k1 = r25
mov R_OFFS = \offs
movl R_HANDLER = \handler ;;
br heavyweight_handler
.endm
 
64,6 → 68,10
.global heavyweight_handler
heavyweight_handler:
/* 1. copy interrupt registers into bank 0 */
/*
* Note that r24-r31 from bank0 can be used only as long as PSR.ic = 0.
*/
mov r24 = cr.iip
mov r25 = cr.ipsr
mov r26 = cr.iipa
117,11 → 125,9
mov ar.rsc = r24 /* restore RSE's setting */
/* steps 6 - 15 are done by heavyweight_handler_inner() */
mov r24 = b0 /* save b0 belonging to interrupted context */
mov r26 = ar.k0
mov r25 = ar.k1
br.call.sptk.many rp = heavyweight_handler_inner
0: mov b0 = r24 /* restore b0 belonging to the interrupted context */
mov R_RET = b0 /* save b0 belonging to interrupted context */
br.call.sptk.many b0 = heavyweight_handler_inner
0: mov b0 = R_RET /* restore b0 belonging to the interrupted context */
 
/* 16. RSE switch to interrupted context */
cover /* allocate zerro size frame (step 1 (from Intel Docs)) */
184,9 → 190,9
alloc loc0 = ar.pfs, 0, 47, 2, 0 ;;
/* bank 0 is going to be shadowed, copy essential data from there */
mov loc1 = r24 /* b0 belonging to interrupted context */
mov loc2 = r25
mov out0 = r26
mov loc1 = R_RET /* b0 belonging to interrupted context */
mov loc2 = R_HANDLER
mov out0 = R_OFFS
add out1 = STACK_SCRATCH_AREA_SIZE, r12
 
323,7 → 329,7
bsw.0 ;;
srlz.d
 
mov r24 = loc1
mov R_RET = loc1
mov ar.pfs = loc0
br.ret.sptk.many b0
 
/kernel/trunk/arch/ia64/src/proc/scheduler.c
29,11 → 29,12
#include <proc/scheduler.h>
#include <proc/thread.h>
#include <arch.h>
#include <arch/register.h>
#include <arch/mm/tlb.h>
#include <config.h>
#include <align.h>
 
/** Record kernel stack address in ar.k7 and make sure it is mapped in DTR. */
/** Record kernel stack address in bank 0 r23 and make sure it is mapped in DTR. */
void before_thread_runs_arch(void)
{
__address base;
49,11 → 50,14
}
/*
* Record address of kernel stack to ar.k7
* where it will be found after switch
* from userspace.
* Record address of kernel stack to bank 0 r23
* where it will be found after switch from userspace.
*/
__asm__ volatile ("mov ar.k7 = %0\n" : : "r" (THREAD->kstack));
__asm__ volatile (
"bsw.0\n"
"mov r23 = %0\n"
"bsw.1\n"
: : "r" (THREAD->kstack));
}
 
void after_thread_ran_arch(void)