| /kernel/trunk/arch/ia64/include/mm/as.h |
|---|
| 40,8 → 40,6 |
| #define USTACK_ADDRESS_ARCH (0x7fffffffffffffff-(PAGE_SIZE-1)) |
| #define UDATA_ADDRESS_ARCH 0x0000000001001000 |
| #define as_install_arch(as) |
| extern void as_arch_init(void); |
| #endif |
| /kernel/trunk/arch/ia64/src/proc/scheduler.c |
|---|
| 33,7 → 33,7 |
| #include <config.h> |
| #include <align.h> |
| /** Ensure that thread's kernel stack is locked in TLB. */ |
| /** Record kernel stack address in ar.k7 and make sure it is mapped in DTR. */ |
| void before_thread_runs_arch(void) |
| { |
| __address base; |
| 42,12 → 42,18 |
| if ((__address) THREAD->kstack < base || (__address) THREAD->kstack > base + (1<<KERNEL_PAGE_WIDTH)) { |
| /* |
| * Kernel stack of this thread is not locked in DTLB. |
| * First, make sure it is not mapped already. |
| * If not, fill respective tranlsation register. |
| * Kernel stack of this thread is not mapped by DTR[TR_KERNEL]. |
| * Use DTR[TR_KSTACK] to map it. |
| */ |
| dtlb_kernel_mapping_insert((__address) THREAD->kstack, KA2PA(THREAD->kstack), true, DTR_KSTACK); |
| } |
| /* |
| * Record address of kernel stack to ar.k7 |
| * where it will be found after switch |
| * from userspace. |
| */ |
| __asm__ volatile ("mov ar.k7 = %0\n" : : "r" (THREAD->kstack)); |
| } |
| void after_thread_ran_arch(void) |
| /kernel/trunk/arch/ia64/src/mm/as.c |
|---|
| 27,8 → 27,14 |
| */ |
| #include <arch/mm/as.h> |
| #include <arch/mm/asid.h> |
| #include <arch/mm/page.h> |
| #include <genarch/mm/as_ht.h> |
| #include <genarch/mm/asid_fifo.h> |
| #include <mm/asid.h> |
| #include <arch.h> |
| #include <arch/barrier.h> |
| #include <synch/spinlock.h> |
| /** Architecture dependent address space init. */ |
| void as_arch_init(void) |
| 36,3 → 42,39 |
| as_operations = &as_ht_operations; |
| asid_fifo_init(); |
| } |
| /** Prepare registers for switching to another address space. |
| * |
| * @param as Address space. |
| */ |
| void as_install_arch(as_t *as) |
| { |
| ipl_t ipl; |
| region_register rr; |
| int i; |
| ipl = interrupts_disable(); |
| spinlock_lock(&as->lock); |
| ASSERT(as->asid != ASID_INVALID); |
| /* |
| * Load respective ASID (7 consecutive RIDs) to |
| * region registers. |
| */ |
| for (i = 0; i < REGION_REGISTERS; i++) { |
| if (i == VRN_KERNEL) |
| continue; |
| rr.word = rr_read(i); |
| rr.map.ve = false; /* disable VHPT walker */ |
| rr.map.rid = ASID2RID(as->asid, i); |
| rr.map.ps = PAGE_WIDTH; |
| rr_write(i, rr.word); |
| } |
| srlz_d(); |
| srlz_i(); |
| spinlock_unlock(&as->lock); |
| interrupts_restore(ipl); |
| } |