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Ignore whitespace Rev 514 → Rev 515

/kernel/trunk/genarch/include/acpi/madt.h
79,7 → 79,7
struct madt_apic_header header;
__u8 bus;
__u8 source;
__u32 global_intr;
__u32 global_int;
__u16 flags;
} __attribute__ ((packed));
 
/kernel/trunk/genarch/src/acpi/matd.c
226,9 → 226,9
void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, __u32 index)
{
ASSERT(override->source < sizeof(isa_irq_map)/sizeof(int));
printf("Remapping irq%d to IO APIC pin%d\n", override->source, override->global_intr);
isa_irq_map[override->source] = override->global_intr;
printf("MADT: ignoring %s entry: bus=%d, source=%d, global_int=%d, flags=%W\n",
entry[override->header.type], override->bus, override->source,
override->global_int, override->flags);
}
 
#endif /* CONFIG_SMP */
/kernel/trunk/arch/ia32/include/interrupt.h
34,14 → 34,13
 
#define IVT_ITEMS IDT_ITEMS
 
#define EXC_COUNT 32
#define IRQ_COUNT 16
 
#define IVT_EXCBASE 0
#define EXCLAST 31
#define IVT_IRQBASE (IVT_EXCBASE+EXC_COUNT)
#define IVT_FREEBASE (IVT_IRQBASE+IRQ_COUNT)
 
#define IVT_IRQBASE (IVT_EXCBASE+EXCLAST+1)
#define IRQLAST 15
 
#define IVT_FREEBASE (IVT_IRQBASE+IRQLAST+1)
 
#define IRQ_CLK 0
#define IRQ_KBD 1
#define IRQ_PIC1 2
/kernel/trunk/arch/ia32/include/smp/apic.h
35,6 → 35,8
#define FIXED (0<<0)
#define LOPRI (1<<0)
 
#define APIC_ID_COUNT 16
 
/* local APIC macros */
#define IPI_INIT 0
#define IPI_STARTUP 0
85,8 → 87,13
#define TIMER_ONESHOT 0x0
#define TIMER_PERIODIC 0x1
 
#define SEND_PENDING (1<<12)
/** Delivery status. */
#define DELIVS_IDLE 0x0
#define DELIVS_PENDING 0x1
 
/** Destination masks. */
#define DEST_ALL 0xff
 
/** Interrupt Command Register. */
#define ICRlo (0x300/sizeof(__u32))
#define ICRhi (0x310/sizeof(__u32))
224,7 → 231,7
 
/** Local APIC ID Register. */
#define L_APIC_ID (0x020/sizeof(__u32))
union lapic_id {
union l_apic_id {
__u32 value;
struct {
unsigned : 24; /**< Reserved. */
231,7 → 238,7
__u8 apic_id; /**< Local APIC ID. */
} __attribute__ ((packed));
};
typedef union lapic_id lapic_id_t;
typedef union l_apic_id l_apic_id_t;
 
/* Local APIC Version Register */
#define LAVR (0x030/sizeof(__u32))
284,9 → 291,20
};
} __attribute__ ((packed));
 
typedef struct io_redirection_reg io_redirection_reg_t;
 
 
/** IO APIC Identification Register. */
union io_apic_id {
__u32 value;
struct {
unsigned : 24; /**< Reserved. */
unsigned apic_id : 4; /**< IO APIC ID. */
unsigned : 4; /**< Reserved. */
} __attribute__ ((packed));
};
typedef union io_apic_id io_apic_id_t;
 
extern volatile __u32 *l_apic;
extern volatile __u32 *io_apic;
 
/kernel/trunk/arch/ia32/src/smp/apic.c
64,6 → 64,7
 
static int apic_poll_errors(void);
 
#ifdef LAPIC_VERBOSE
static char *delmod_str[] = {
"Fixed",
"Lowest Priority",
104,11 → 105,13
"Polarity High",
"Polarity Low"
};
#endif /* LAPIC_VERBOSE */
 
/** Initialize APIC on BSP. */
void apic_init(void)
{
__u32 tmp, id, i;
io_apic_id_t idreg;
int i;
 
trap_register(VECTOR_APIC_SPUR, apic_spurious);
 
123,26 → 126,23
*/
io_apic_disable_irqs(0xffff);
trap_register(VECTOR_CLK, l_apic_timer_interrupt);
for (i=0; i<16; i++) {
for (i = 0; i < IRQ_COUNT; i++) {
int pin;
if ((pin = smp_irq_to_pin(i)) != -1) {
io_apic_change_ioredtbl(pin, 0xff, IVT_IRQBASE+i, LOPRI);
io_apic_change_ioredtbl(pin, DEST_ALL, IVT_IRQBASE+i, LOPRI);
}
}
 
/*
* Ensure that io_apic has unique ID.
*/
tmp = io_apic_read(IOAPICID);
id = (tmp >> 24) & 0xf;
if ((1<<id) & apic_id_mask) {
int i;
for (i=0; i<15; i++) {
idreg.value = io_apic_read(IOAPICID);
if ((1<<idreg.apic_id) & apic_id_mask) { /* see if IO APIC ID is used already */
for (i = 0; i < APIC_ID_COUNT; i++) {
if (!((1<<i) & apic_id_mask)) {
io_apic_write(IOAPICID, (tmp & (~(0xf<<24))) | (i<<24));
idreg.apic_id = i;
io_apic_write(IOAPICID, idreg.value);
break;
}
}
152,6 → 152,7
* Configure the BSP's lapic.
*/
l_apic_init();
 
l_apic_debug();
}
 
178,9 → 179,9
esr.value = l_apic[ESR];
if (esr.send_checksum_error)
printf("Send CS Error\n");
printf("Send Checksum Error\n");
if (esr.receive_checksum_error)
printf("Receive CS Error\n");
printf("Receive Checksum Error\n");
if (esr.send_accept_error)
printf("Send Accept Error\n");
if (esr.receive_accept_error)
216,7 → 217,7
l_apic[ICRlo] = icr.lo;
 
icr.lo = l_apic[ICRlo];
if (icr.lo & SEND_PENDING)
if (icr.delivs == DELIVS_PENDING)
printf("IPI is pending.\n");
 
return apic_poll_errors();
259,7 → 260,7
if (!apic_poll_errors()) return 0;
 
icr.lo = l_apic[ICRlo];
if (icr.lo & SEND_PENDING)
if (icr.delivs == DELIVS_PENDING)
printf("IPI is pending.\n");
 
icr.delmod = DELMOD_INIT;
292,7 → 293,6
}
}
return apic_poll_errors();
}
 
366,7 → 366,6
t2 = l_apic[CCRT];
l_apic[ICRT] = t1-t2;
}
 
/** Local APIC End of Interrupt. */
413,10 → 412,10
*/
__u8 l_apic_id(void)
{
lapic_id_t lapic_id;
l_apic_id_t idreg;
lapic_id.value = l_apic[L_APIC_ID];
return lapic_id.apic_id;
idreg.value = l_apic[L_APIC_ID];
return idreg.apic_id;
}
 
/** Read from IO APIC register.
490,7 → 489,7
int i, pin;
for (i=0;i<16;i++) {
if ((irqmask>>i) & 1) {
if (irqmask & (1<<i)) {
/*
* Mask the signal input in IO APIC if there is a
* mapping for the respective IRQ number.
516,7 → 515,7
io_redirection_reg_t reg;
for (i=0;i<16;i++) {
if ((irqmask>>i) & 1) {
if (irqmask & (1<<i)) {
/*
* Unmask the signal input in IO APIC if there is a
* mapping for the respective IRQ number.
530,7 → 529,6
}
}
 
}
 
#endif /* CONFIG_SMP */