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Compare Revisions

• This comparison shows the changes necessary to convert path

  → /kernel/trunk/arch/mips32/ @ 1702

  → /kernel/trunk/arch/mips32/ @ 1701

  ↔ Reverse comparison

• Compare Path:	Rev

  With Path:	Rev

Ignore whitespace Rev 1702 → Rev 1701

/kernel/trunk/arch/mips32/include/exception.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_EXCEPTION_H__
#define __mips32_EXCEPTION_H__
122,7 → 116,3
extern void exception_init(void);
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/arg.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_ARG_H__
#define __mips32_ARG_H__
55,7 → 49,3
#define va_end(ap)
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/proc/task.h
26,13 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32proc mips32
* @ingroup proc
* @{
*/
/** @file
*/
#ifndef __mips32_TASK_H__
#define __mips32_TASK_H__
43,7 → 36,3
#define task_destroy_arch(t)
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/proc/thread.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32proc
* @{
*/
/** @file
*/
#ifndef __mips32_THREAD_H__
#define __mips32_THREAD_H__
41,7 → 35,3
#define thread_create_arch(t)
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/mm/as.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32mm
* @{
*/
/** @file
*/
#ifndef __mips32_AS_H__
#define __mips32_AS_H__
47,7 → 41,3
extern void as_arch_init(void);
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/mm/page.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32mm
* @{
*/
/** @file
*/
#ifndef __mips32_PAGE_H__
#define __mips32_PAGE_H__
151,7 → 145,3
#endif /* KERNEL */
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/mm/frame.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32mm
* @{
*/
/** @file
*/
#ifndef __mips32_FRAME_H__
#define __mips32_FRAME_H__
47,7 → 41,3
#endif /* KERNEL */
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/mm/tlb.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32mm
* @{
*/
/** @file
*/
#ifndef __mips32_TLB_H__
#define __mips32_TLB_H__
180,7 → 174,3
extern void tlb_modified(istate_t *istate);
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/mm/asid.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32mm
* @{
*/
/** @file
*/
#ifndef __mips32_ASID_H__
#define __mips32_ASID_H__
42,7 → 36,3
typedef __u8 asid_t;
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/mm/memory_init.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32mm
* @{
*/
/** @file
*/
#ifndef __mips32_MEMORY_INIT_H__
#define __mips32_MEMORY_INIT_H__
43,7 → 37,3
#define get_memory_size() CONFIG_MEMORY_SIZE
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/drivers/msim.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef _MSIM_H_
#define _MSIM_H_
47,7 → 41,3
void msim_kbd_grab(void);
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/drivers/arc.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_ARC_H__
#define __mips32_ARC_H__
262,7 → 256,3
void arc_console(void);
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/drivers/serial.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __DRV_SERIAL_H__
#define __DRV_SERIAL_H__
66,7 → 60,3
int serial_init(void);
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/cp0.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32cpu
* @{
*/
/** @file
*/
#ifndef __mips32_CP0_H__
#define __mips32_CP0_H__
118,7 → 112,3
GEN_READ_CP0(prid, 15);
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/barrier.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_BARRIER_H__
#define __mips32_BARRIER_H__
46,7 → 40,3
#define write_barrier() __asm__ volatile ("" ::: "memory")
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/interrupt.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32interrupt
* @{
*/
/** @file
*/
#ifndef __mips32_INTERRUPT_H__
#define __mips32_INTERRUPT_H__
52,7 → 46,3
extern void interrupt_init(void);
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/arch.h
26,17 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_ARCH_H__
#define __mips32_ARCH_H__
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/asm.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_ASM_H__
#define __mips32_ASM_H__
67,7 → 61,3
__address entry);
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/atomic.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_ATOMIC_H__
#define __mips32_ATOMIC_H__
71,7 → 65,3
}
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/context_offset.h
50,7 → 50,3
#define EOFFSET_EPC 0x80
#define EOFFSET_K1 0x84
#define REGISTER_SPACE 136
/** @}
*/

/kernel/trunk/arch/mips32/include/stack.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_STACK_H__
#define __mips32_STACK_H__
39,7 → 33,3
#define STACK_ALIGNMENT 8
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/context.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_CONTEXT_H__
#define __mips32_CONTEXT_H__
75,7 → 69,3
#endif /* __ASM__ */
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/debugger.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32debug
* @{
*/
/** @file
*/
#ifndef _mips32_DEBUGGER_H_
#define _mips32_DEBUGGER_H_
64,7 → 58,3
extern bpinfo_t breakpoints[BKPOINTS_MAX];
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/types.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_TYPES_H__
#define __mips32_TYPES_H__
61,7 → 55,3
typedef __u32 pfn_t;
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/elf.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_ELF_H__
#define __mips32_ELF_H__
46,7 → 40,3
#define ELF_CLASS ELFCLASS32
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/fpu_context.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_FPU_CONTEXT_H__
#define __mips32_FPU_CONTEXT_H__
45,7 → 39,3
};
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/asm/regname.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_REGNAME_H_
#define __mips32_REGNAME_H_
93,7 → 87,3
#endif /* _REGNAME_H_ */
/** @}
*/

/kernel/trunk/arch/mips32/include/asm/boot.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_BOOT_H_
#define __mips32_BOOT_H_
40,7 → 34,3
#define TEMP_STACK_SIZE 0x100
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/memstr.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_MEMSTR_H__
#define __mips32_MEMSTR_H__
43,7 → 37,3
extern int memcmp(__address src, __address dst, int cnt);
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/debug.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32debug
* @{
*/
/** @file
*/
#ifndef __mips32_DEBUG_H__
#define __mips23_DEBUG_H__
50,7 → 44,3
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/console.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_CONSOLE_H__
#define __mips32_CONSOLE_H__
39,7 → 33,3
void console_init(void);
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/cpu.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32cpu
* @{
*/
/** @file
*/
#ifndef __mips32_CPU_H__
#define __mips32_CPU_H__
43,7 → 37,3
};
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/byteorder.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_BYTEORDER_H__
#define __mips32_BYTEORDER_H__
55,7 → 49,3
#endif
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/cache.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_CACHE_H__
#define __mips32_CACHE_H__
38,7 → 32,3
extern void cache_error(void);
#endif
/** @}
*/

/kernel/trunk/arch/mips32/include/faddr.h
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#ifndef __mips32_FADDR_H__
#define __mips32_FADDR_H__
40,7 → 34,3
#define FADDR(fptr) ((__address) (fptr))
#endif
/** @}
*/

/kernel/trunk/arch/mips32/src/mips32.c
26,14 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @ingroup others
* @{
*/
/** @file
*/
#include <arch.h>
#include <arch/boot.h>
#include <arch/cp0.h>
181,7 → 174,3
return 0;
}
/** @}
*/

/kernel/trunk/arch/mips32/src/exception.c
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#include <arch/exception.h>
#include <arch/interrupt.h>
#include <panic.h>
171,7 → 165,3
#endif
exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception);
}
/** @}
*/

/kernel/trunk/arch/mips32/src/mm/tlb.c
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32mm
* @{
*/
/** @file
*/
#include <arch/mm/tlb.h>
#include <mm/asid.h>
#include <mm/tlb.h>
608,7 → 602,3
interrupts_restore(ipl);
cp0_entry_hi_write(hi_save.value);
}
/** @}
*/

/kernel/trunk/arch/mips32/src/mm/page.c
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32mm
* @{
*/
/** @file
*/
#include <arch/mm/page.h>
#include <genarch/mm/page_pt.h>
#include <mm/page.h>
49,7 → 43,3
{
return physaddr + 0xa0000000;
}
/** @}
*/

/kernel/trunk/arch/mips32/src/mm/frame.c
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32mm
* @{
*/
/** @file
*/
#include <arch/mm/frame.h>
#include <mm/frame.h>
#include <config.h>
55,7 → 49,3
frame_mark_unavailable(0, 1);
}
}
/** @}
*/

/kernel/trunk/arch/mips32/src/mm/as.c
26,14 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32mm mips32
* @ingroup mm
* @{
*/
/** @file
* @ingroup mips32
*/
#include <arch/mm/as.h>
#include <genarch/mm/as_pt.h>
#include <genarch/mm/asid_fifo.h>
74,7 → 66,3
interrupts_restore(ipl);
}
/** @}
*/

/kernel/trunk/arch/mips32/src/console.c
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#include <console/console.h>
#include <arch/console.h>
#include <arch/drivers/arc.h>
63,7 → 57,3
{
msim_kbd_release();
}
/** @}
*/

/kernel/trunk/arch/mips32/src/drivers/msim.c
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#include <interrupt.h>
#include <console/chardev.h>
#include <arch/drivers/msim.h>
124,7 → 118,3
{
int_register(MSIM_KBD_IRQ, "user_interrupt", oldvector);
}
/** @}
*/

/kernel/trunk/arch/mips32/src/drivers/arc.c
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#include <arch/drivers/arc.h>
#include <arch/mm/page.h>
#include <print.h>
407,7 → 401,3
config.memory_size = total;
}
/** @}
*/

/kernel/trunk/arch/mips32/src/drivers/serial.c
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#include <interrupt.h>
#include <arch/cp0.h>
#include <arch/drivers/serial.h>
142,7 → 136,3
stdin = &console;
stdout = &console;
}
/** @}
*/

/kernel/trunk/arch/mips32/src/interrupt.c
26,13 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32interrupt mips32
* @ingroup interrupt
* @{
*/
/** @file
*/
#include <interrupt.h>
#include <arch/interrupt.h>
#include <arch/types.h>
141,7 → 134,3
return;
int_register(irq, "ipc_int", ipc_int);
}
/** @}
*/

/kernel/trunk/arch/mips32/src/ddi/ddi.c
26,13 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32ddi mips32
* @ingroup ddi
* @{
*/
/** @file
*/
#include <ddi/ddi.h>
#include <proc/task.h>
#include <arch/types.h>
55,7 → 48,3
{
return 0;
}
/** @}
*/

/kernel/trunk/arch/mips32/src/debugger.c
26,13 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32debug mips32
* @ingroup debug
* @{
*/
/** @file
*/
#include <arch/debugger.h>
#include <memstr.h>
#include <console/kconsole.h>
383,7 → 376,3
}
spinlock_unlock(&bkpoint_lock);
}
/** @}
*/

/kernel/trunk/arch/mips32/src/fpu_context.c
24,12 → 24,6
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*
*/
56,7 → 50,3
{
/* TODO: Zero all registers */
}
/** @}
*/

/kernel/trunk/arch/mips32/src/cpu/cpu.c
26,13 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32cpu mips32
* @ingroup cpu
* @{
*/
/** @file
*/
#include <arch/cpu.h>
#include <cpu.h>
134,7 → 127,3
m->id, data->vendor, data->model, m->arch.rev_num >> 4,
m->arch.rev_num & 0xf, m->arch.imp_num);
}
/** @}
*/

/kernel/trunk/arch/mips32/src/cache.c
26,12 → 26,6
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup mips32
* @{
*/
/** @file
*/
#include <arch/cache.h>
#include <panic.h>
39,7 → 33,3
{
panic("cache_error exception\n");
}
/** @}
*/