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Ignore whitespace Rev 879 → Rev 878

/kernel/trunk/arch/ia64/src/start.S
50,8 → 50,17
kernel_image_start:
.auto
 
#Fill TR.i and TR.d using Region Register #VRN_KERNEL
#Fill TR.i and TR.d and enable paging
 
mov r9=rr[r0]
movl r10=(RR_MASK)
and r9=r10,r9
movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)|(KERNEL_PAGE_WIDTH<<PS_SHIFT))
or r9=r10,r9
mov rr[r0]=r9
 
 
movl r8=(VRN_KERNEL<<VRN_SHIFT)
mov r9=rr[r8]
movl r10=(RR_MASK)
72,6 → 81,11
itr.d dtr[r0]=r10
 
 
 
 
 
 
 
# initialize PSR
mov psr.l = r0
srlz.i
86,8 → 100,6
srlz.d
srlz.i
.explicit
 
/*Return from interupt is only the way how to fill upper half word of PSR*/
{rfi;;}
{nop 0;;}
{nop 0;;}
97,10 → 109,6
{nop 0;;}
{nop 0;;}
{nop 0;;}
 
.global paging_start
/*Now we are paging*/
paging_start:
{nop 0;;}
{nop 0;;}
{nop 0;;}
110,6 → 118,9
{nop 0;;}
{nop 0;;}
 
.global paging_start
paging_start:
 
.auto
# switch to register bank 1
/kernel/trunk/arch/ia64/src/mm/page.c
56,6 → 56,7
void set_environment(void)
{
 
//#ifdef NEVERDEFINED
region_register rr;
pta_register pta;
int i;
62,13 → 63,11
 
/*
* First set up kernel region register.
* This action is redundand (see start.S) but I would to keep it to make sure that
*no unexpected changes will be made.
*/
rr.word = rr_read(VRN_KERNEL);
rr.map.ve = 0; /* disable VHPT walker */
rr.map.ps = PAGE_WIDTH;
rr.map.rid = ASID2RID(ASID_KERNEL,VRN_KERNEL);
rr.map.rid = ASID_KERNEL;
rr_write(VRN_KERNEL, rr.word);
srlz_i();
srlz_d();
83,7 → 82,7
rr.word == rr_read(i);
rr.map.ve = 0; /* disable VHPT walker */
rr.map.rid = ASID2RID(ASID_INVALID,i);
rr.map.rid = ASID_INVALID;
rr_write(i, rr.word);
srlz_i();
srlz_d();
101,6 → 100,7
srlz_i();
srlz_d();
//#endif
 
return ;
/kernel/trunk/arch/ia64/include/mm/page.h
45,7 → 45,7
 
#define PAGE_SIZE FRAME_SIZE
#define PAGE_WIDTH FRAME_WIDTH
#define KERNEL_PAGE_WIDTH 28
#define KERNEL_PAGE_WIDTH 26
 
 
 
229,8 → 229,8
static inline __u64 rr_read(index_t i)
{
__u64 ret;
ASSERT(i < REGION_REGISTERS);
i=i<<VRN_SHIFT;
__asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i));
return ret;
245,7 → 245,6
static inline void rr_write(index_t i, __u64 v)
{
ASSERT(i < REGION_REGISTERS);
i=i<<VRN_SHIFT;
__asm__ volatile (
"mov rr[%0] = %1;;\n"
: